The Design and Implementation of the FreeBSD Operating System, Second Edition
Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)


[ source navigation ] [ diff markup ] [ identifier search ] [ freetext search ] [ file search ] [ list types ] [ track identifier ]

FreeBSD/Linux Kernel Cross Reference
sys/arm/xilinx/zy7_mp.c

Version: -  FREEBSD  -  FREEBSD-13-STABLE  -  FREEBSD-13-0  -  FREEBSD-12-STABLE  -  FREEBSD-12-0  -  FREEBSD-11-STABLE  -  FREEBSD-11-0  -  FREEBSD-10-STABLE  -  FREEBSD-10-0  -  FREEBSD-9-STABLE  -  FREEBSD-9-0  -  FREEBSD-8-STABLE  -  FREEBSD-8-0  -  FREEBSD-7-STABLE  -  FREEBSD-7-0  -  FREEBSD-6-STABLE  -  FREEBSD-6-0  -  FREEBSD-5-STABLE  -  FREEBSD-5-0  -  FREEBSD-4-STABLE  -  FREEBSD-3-STABLE  -  FREEBSD22  -  l41  -  OPENBSD  -  linux-2.6  -  MK84  -  PLAN9  -  xnu-8792 
SearchContext: -  none  -  3  -  10 

    1 /*-
    2  * Copyright (c) 2013 Thomas Skibo.  All rights reserved.
    3  *
    4  * Redistribution and use in source and binary forms, with or without
    5  * modification, are permitted provided that the following conditions
    6  * are met:
    7  * 1. Redistributions of source code must retain the above copyright
    8  *    notice, this list of conditions and the following disclaimer.
    9  * 2. Redistributions in binary form must reproduce the above copyright
   10  *    notice, this list of conditions and the following disclaimer in the
   11  *    documentation and/or other materials provided with the distribution.
   12  *
   13  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
   14  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
   15  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
   16  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
   17  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
   18  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
   19  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
   20  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
   21  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
   22  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
   23  */
   24 
   25 #include "opt_platform.h"
   26 
   27 #include <sys/cdefs.h>
   28 __FBSDID("$FreeBSD$");
   29 #include <sys/param.h>
   30 #include <sys/systm.h>
   31 #include <sys/bus.h>
   32 #include <sys/lock.h>
   33 #include <sys/mutex.h>
   34 #include <sys/smp.h>
   35 
   36 #include <vm/vm.h>
   37 #include <vm/pmap.h>
   38 
   39 #include <machine/cpu.h>
   40 #include <machine/smp.h>
   41 #include <machine/fdt.h>
   42 #include <machine/intr.h>
   43 #include <machine/platformvar.h>
   44 
   45 #include <arm/xilinx/zy7_machdep.h>
   46 #include <arm/xilinx/zy7_reg.h>
   47 
   48 #define ZYNQ7_CPU1_ENTRY        0xfffffff0
   49 
   50 #define SCU_CONTROL_REG         0xf8f00000
   51 #define    SCU_CONTROL_ENABLE   (1 << 0)
   52 
   53 void
   54 zynq7_mp_setmaxid(platform_t plat)
   55 {
   56 
   57         mp_maxid = 1;
   58         mp_ncpus = 2;
   59 }
   60 
   61 void    
   62 zynq7_mp_start_ap(platform_t plat)
   63 {
   64         bus_space_handle_t scu_handle;
   65         bus_space_handle_t ocm_handle;
   66         uint32_t scu_ctrl;
   67 
   68         /* Map in SCU control register. */
   69         if (bus_space_map(fdtbus_bs_tag, SCU_CONTROL_REG, 4,
   70                           0, &scu_handle) != 0)
   71                 panic("platform_mp_start_ap: Couldn't map SCU config reg\n");
   72 
   73         /* Set SCU enable bit. */
   74         scu_ctrl = bus_space_read_4(fdtbus_bs_tag, scu_handle, 0);
   75         scu_ctrl |= SCU_CONTROL_ENABLE;
   76         bus_space_write_4(fdtbus_bs_tag, scu_handle, 0, scu_ctrl);
   77 
   78         bus_space_unmap(fdtbus_bs_tag, scu_handle, 4);
   79 
   80         /* Map in magic location to give entry address to CPU1. */
   81         if (bus_space_map(fdtbus_bs_tag, ZYNQ7_CPU1_ENTRY, 4,
   82             0, &ocm_handle) != 0)
   83                 panic("platform_mp_start_ap: Couldn't map OCM\n");
   84 
   85         /* Write start address for CPU1. */
   86         bus_space_write_4(fdtbus_bs_tag, ocm_handle, 0,
   87             pmap_kextract((vm_offset_t)mpentry));
   88 
   89         bus_space_unmap(fdtbus_bs_tag, ocm_handle, 4);
   90 
   91         /*
   92          * The SCU is enabled above but I think the second CPU doesn't
   93          * turn on filtering until after the wake-up below. I think that's why
   94          * things don't work if I don't put these cache ops here.  Also, the
   95          * magic location, 0xfffffff0, isn't in the SCU's filtering range so it
   96          * needs a write-back too.
   97          */
   98         dcache_wbinv_poc_all();
   99 
  100         /* Wake up CPU1. */
  101         dsb();
  102         sev();
  103 }

Cache object: a054afb5a08f6b80068f5c7744460080


[ source navigation ] [ diff markup ] [ identifier search ] [ freetext search ] [ file search ] [ list types ] [ track identifier ]


This page is part of the FreeBSD/Linux Linux Kernel Cross-Reference, and was automatically generated using a modified version of the LXR engine.