The Design and Implementation of the FreeBSD Operating System, Second Edition
Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)


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FreeBSD/Linux Kernel Cross Reference
sys/arm/xscale/i80321/ep80219_machdep.c

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    1 /*      $NetBSD: hpc_machdep.c,v 1.70 2003/09/16 08:18:22 agc Exp $     */
    2 
    3 /*-
    4  * Copyright (c) 1994-1998 Mark Brinicombe.
    5  * Copyright (c) 1994 Brini.
    6  * All rights reserved.
    7  *
    8  * This code is derived from software written for Brini by Mark Brinicombe
    9  *
   10  * Redistribution and use in source and binary forms, with or without
   11  * modification, are permitted provided that the following conditions
   12  * are met:
   13  * 1. Redistributions of source code must retain the above copyright
   14  *    notice, this list of conditions and the following disclaimer.
   15  * 2. Redistributions in binary form must reproduce the above copyright
   16  *    notice, this list of conditions and the following disclaimer in the
   17  *    documentation and/or other materials provided with the distribution.
   18  * 3. All advertising materials mentioning features or use of this software
   19  *    must display the following acknowledgement:
   20  *      This product includes software developed by Brini.
   21  * 4. The name of the company nor the name of the author may be used to
   22  *    endorse or promote products derived from this software without specific
   23  *    prior written permission.
   24  *
   25  * THIS SOFTWARE IS PROVIDED BY BRINI ``AS IS'' AND ANY EXPRESS OR IMPLIED
   26  * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
   27  * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
   28  * IN NO EVENT SHALL BRINI OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
   29  * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
   30  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
   31  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
   32  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
   33  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
   34  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
   35  * SUCH DAMAGE.
   36  *
   37  * RiscBSD kernel project
   38  *
   39  * machdep.c
   40  *
   41  * Machine dependant functions for kernel setup
   42  *
   43  * This file needs a lot of work.
   44  *
   45  * Created      : 17/09/94
   46  */
   47 
   48 #include <sys/cdefs.h>
   49 __FBSDID("$FreeBSD: releng/10.3/sys/arm/xscale/i80321/ep80219_machdep.c 278727 2015-02-13 22:32:02Z ian $");
   50 
   51 #define _ARM32_BUS_DMA_PRIVATE
   52 #include <sys/param.h>
   53 #include <sys/systm.h>
   54 #include <sys/sysproto.h>
   55 #include <sys/signalvar.h>
   56 #include <sys/imgact.h>
   57 #include <sys/kernel.h>
   58 #include <sys/ktr.h>
   59 #include <sys/linker.h>
   60 #include <sys/lock.h>
   61 #include <sys/malloc.h>
   62 #include <sys/mutex.h>
   63 #include <sys/pcpu.h>
   64 #include <sys/proc.h>
   65 #include <sys/ptrace.h>
   66 #include <sys/cons.h>
   67 #include <sys/bio.h>
   68 #include <sys/bus.h>
   69 #include <sys/buf.h>
   70 #include <sys/exec.h>
   71 #include <sys/kdb.h>
   72 #include <sys/msgbuf.h>
   73 #include <machine/reg.h>
   74 #include <machine/cpu.h>
   75 
   76 #include <vm/vm.h>
   77 #include <vm/pmap.h>
   78 #include <vm/vm_object.h>
   79 #include <vm/vm_page.h>
   80 #include <vm/vm_map.h>
   81 #include <machine/devmap.h>
   82 #include <machine/vmparam.h>
   83 #include <machine/pcb.h>
   84 #include <machine/undefined.h>
   85 #include <machine/machdep.h>
   86 #include <machine/metadata.h>
   87 #include <machine/armreg.h>
   88 #include <machine/bus.h>
   89 #include <machine/physmem.h>
   90 #include <sys/reboot.h>
   91 
   92 #include <arm/xscale/i80321/i80321reg.h>
   93 #include <arm/xscale/i80321/i80321var.h>
   94 #include <arm/xscale/i80321/iq80321reg.h>
   95 #include <arm/xscale/i80321/obiovar.h>
   96 
   97 #define KERNEL_PT_SYS           0       /* Page table for mapping proc0 zero page */
   98 #define KERNEL_PT_IOPXS         1
   99 #define KERNEL_PT_BEFOREKERN    2
  100 #define KERNEL_PT_AFKERNEL      3       /* L2 table for mapping after kernel */
  101 #define KERNEL_PT_AFKERNEL_NUM  9
  102 
  103 /* this should be evenly divisable by PAGE_SIZE / L2_TABLE_SIZE_REAL (or 4) */
  104 #define NUM_KERNEL_PTS          (KERNEL_PT_AFKERNEL + KERNEL_PT_AFKERNEL_NUM)
  105 
  106 struct pv_addr kernel_pt_table[NUM_KERNEL_PTS];
  107 
  108 /* Physical and virtual addresses for some global pages */
  109 
  110 struct pv_addr systempage;
  111 struct pv_addr msgbufpv;
  112 struct pv_addr irqstack;
  113 struct pv_addr undstack;
  114 struct pv_addr abtstack;
  115 struct pv_addr kernelstack;
  116 struct pv_addr minidataclean;
  117 
  118 
  119 /* #define IQ80321_OBIO_BASE 0xfe800000UL */
  120 /* #define IQ80321_OBIO_SIZE 0x00100000UL */
  121 
  122 /* Static device mappings. */
  123 static const struct arm_devmap_entry ep80219_devmap[] = {
  124         /*
  125          * Map the on-board devices VA == PA so that we can access them
  126          * with the MMU on or off.
  127          */
  128         {
  129                 IQ80321_OBIO_BASE,
  130                 IQ80321_OBIO_BASE,
  131                 IQ80321_OBIO_SIZE,
  132                 VM_PROT_READ|VM_PROT_WRITE,
  133                 PTE_DEVICE,
  134         },
  135         {
  136                 IQ80321_IOW_VBASE,
  137                 VERDE_OUT_XLATE_IO_WIN0_BASE,
  138                 VERDE_OUT_XLATE_IO_WIN_SIZE,
  139                 VM_PROT_READ|VM_PROT_WRITE,
  140                 PTE_DEVICE,
  141         },      
  142         {
  143                 IQ80321_80321_VBASE,
  144                 VERDE_PMMR_BASE,
  145                 VERDE_PMMR_SIZE,
  146                 VM_PROT_READ|VM_PROT_WRITE,
  147                 PTE_DEVICE,
  148         },
  149         {
  150                 0,
  151                 0,
  152                 0,
  153                 0,
  154                 0,
  155         }
  156 };
  157 
  158 extern vm_offset_t xscale_cache_clean_addr;
  159 
  160 void *
  161 initarm(struct arm_boot_params *abp)
  162 {
  163         struct pv_addr  kernel_l1pt;
  164         struct pv_addr  dpcpu;
  165         int loop, i;
  166         u_int l1pagetable;
  167         vm_offset_t freemempos;
  168         vm_offset_t freemem_pt;
  169         vm_offset_t afterkern;
  170         vm_offset_t freemem_after;
  171         vm_offset_t lastaddr;
  172         uint32_t memsize, memstart;
  173 
  174         lastaddr = parse_boot_param(abp);
  175         arm_physmem_kernaddr = abp->abp_physaddr;
  176         set_cpufuncs();
  177         pcpu_init(pcpup, 0, sizeof(struct pcpu));
  178         PCPU_SET(curthread, &thread0);
  179 
  180         /* Do basic tuning, hz etc */
  181         init_param1();
  182 
  183         freemempos = 0xa0200000;
  184         /* Define a macro to simplify memory allocation */
  185 #define valloc_pages(var, np)                   \
  186         alloc_pages((var).pv_pa, (np));         \
  187         (var).pv_va = (var).pv_pa + 0x20000000;
  188 
  189 #define alloc_pages(var, np)                    \
  190         freemempos -= (np * PAGE_SIZE);         \
  191         (var) = freemempos;             \
  192         memset((char *)(var), 0, ((np) * PAGE_SIZE));
  193 
  194         while (((freemempos - L1_TABLE_SIZE) & (L1_TABLE_SIZE - 1)) != 0)
  195                 freemempos -= PAGE_SIZE;
  196         valloc_pages(kernel_l1pt, L1_TABLE_SIZE / PAGE_SIZE);
  197         for (loop = 0; loop < NUM_KERNEL_PTS; ++loop) {
  198                 if (!(loop % (PAGE_SIZE / L2_TABLE_SIZE_REAL))) {
  199                         valloc_pages(kernel_pt_table[loop],
  200                             L2_TABLE_SIZE / PAGE_SIZE);
  201                 } else {
  202                         kernel_pt_table[loop].pv_pa = freemempos +
  203                             (loop % (PAGE_SIZE / L2_TABLE_SIZE_REAL)) *
  204                             L2_TABLE_SIZE_REAL;
  205                         kernel_pt_table[loop].pv_va =
  206                             kernel_pt_table[loop].pv_pa + 0x20000000;
  207                 }
  208         }
  209         freemem_pt = freemempos;
  210         freemempos = 0xa0100000;
  211         /*
  212          * Allocate a page for the system page mapped to V0x00000000
  213          * This page will just contain the system vectors and can be
  214          * shared by all processes.
  215          */
  216         valloc_pages(systempage, 1);
  217 
  218         /* Allocate dynamic per-cpu area. */
  219         valloc_pages(dpcpu, DPCPU_SIZE / PAGE_SIZE);
  220         dpcpu_init((void *)dpcpu.pv_va, 0);
  221 
  222         /* Allocate stacks for all modes */
  223         valloc_pages(irqstack, IRQ_STACK_SIZE);
  224         valloc_pages(abtstack, ABT_STACK_SIZE);
  225         valloc_pages(undstack, UND_STACK_SIZE);
  226         valloc_pages(kernelstack, KSTACK_PAGES);
  227         alloc_pages(minidataclean.pv_pa, 1);
  228         valloc_pages(msgbufpv, round_page(msgbufsize) / PAGE_SIZE);
  229         /*
  230          * Allocate memory for the l1 and l2 page tables. The scheme to avoid
  231          * wasting memory by allocating the l1pt on the first 16k memory was
  232          * taken from NetBSD rpc_machdep.c. NKPT should be greater than 12 for
  233          * this to work (which is supposed to be the case).
  234          */
  235 
  236         /*
  237          * Now we start construction of the L1 page table
  238          * We start by mapping the L2 page tables into the L1.
  239          * This means that we can replace L1 mappings later on if necessary
  240          */
  241         l1pagetable = kernel_l1pt.pv_va;
  242 
  243         /* Map the L2 pages tables in the L1 page table */
  244         pmap_link_l2pt(l1pagetable, ARM_VECTORS_HIGH & ~(0x00100000 - 1),
  245             &kernel_pt_table[KERNEL_PT_SYS]);
  246         pmap_link_l2pt(l1pagetable, IQ80321_IOPXS_VBASE,
  247             &kernel_pt_table[KERNEL_PT_IOPXS]);
  248         pmap_link_l2pt(l1pagetable, KERNBASE,
  249             &kernel_pt_table[KERNEL_PT_BEFOREKERN]);
  250         pmap_map_chunk(l1pagetable, KERNBASE, IQ80321_SDRAM_START, 0x100000,
  251             VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
  252         pmap_map_chunk(l1pagetable, KERNBASE + 0x100000, IQ80321_SDRAM_START + 0x100000,
  253             0x100000, VM_PROT_READ|VM_PROT_WRITE, PTE_PAGETABLE);
  254         pmap_map_chunk(l1pagetable, KERNBASE + 0x200000, IQ80321_SDRAM_START + 0x200000,
  255             (((uint32_t)(lastaddr) - KERNBASE - 0x200000) + L1_S_SIZE) & ~(L1_S_SIZE - 1),
  256             VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
  257         freemem_after = ((int)lastaddr + PAGE_SIZE) & ~(PAGE_SIZE - 1);
  258         afterkern = round_page(((vm_offset_t)lastaddr + L1_S_SIZE) & ~(L1_S_SIZE
  259             - 1));
  260         for (i = 0; i < KERNEL_PT_AFKERNEL_NUM; i++) {
  261                 pmap_link_l2pt(l1pagetable, afterkern + i * 0x00100000,
  262                     &kernel_pt_table[KERNEL_PT_AFKERNEL + i]);
  263         }
  264         pmap_map_entry(l1pagetable, afterkern, minidataclean.pv_pa,
  265             VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
  266         
  267 
  268         /* Map the Mini-Data cache clean area. */
  269         xscale_setup_minidata(l1pagetable, afterkern,
  270             minidataclean.pv_pa);
  271 
  272         /* Map the vector page. */
  273         pmap_map_entry(l1pagetable, ARM_VECTORS_HIGH, systempage.pv_pa,
  274             VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
  275         arm_devmap_bootstrap(l1pagetable, ep80219_devmap);
  276         /*
  277          * Give the XScale global cache clean code an appropriately
  278          * sized chunk of unmapped VA space starting at 0xff000000
  279          * (our device mappings end before this address).
  280          */
  281         xscale_cache_clean_addr = 0xff000000U;
  282 
  283         cpu_domains((DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL*2)) | DOMAIN_CLIENT);
  284         setttb(kernel_l1pt.pv_pa);
  285         cpu_tlb_flushID();
  286         cpu_domains(DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL*2));
  287         /*
  288          * Pages were allocated during the secondary bootstrap for the
  289          * stacks for different CPU modes.
  290          * We must now set the r13 registers in the different CPU modes to
  291          * point to these stacks.
  292          * Since the ARM stacks use STMFD etc. we must set r13 to the top end
  293          * of the stack memory.
  294          */
  295         set_stackptrs(0);
  296 
  297         /*
  298          * We must now clean the cache again....
  299          * Cleaning may be done by reading new data to displace any
  300          * dirty data in the cache. This will have happened in setttb()
  301          * but since we are boot strapping the addresses used for the read
  302          * may have just been remapped and thus the cache could be out
  303          * of sync. A re-clean after the switch will cure this.
  304          * After booting there are no gross relocations of the kernel thus
  305          * this problem will not occur after initarm().
  306          */
  307         cpu_idcache_wbinv_all();
  308         cpu_setup("");
  309 
  310         /*
  311          * Fetch the SDRAM start/size from the i80321 SDRAM configration
  312          * registers.
  313          */
  314         i80321_calibrate_delay();
  315         i80321_sdram_bounds(obio_bs_tag, IQ80321_80321_VBASE + VERDE_MCU_BASE,
  316             &memstart, &memsize);
  317         physmem = memsize / PAGE_SIZE;
  318         cninit();
  319 
  320         undefined_init();
  321                                 
  322         init_proc0(kernelstack.pv_va);
  323         
  324         /* Enable MMU, I-cache, D-cache, write buffer. */
  325 
  326         arm_vector_init(ARM_VECTORS_HIGH, ARM_VEC_ALL);
  327         vm_max_kernel_address = 0xd0000000;
  328         pmap_bootstrap(pmap_curmaxkvaddr, &kernel_l1pt);
  329         msgbufp = (void*)msgbufpv.pv_va;
  330         msgbufinit(msgbufp, msgbufsize);
  331         mutex_init();
  332         
  333         /*
  334          * Add the physical ram we have available.
  335          *
  336          * Exclude the kernel (and all the things we allocated which immediately
  337          * follow the kernel) from the VM allocation pool but not from crash
  338          * dumps.  virtual_avail is a global variable which tracks the kva we've
  339          * "allocated" while setting up pmaps.
  340          *
  341          * Prepare the list of physical memory available to the vm subsystem.
  342          */
  343         arm_physmem_hardware_region(IQ80321_SDRAM_START, memsize);
  344         arm_physmem_exclude_region(abp->abp_physaddr, 
  345             virtual_avail - KERNVIRTADDR, EXFLAG_NOALLOC);
  346         arm_physmem_init_kernel_globals();
  347 
  348         init_param2(physmem);
  349         kdb_init();
  350         return ((void *)(kernelstack.pv_va + USPACE_SVC_STACK_TOP -
  351             sizeof(struct pcb)));
  352 }
  353 
  354 extern int
  355 machdep_pci_route_interrupt(device_t pcib, device_t dev, int pin)
  356 {
  357         int bus;
  358         int device;
  359         int func;
  360         uint32_t busno;
  361         struct i80321_pci_softc *sc = device_get_softc(pcib);
  362         bus = pci_get_bus(dev);
  363         device = pci_get_slot(dev);
  364         func = pci_get_function(dev);
  365         busno = bus_space_read_4(sc->sc_st, sc->sc_atu_sh, ATU_PCIXSR);
  366         busno = PCIXSR_BUSNO(busno);
  367         if (busno == 0xff)
  368                 busno = 0;
  369         if (bus != busno)
  370                 goto no_mapping;
  371         switch (device) {
  372                 /* EP80219 PCI */
  373         case 1: /* Ethernet i82555 10/100 */
  374                 printf("Device %d routed to irq %d\n", device, ICU_INT_XINT(0));
  375                 return (ICU_INT_XINT(0));
  376         case 2: /* UART */
  377                 printf("Device %d routed to irq %d\n", device, ICU_INT_XINT(1));
  378                 return (ICU_INT_XINT(1));
  379         case 3:
  380                 /*
  381                  * The S-ATA chips are behind the bridge, and all of
  382                  * the S-ATA interrupts are wired together.
  383                  */
  384                 printf("Device %d routed to irq %d\n", device, ICU_INT_XINT(2));
  385                 return (ICU_INT_XINT(2));
  386         case 4: /* MINI-PIC_INT */
  387                 printf("Device %d routed to irq %d\n", device, ICU_INT_XINT(3));
  388                 return( ICU_INT_XINT(3));
  389         default:
  390 no_mapping:
  391                 printf("No mapping for %d/%d/%d/%c\n", bus, device, func, pin);
  392                 
  393         }
  394         return (0);
  395 
  396 }

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