The Design and Implementation of the FreeBSD Operating System, Second Edition
Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)


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FreeBSD/Linux Kernel Cross Reference
sys/arm/xscale/i80321/i80321_intr.h

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    1 /*      $NetBSD: i80321_intr.h,v 1.5 2004/01/12 10:25:06 scw Exp $      */
    2 
    3 /*-
    4  * Copyright (c) 2001, 2002 Wasabi Systems, Inc.
    5  * All rights reserved.
    6  *
    7  * Written by Jason R. Thorpe for Wasabi Systems, Inc.
    8  *
    9  * Redistribution and use in source and binary forms, with or without
   10  * modification, are permitted provided that the following conditions
   11  * are met:
   12  * 1. Redistributions of source code must retain the above copyright
   13  *    notice, this list of conditions and the following disclaimer.
   14  * 2. Redistributions in binary form must reproduce the above copyright
   15  *    notice, this list of conditions and the following disclaimer in the
   16  *    documentation and/or other materials provided with the distribution.
   17  * 3. All advertising materials mentioning features or use of this software
   18  *    must display the following acknowledgement:
   19  *      This product includes software developed for the NetBSD Project by
   20  *      Wasabi Systems, Inc.
   21  * 4. The name of Wasabi Systems, Inc. may not be used to endorse
   22  *    or promote products derived from this software without specific prior
   23  *    written permission.
   24  *
   25  * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
   26  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
   27  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
   28  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL WASABI SYSTEMS, INC
   29  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
   30  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
   31  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
   32  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
   33  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
   34  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
   35  * POSSIBILITY OF SUCH DAMAGE.
   36  * 
   37  * $FreeBSD: releng/6.1/sys/arm/xscale/i80321/i80321_intr.h 139735 2005-01-05 21:58:49Z imp $
   38  *
   39  */
   40 
   41 #ifndef _I80321_INTR_H_
   42 #define _I80321_INTR_H_
   43 
   44 #define ARM_IRQ_HANDLER _C_LABEL(i80321_intr_dispatch)
   45 
   46 #ifndef _LOCORE
   47 
   48 #include <machine/armreg.h>
   49 #include <machine/cpufunc.h>
   50 
   51 #include <arm/xscale/i80321/i80321reg.h>
   52 
   53 void i80321_do_pending(void);
   54 
   55 extern __volatile uint32_t intr_enabled;
   56 extern uint32_t intr_steer;
   57 
   58 static __inline void __attribute__((__unused__))
   59 i80321_set_intrmask(void)
   60 {
   61 
   62         __asm __volatile("mcr p6, 0, %0, c0, c0, 0"
   63                 :
   64                 : "r" (intr_enabled & ICU_INT_HWMASK));
   65 }
   66 
   67 static __inline void
   68 i80321_set_intrsteer(void)
   69 {
   70 
   71         __asm __volatile("mcr p6, 0, %0, c4, c0, 0"
   72             :
   73             : "r" (intr_steer & ICU_INT_HWMASK));
   74 }
   75 
   76 #define INT_SWMASK                                                      \
   77         ((1U << ICU_INT_bit26) | (1U << ICU_INT_bit22) |                \
   78          (1U << ICU_INT_bit5)  | (1U << ICU_INT_bit4))
   79 
   80 #if 0
   81 static __inline void __attribute__((__unused__))
   82 i80321_splx(int new)
   83 {
   84         extern __volatile uint32_t intr_enabled;
   85         extern __volatile int current_spl_level;
   86         extern __volatile int i80321_ipending;
   87         extern void i80321_do_pending(void);
   88         int oldirqstate, hwpend;
   89 
   90         /* Don't let the compiler re-order this code with preceding code */
   91         __insn_barrier();
   92 
   93         current_spl_level = new;
   94 
   95         hwpend = (i80321_ipending & ICU_INT_HWMASK) & ~new;
   96         if (hwpend != 0) {
   97                 oldirqstate = disable_interrupts(I32_bit);
   98                 intr_enabled |= hwpend;
   99                 i80321_set_intrmask();
  100                 restore_interrupts(oldirqstate);
  101         }
  102 
  103         if ((i80321_ipending & INT_SWMASK) & ~new)
  104                 i80321_do_pending();
  105 }
  106 
  107 static __inline int __attribute__((__unused__))
  108 i80321_splraise(int ipl)
  109 {
  110         extern __volatile int current_spl_level;
  111         extern int i80321_imask[];
  112         int     old;
  113 
  114         old = current_spl_level;
  115         current_spl_level |= i80321_imask[ipl];
  116 
  117         /* Don't let the compiler re-order this code with subsequent code */
  118         __insn_barrier();
  119 
  120         return (old);
  121 }
  122 
  123 static __inline int __attribute__((__unused__))
  124 i80321_spllower(int ipl)
  125 {
  126         extern __volatile int current_spl_level;
  127         extern int i80321_imask[];
  128         int old = current_spl_level;
  129 
  130         i80321_splx(i80321_imask[ipl]);
  131         return(old);
  132 }
  133 
  134 #endif
  135 #if !defined(EVBARM_SPL_NOINLINE)
  136 
  137 #define splx(new)               i80321_splx(new)
  138 #define _spllower(ipl)          i80321_spllower(ipl)
  139 #define _splraise(ipl)          i80321_splraise(ipl)
  140 void    _setsoftintr(int);
  141 
  142 #else
  143 
  144 int     _splraise(int);
  145 int     _spllower(int);
  146 void    splx(int);
  147 void    _setsoftintr(int);
  148 
  149 #endif /* ! EVBARM_SPL_NOINLINE */
  150 
  151 #endif /* _LOCORE */
  152 
  153 #endif /* _I80321_INTR_H_ */

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