1 /* $NetBSD: hpc_machdep.c,v 1.70 2003/09/16 08:18:22 agc Exp $ */
2
3 /*-
4 * Copyright (c) 1994-1998 Mark Brinicombe.
5 * Copyright (c) 1994 Brini.
6 * All rights reserved.
7 *
8 * This code is derived from software written for Brini by Mark Brinicombe
9 *
10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions
12 * are met:
13 * 1. Redistributions of source code must retain the above copyright
14 * notice, this list of conditions and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright
16 * notice, this list of conditions and the following disclaimer in the
17 * documentation and/or other materials provided with the distribution.
18 * 3. All advertising materials mentioning features or use of this software
19 * must display the following acknowledgement:
20 * This product includes software developed by Brini.
21 * 4. The name of the company nor the name of the author may be used to
22 * endorse or promote products derived from this software without specific
23 * prior written permission.
24 *
25 * THIS SOFTWARE IS PROVIDED BY BRINI ``AS IS'' AND ANY EXPRESS OR IMPLIED
26 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
27 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
28 * IN NO EVENT SHALL BRINI OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
29 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
30 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
31 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
32 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
33 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
34 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
35 * SUCH DAMAGE.
36 *
37 * RiscBSD kernel project
38 *
39 * machdep.c
40 *
41 * Machine dependant functions for kernel setup
42 *
43 * This file needs a lot of work.
44 *
45 * Created : 17/09/94
46 */
47
48 #include "opt_msgbuf.h"
49 #include "opt_ddb.h"
50
51 #include <sys/cdefs.h>
52 __FBSDID("$FreeBSD$");
53
54 #define _ARM32_BUS_DMA_PRIVATE
55 #include <sys/param.h>
56 #include <sys/systm.h>
57 #include <sys/sysproto.h>
58 #include <sys/signalvar.h>
59 #include <sys/imgact.h>
60 #include <sys/kernel.h>
61 #include <sys/ktr.h>
62 #include <sys/linker.h>
63 #include <sys/lock.h>
64 #include <sys/malloc.h>
65 #include <sys/mutex.h>
66 #include <sys/pcpu.h>
67 #include <sys/proc.h>
68 #include <sys/ptrace.h>
69 #include <sys/cons.h>
70 #include <sys/bio.h>
71 #include <sys/bus.h>
72 #include <sys/buf.h>
73 #include <sys/exec.h>
74 #include <sys/kdb.h>
75 #include <sys/msgbuf.h>
76 #include <machine/reg.h>
77 #include <machine/cpu.h>
78
79 #include <vm/vm.h>
80 #include <vm/pmap.h>
81 #include <vm/vm_object.h>
82 #include <vm/vm_page.h>
83 #include <vm/vm_pager.h>
84 #include <vm/vm_map.h>
85 #include <vm/vnode_pager.h>
86 #include <machine/pmap.h>
87 #include <machine/vmparam.h>
88 #include <machine/pcb.h>
89 #include <machine/undefined.h>
90 #include <machine/machdep.h>
91 #include <machine/metadata.h>
92 #include <machine/armreg.h>
93 #include <machine/bus.h>
94 #include <sys/reboot.h>
95
96 #include <arm/xscale/i80321/i80321reg.h>
97 #include <arm/xscale/i80321/i80321var.h>
98 #include <arm/xscale/i80321/iq80321reg.h>
99 #include <arm/xscale/i80321/obiovar.h>
100
101 #define KERNEL_PT_SYS 0 /* Page table for mapping proc0 zero page */
102 #define KERNEL_PT_IOPXS 1
103 #define KERNEL_PT_BEFOREKERN 2
104 #define KERNEL_PT_AFKERNEL 3 /* L2 table for mapping after kernel */
105 #define KERNEL_PT_AFKERNEL_NUM 9
106
107 /* this should be evenly divisable by PAGE_SIZE / L2_TABLE_SIZE_REAL (or 4) */
108 #define NUM_KERNEL_PTS (KERNEL_PT_AFKERNEL + KERNEL_PT_AFKERNEL_NUM)
109
110 /* Define various stack sizes in pages */
111 #define IRQ_STACK_SIZE 1
112 #define ABT_STACK_SIZE 1
113 #ifdef IPKDB
114 #define UND_STACK_SIZE 2
115 #else
116 #define UND_STACK_SIZE 1
117 #endif
118
119 extern u_int data_abort_handler_address;
120 extern u_int prefetch_abort_handler_address;
121 extern u_int undefined_handler_address;
122
123 struct pv_addr kernel_pt_table[NUM_KERNEL_PTS];
124
125 extern void *_end;
126
127 extern int *end;
128
129 struct pcpu __pcpu;
130 struct pcpu *pcpup = &__pcpu;
131
132 /* Physical and virtual addresses for some global pages */
133
134 vm_paddr_t phys_avail[10];
135 vm_paddr_t dump_avail[4];
136 vm_offset_t physical_pages;
137 vm_offset_t clean_sva, clean_eva;
138
139 struct pv_addr systempage;
140 struct pv_addr msgbufpv;
141 struct pv_addr irqstack;
142 struct pv_addr undstack;
143 struct pv_addr abtstack;
144 struct pv_addr kernelstack;
145 struct pv_addr minidataclean;
146
147 static struct trapframe proc0_tf;
148
149 #define IQ80321_OBIO_BASE 0xfe800000UL
150 #define IQ80321_OBIO_SIZE 0x00100000UL
151 /* Static device mappings. */
152 static const struct pmap_devmap iq80321_devmap[] = {
153 /*
154 * Map the on-board devices VA == PA so that we can access them
155 * with the MMU on or off.
156 */
157 {
158 IQ80321_OBIO_BASE,
159 IQ80321_OBIO_BASE,
160 IQ80321_OBIO_SIZE,
161 VM_PROT_READ|VM_PROT_WRITE,
162 PTE_NOCACHE,
163 },
164 {
165 IQ80321_IOW_VBASE,
166 VERDE_OUT_XLATE_IO_WIN0_BASE,
167 VERDE_OUT_XLATE_IO_WIN_SIZE,
168 VM_PROT_READ|VM_PROT_WRITE,
169 PTE_NOCACHE,
170 },
171
172 {
173 IQ80321_80321_VBASE,
174 VERDE_PMMR_BASE,
175 VERDE_PMMR_SIZE,
176 VM_PROT_READ|VM_PROT_WRITE,
177 PTE_NOCACHE,
178 },
179 {
180 0,
181 0,
182 0,
183 0,
184 0,
185 }
186 };
187
188 #define SDRAM_START 0xa0000000
189
190 #ifdef DDB
191 extern vm_offset_t ksym_start, ksym_end;
192 #endif
193
194 extern vm_offset_t xscale_cache_clean_addr;
195
196 void *
197 initarm(void *arg, void *arg2)
198 {
199 struct pv_addr kernel_l1pt;
200 int loop;
201 u_int l1pagetable;
202 vm_offset_t freemempos;
203 vm_offset_t freemem_pt;
204 vm_offset_t afterkern;
205 vm_offset_t freemem_after;
206 vm_offset_t lastaddr;
207 #ifdef DDB
208 vm_offset_t zstart = 0, zend = 0;
209 #endif
210 int i;
211 uint32_t fake_preload[35];
212 uint32_t memsize, memstart;
213
214 i = 0;
215
216 set_cpufuncs();
217 fake_preload[i++] = MODINFO_NAME;
218 fake_preload[i++] = strlen("elf kernel") + 1;
219 strcpy((char*)&fake_preload[i++], "elf kernel");
220 i += 2;
221 fake_preload[i++] = MODINFO_TYPE;
222 fake_preload[i++] = strlen("elf kernel") + 1;
223 strcpy((char*)&fake_preload[i++], "elf kernel");
224 i += 2;
225 fake_preload[i++] = MODINFO_ADDR;
226 fake_preload[i++] = sizeof(vm_offset_t);
227 fake_preload[i++] = KERNBASE + 0x00200000;
228 fake_preload[i++] = MODINFO_SIZE;
229 fake_preload[i++] = sizeof(uint32_t);
230 fake_preload[i++] = (uint32_t)&end - KERNBASE - 0x00200000;
231 #ifdef DDB
232 if (*(uint32_t *)KERNVIRTADDR == MAGIC_TRAMP_NUMBER) {
233 fake_preload[i++] = MODINFO_METADATA|MODINFOMD_SSYM;
234 fake_preload[i++] = sizeof(vm_offset_t);
235 fake_preload[i++] = *(uint32_t *)(KERNVIRTADDR + 4);
236 fake_preload[i++] = MODINFO_METADATA|MODINFOMD_ESYM;
237 fake_preload[i++] = sizeof(vm_offset_t);
238 fake_preload[i++] = *(uint32_t *)(KERNVIRTADDR + 8);
239 lastaddr = *(uint32_t *)(KERNVIRTADDR + 8);
240 zend = lastaddr;
241 zstart = *(uint32_t *)(KERNVIRTADDR + 4);
242 ksym_start = zstart;
243 ksym_end = zend;
244 } else
245 #endif
246 lastaddr = (vm_offset_t)&end;
247
248 fake_preload[i++] = 0;
249 fake_preload[i] = 0;
250 preload_metadata = (void *)fake_preload;
251
252
253 pcpu_init(pcpup, 0, sizeof(struct pcpu));
254 PCPU_SET(curthread, &thread0);
255
256 #define KERNEL_TEXT_BASE (KERNBASE + 0x00200000)
257 freemempos = 0xa0200000;
258 /* Define a macro to simplify memory allocation */
259 #define valloc_pages(var, np) \
260 alloc_pages((var).pv_pa, (np)); \
261 (var).pv_va = (var).pv_pa + 0x20000000;
262
263 #define alloc_pages(var, np) \
264 freemempos -= (np * PAGE_SIZE); \
265 (var) = freemempos; \
266 memset((char *)(var), 0, ((np) * PAGE_SIZE));
267
268 while (((freemempos - L1_TABLE_SIZE) & (L1_TABLE_SIZE - 1)) != 0)
269 freemempos -= PAGE_SIZE;
270 valloc_pages(kernel_l1pt, L1_TABLE_SIZE / PAGE_SIZE);
271 for (loop = 0; loop < NUM_KERNEL_PTS; ++loop) {
272 if (!(loop % (PAGE_SIZE / L2_TABLE_SIZE_REAL))) {
273 valloc_pages(kernel_pt_table[loop],
274 L2_TABLE_SIZE / PAGE_SIZE);
275 } else {
276 kernel_pt_table[loop].pv_pa = freemempos +
277 (loop % (PAGE_SIZE / L2_TABLE_SIZE_REAL)) *
278 L2_TABLE_SIZE_REAL;
279 kernel_pt_table[loop].pv_va =
280 kernel_pt_table[loop].pv_pa + 0x20000000;
281 }
282 }
283 freemem_pt = freemempos;
284 freemempos = 0xa0100000;
285 /*
286 * Allocate a page for the system page mapped to V0x00000000
287 * This page will just contain the system vectors and can be
288 * shared by all processes.
289 */
290 valloc_pages(systempage, 1);
291
292 /* Allocate stacks for all modes */
293 valloc_pages(irqstack, IRQ_STACK_SIZE);
294 valloc_pages(abtstack, ABT_STACK_SIZE);
295 valloc_pages(undstack, UND_STACK_SIZE);
296 valloc_pages(kernelstack, KSTACK_PAGES);
297 alloc_pages(minidataclean.pv_pa, 1);
298 valloc_pages(msgbufpv, round_page(MSGBUF_SIZE) / PAGE_SIZE);
299 #ifdef ARM_USE_SMALL_ALLOC
300 freemempos -= PAGE_SIZE;
301 freemem_pt = trunc_page(freemem_pt);
302 freemem_after = freemempos - ((freemem_pt - 0xa0100000) /
303 PAGE_SIZE) * sizeof(struct arm_small_page);
304 arm_add_smallalloc_pages((void *)(freemem_after + 0x20000000)
305 , (void *)0xc0100000, freemem_pt - 0xa0100000, 1);
306 freemem_after -= ((freemem_after - 0xa0001000) / PAGE_SIZE) *
307 sizeof(struct arm_small_page);
308 arm_add_smallalloc_pages((void *)(freemem_after + 0x20000000)
309 , (void *)0xc0001000, trunc_page(freemem_after) - 0xa0001000, 0);
310 freemempos = trunc_page(freemem_after);
311 freemempos -= PAGE_SIZE;
312 #endif
313 /*
314 * Allocate memory for the l1 and l2 page tables. The scheme to avoid
315 * wasting memory by allocating the l1pt on the first 16k memory was
316 * taken from NetBSD rpc_machdep.c. NKPT should be greater than 12 for
317 * this to work (which is supposed to be the case).
318 */
319
320 /*
321 * Now we start construction of the L1 page table
322 * We start by mapping the L2 page tables into the L1.
323 * This means that we can replace L1 mappings later on if necessary
324 */
325 l1pagetable = kernel_l1pt.pv_va;
326
327 /* Map the L2 pages tables in the L1 page table */
328 pmap_link_l2pt(l1pagetable, ARM_VECTORS_HIGH & ~(0x00100000 - 1),
329 &kernel_pt_table[KERNEL_PT_SYS]);
330 pmap_link_l2pt(l1pagetable, IQ80321_IOPXS_VBASE,
331 &kernel_pt_table[KERNEL_PT_IOPXS]);
332 pmap_link_l2pt(l1pagetable, KERNBASE,
333 &kernel_pt_table[KERNEL_PT_BEFOREKERN]);
334 pmap_map_chunk(l1pagetable, KERNBASE, SDRAM_START, 0x100000,
335 VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
336 pmap_map_chunk(l1pagetable, KERNBASE + 0x100000, SDRAM_START + 0x100000,
337 0x100000, VM_PROT_READ|VM_PROT_WRITE, PTE_PAGETABLE);
338 pmap_map_chunk(l1pagetable, KERNBASE + 0x200000, SDRAM_START + 0x200000,
339 (((uint32_t)(lastaddr) - KERNBASE - 0x200000) + L1_S_SIZE) & ~(L1_S_SIZE - 1),
340 VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
341 freemem_after = ((int)lastaddr + PAGE_SIZE) & ~(PAGE_SIZE - 1);
342 afterkern = round_page(((vm_offset_t)lastaddr + L1_S_SIZE) & ~(L1_S_SIZE
343 - 1));
344 for (i = 0; i < KERNEL_PT_AFKERNEL_NUM; i++) {
345 pmap_link_l2pt(l1pagetable, afterkern + i * 0x00100000,
346 &kernel_pt_table[KERNEL_PT_AFKERNEL + i]);
347 }
348 pmap_map_entry(l1pagetable, afterkern, minidataclean.pv_pa,
349 VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
350
351
352 #ifdef ARM_USE_SMALL_ALLOC
353 if ((freemem_after + 2 * PAGE_SIZE) <= afterkern) {
354 arm_add_smallalloc_pages((void *)(freemem_after),
355 (void*)(freemem_after + PAGE_SIZE),
356 afterkern - (freemem_after + PAGE_SIZE), 0);
357
358 }
359 #endif
360
361 /* Map the Mini-Data cache clean area. */
362 xscale_setup_minidata(l1pagetable, afterkern,
363 minidataclean.pv_pa);
364
365 /* Map the vector page. */
366 pmap_map_entry(l1pagetable, ARM_VECTORS_HIGH, systempage.pv_pa,
367 VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
368 pmap_devmap_bootstrap(l1pagetable, iq80321_devmap);
369 /*
370 * Give the XScale global cache clean code an appropriately
371 * sized chunk of unmapped VA space starting at 0xff000000
372 * (our device mappings end before this address).
373 */
374 xscale_cache_clean_addr = 0xff000000U;
375
376 cpu_domains((DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL*2)) | DOMAIN_CLIENT);
377 setttb(kernel_l1pt.pv_pa);
378 cpu_tlb_flushID();
379 cpu_domains(DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL*2));
380 /*
381 * Pages were allocated during the secondary bootstrap for the
382 * stacks for different CPU modes.
383 * We must now set the r13 registers in the different CPU modes to
384 * point to these stacks.
385 * Since the ARM stacks use STMFD etc. we must set r13 to the top end
386 * of the stack memory.
387 */
388
389
390 set_stackptr(PSR_IRQ32_MODE,
391 irqstack.pv_va + IRQ_STACK_SIZE * PAGE_SIZE);
392 set_stackptr(PSR_ABT32_MODE,
393 abtstack.pv_va + ABT_STACK_SIZE * PAGE_SIZE);
394 set_stackptr(PSR_UND32_MODE,
395 undstack.pv_va + UND_STACK_SIZE * PAGE_SIZE);
396
397
398
399 /*
400 * We must now clean the cache again....
401 * Cleaning may be done by reading new data to displace any
402 * dirty data in the cache. This will have happened in setttb()
403 * but since we are boot strapping the addresses used for the read
404 * may have just been remapped and thus the cache could be out
405 * of sync. A re-clean after the switch will cure this.
406 * After booting there are no gross reloations of the kernel thus
407 * this problem will not occur after initarm().
408 */
409 cpu_idcache_wbinv_all();
410 /*
411 * Fetch the SDRAM start/size from the i80321 SDRAM configration
412 * registers.
413 */
414 i80321_calibrate_delay();
415 i80321_sdram_bounds(&obio_bs_tag, IQ80321_80321_VBASE + VERDE_MCU_BASE,
416 &memstart, &memsize);
417 physmem = memsize / PAGE_SIZE;
418 cninit();
419
420 /* Set stack for exception handlers */
421
422 data_abort_handler_address = (u_int)data_abort_handler;
423 prefetch_abort_handler_address = (u_int)prefetch_abort_handler;
424 undefined_handler_address = (u_int)undefinedinstruction_bounce;
425 undefined_init();
426
427 proc_linkup0(&proc0, &thread0);
428 thread0.td_kstack = kernelstack.pv_va;
429 thread0.td_pcb = (struct pcb *)
430 (thread0.td_kstack + KSTACK_PAGES * PAGE_SIZE) - 1;
431 thread0.td_pcb->pcb_flags = 0;
432 thread0.td_frame = &proc0_tf;
433 pcpup->pc_curpcb = thread0.td_pcb;
434
435 /* Enable MMU, I-cache, D-cache, write buffer. */
436
437 arm_vector_init(ARM_VECTORS_HIGH, ARM_VEC_ALL);
438
439
440
441 pmap_curmaxkvaddr = afterkern + PAGE_SIZE;
442 /*
443 * ARM_USE_SMALL_ALLOC uses dump_avail, so it must be filled before
444 * calling pmap_bootstrap.
445 */
446 dump_avail[0] = 0xa0000000;
447 dump_avail[1] = 0xa0000000 + memsize;
448 dump_avail[2] = 0;
449 dump_avail[3] = 0;
450
451 pmap_bootstrap(pmap_curmaxkvaddr,
452 0xd0000000, &kernel_l1pt);
453 msgbufp = (void*)msgbufpv.pv_va;
454 msgbufinit(msgbufp, MSGBUF_SIZE);
455 mutex_init();
456
457 i = 0;
458 #ifdef ARM_USE_SMALL_ALLOC
459 phys_avail[i++] = 0xa0000000;
460 phys_avail[i++] = 0xa0001000; /*
461 *XXX: Gross hack to get our
462 * pages in the vm_page_array
463 . */
464 #endif
465 phys_avail[i++] = round_page(virtual_avail - KERNBASE + SDRAM_START);
466 phys_avail[i++] = trunc_page(0xa0000000 + memsize - 1);
467 phys_avail[i++] = 0;
468 phys_avail[i] = 0;
469
470 /* Do basic tuning, hz etc */
471 init_param1();
472 init_param2(physmem);
473 kdb_init();
474 return ((void *)(kernelstack.pv_va + USPACE_SVC_STACK_TOP -
475 sizeof(struct pcb)));
476 }
477
478
479 extern int
480 machdep_pci_route_interrupt(device_t pcib, device_t dev, int pin)
481 {
482 int bus;
483 int device;
484 int func;
485 uint32_t busno;
486 struct i80321_pci_softc *sc = device_get_softc(pcib);
487 bus = pci_get_bus(dev);
488 device = pci_get_slot(dev);
489 func = pci_get_function(dev);
490 busno = bus_space_read_4(sc->sc_st, sc->sc_atu_sh, ATU_PCIXSR);
491 busno = PCIXSR_BUSNO(busno);
492 if (busno == 0xff)
493 busno = 0;
494 if (bus != busno)
495 goto no_mapping;
496 switch (device) {
497 /* IQ31244 PCI */
498 case 1: /* PCIX-PCIX bridge */
499 /*
500 * The S-ATA chips are behind the bridge, and all of
501 * the S-ATA interrupts are wired together.
502 */
503 return (ICU_INT_XINT(2));
504 case 2: /* PCI slot */
505 /* All pins are wired together. */
506 return (ICU_INT_XINT(3));
507 case 3: /* i82546 dual Gig-E */
508 if (pin == 1 || pin == 2)
509 return (ICU_INT_XINT(0));
510 goto no_mapping;
511 /* IQ80321 PCI */
512 case 4: /* i82544 Gig-E */
513 case 8: /*
514 * Apparently you can set the device for the ethernet adapter
515 * to 8 with a jumper, so handle that as well
516 */
517 if (pin == 1)
518 return (ICU_INT_XINT(0));
519 goto no_mapping;
520 case 6: /* S-PCI-X slot */
521 if (pin == 1)
522 return (ICU_INT_XINT(2));
523 if (pin == 2)
524 return (ICU_INT_XINT(3));
525 goto no_mapping;
526 default:
527 no_mapping:
528 printf("No mapping for %d/%d/%d/%c\n", bus, device, func, pin);
529
530 }
531 return (0);
532
533 }
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