The Design and Implementation of the FreeBSD Operating System, Second Edition
Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)


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FreeBSD/Linux Kernel Cross Reference
sys/arm/xscale/i80321/iq80321reg.h

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    1 /*      $NetBSD: iq80321reg.h,v 1.4 2003/05/14 19:46:39 thorpej Exp $   */
    2 
    3 /*-
    4  * Copyright (c) 2002 Wasabi Systems, Inc.
    5  * All rights reserved.
    6  *
    7  * Written by Jason R. Thorpe for Wasabi Systems, Inc.
    8  *
    9  * Redistribution and use in source and binary forms, with or without
   10  * modification, are permitted provided that the following conditions
   11  * are met:
   12  * 1. Redistributions of source code must retain the above copyright
   13  *    notice, this list of conditions and the following disclaimer.
   14  * 2. Redistributions in binary form must reproduce the above copyright
   15  *    notice, this list of conditions and the following disclaimer in the
   16  *    documentation and/or other materials provided with the distribution.
   17  * 3. All advertising materials mentioning features or use of this software
   18  *    must display the following acknowledgement:
   19  *      This product includes software developed for the NetBSD Project by
   20  *      Wasabi Systems, Inc.
   21  * 4. The name of Wasabi Systems, Inc. may not be used to endorse
   22  *    or promote products derived from this software without specific prior
   23  *    written permission.
   24  *
   25  * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
   26  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
   27  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
   28  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL WASABI SYSTEMS, INC
   29  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
   30  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
   31  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
   32  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
   33  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
   34  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
   35  * POSSIBILITY OF SUCH DAMAGE.
   36  *
   37  * $FreeBSD: releng/7.4/sys/arm/xscale/i80321/iq80321reg.h 161592 2006-08-24 23:51:28Z cognet $
   38  *
   39  */
   40 
   41 #ifndef _IQ80321REG_H_
   42 #define _IQ80321REG_H_
   43 
   44 /*
   45  * Memory map and register definitions for the Intel IQ80321
   46  * Evaluation Board.
   47  */
   48 
   49 /*
   50  * The memory map of the IQ80321 looks like so:
   51  *
   52  *           ------------------------------
   53  *              Intel 80321 IOP Reserved
   54  * FFFF E900 ------------------------------
   55  *              Peripheral Memory Mapped
   56  *                  Registers
   57  * FFFF E000 ------------------------------
   58  *              On-board devices
   59  * FE80 0000 ------------------------------
   60  *              SDRAM
   61  * A000 0000 ------------------------------
   62  *              Reserved
   63  * 9100 0000 ------------------------------
   64  *              Flash
   65  * 9080 0000 ------------------------------
   66  *              Reserved
   67  * 9002 0000 ------------------------------
   68  *              ATU Outbound Transaction
   69  *                  Windows
   70  * 8000 0000 ------------------------------
   71  *              ATU Outbound Direct
   72  *                  Addressing Windows
   73  * 0000 1000 ------------------------------
   74  *              Initialization Boot Code
   75  *                  from Flash
   76  * 0000 0000 ------------------------------
   77  */
   78 
   79 /*
   80  * We allocate a page table for VA 0xfe400000 (4MB) and map the
   81  * PCI I/O space (64K) and i80321 memory-mapped registers (4K) there.
   82  */
   83 #define IQ80321_IOPXS_VBASE     0xfe400000UL
   84 #define IQ80321_IOW_VBASE       IQ80321_IOPXS_VBASE
   85 #define IQ80321_80321_VBASE     (IQ80321_IOW_VBASE +                    \
   86                                  VERDE_OUT_XLATE_IO_WIN_SIZE)
   87 
   88 #define IQ80321_SDRAM_START     0xa0000000
   89 /*
   90  * The IQ80321 on-board devices are mapped VA==PA during bootstrap.
   91  * Conveniently, the size of the on-board register space is 1 section
   92  * mapping.
   93  */
   94 #define IQ80321_OBIO_BASE       0xfe800000UL
   95 #define IQ80321_OBIO_SIZE       0x00100000UL    /* 1MB */
   96 
   97 #define IQ80321_UART1           0xfe800000UL    /* TI 16550 */
   98 
   99 #if defined( CPU_XSCALE_80321 )
  100 #define IQ80321_7SEG_MSB        0xfe840000UL
  101 #define IQ80321_7SEG_LSB        0xfe850000UL
  102 
  103 #define IQ80321_ROT_SWITCH      0xfe8d0000UL
  104 
  105 #define IQ80321_BATTERY_STAT    0xfe8f0000UL
  106 #define BATTERY_STAT_PRES       (1U << 0)
  107 #define BATTERY_STAT_CHRG       (1U << 1)
  108 #define BATTERY_STAT_DISCHRG    (1U << 2)
  109 #endif /* CPU_XSCALE_80321 */
  110 
  111 #endif /* _IQ80321REG_H_ */

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