The Design and Implementation of the FreeBSD Operating System, Second Edition
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FreeBSD/Linux Kernel Cross Reference
sys/arm/xscale/ixp425/avila_machdep.c

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    1 /*      $NetBSD: hpc_machdep.c,v 1.70 2003/09/16 08:18:22 agc Exp $     */
    2 
    3 /*-
    4  * Copyright (c) 1994-1998 Mark Brinicombe.
    5  * Copyright (c) 1994 Brini.
    6  * All rights reserved.
    7  *
    8  * This code is derived from software written for Brini by Mark Brinicombe
    9  *
   10  * Redistribution and use in source and binary forms, with or without
   11  * modification, are permitted provided that the following conditions
   12  * are met:
   13  * 1. Redistributions of source code must retain the above copyright
   14  *    notice, this list of conditions and the following disclaimer.
   15  * 2. Redistributions in binary form must reproduce the above copyright
   16  *    notice, this list of conditions and the following disclaimer in the
   17  *    documentation and/or other materials provided with the distribution.
   18  * 3. All advertising materials mentioning features or use of this software
   19  *    must display the following acknowledgement:
   20  *      This product includes software developed by Brini.
   21  * 4. The name of the company nor the name of the author may be used to
   22  *    endorse or promote products derived from this software without specific
   23  *    prior written permission.
   24  *
   25  * THIS SOFTWARE IS PROVIDED BY BRINI ``AS IS'' AND ANY EXPRESS OR IMPLIED
   26  * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
   27  * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
   28  * IN NO EVENT SHALL BRINI OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
   29  * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
   30  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
   31  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
   32  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
   33  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
   34  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
   35  * SUCH DAMAGE.
   36  *
   37  * RiscBSD kernel project
   38  *
   39  * machdep.c
   40  *
   41  * Machine dependant functions for kernel setup
   42  *
   43  * This file needs a lot of work.
   44  *
   45  * Created      : 17/09/94
   46  */
   47 
   48 #include <sys/cdefs.h>
   49 __FBSDID("$FreeBSD: releng/10.0/sys/arm/xscale/ixp425/avila_machdep.c 247564 2013-03-01 19:02:41Z alc $");
   50 
   51 #define _ARM32_BUS_DMA_PRIVATE
   52 #include <sys/param.h>
   53 #include <sys/systm.h>
   54 #include <sys/sysproto.h>
   55 #include <sys/signalvar.h>
   56 #include <sys/imgact.h>
   57 #include <sys/kernel.h>
   58 #include <sys/ktr.h>
   59 #include <sys/linker.h>
   60 #include <sys/lock.h>
   61 #include <sys/malloc.h>
   62 #include <sys/mutex.h>
   63 #include <sys/pcpu.h>
   64 #include <sys/proc.h>
   65 #include <sys/ptrace.h>
   66 #include <sys/cons.h>
   67 #include <sys/bio.h>
   68 #include <sys/bus.h>
   69 #include <sys/buf.h>
   70 #include <sys/exec.h>
   71 #include <sys/kdb.h>
   72 #include <sys/msgbuf.h>
   73 #include <machine/reg.h>
   74 #include <machine/cpu.h>
   75 
   76 #include <vm/vm.h>
   77 #include <vm/pmap.h>
   78 #include <vm/vm_object.h>
   79 #include <vm/vm_page.h>
   80 #include <vm/vm_map.h>
   81 #include <machine/vmparam.h>
   82 #include <machine/pcb.h>
   83 #include <machine/undefined.h>
   84 #include <machine/machdep.h>
   85 #include <machine/metadata.h>
   86 #include <machine/armreg.h>
   87 #include <machine/bus.h>
   88 #include <sys/reboot.h>
   89 
   90 #include <arm/xscale/ixp425/ixp425reg.h>
   91 #include <arm/xscale/ixp425/ixp425var.h>
   92 
   93 /* kernel text starts where we were loaded at boot */
   94 #define KERNEL_TEXT_OFF         (KERNPHYSADDR  - PHYSADDR)
   95 #define KERNEL_TEXT_BASE        (KERNBASE + KERNEL_TEXT_OFF)
   96 #define KERNEL_TEXT_PHYS        (PHYSADDR + KERNEL_TEXT_OFF)
   97 
   98 #define KERNEL_PT_SYS           0       /* Page table for mapping proc0 zero page */
   99 #define KERNEL_PT_IO            1
  100 #define KERNEL_PT_IO_NUM        3
  101 #define KERNEL_PT_BEFOREKERN    KERNEL_PT_IO + KERNEL_PT_IO_NUM
  102 #define KERNEL_PT_AFKERNEL      KERNEL_PT_BEFOREKERN + 1        /* L2 table for mapping after kernel */
  103 #define KERNEL_PT_AFKERNEL_NUM  9
  104 
  105 /* this should be evenly divisable by PAGE_SIZE / L2_TABLE_SIZE_REAL (or 4) */
  106 #define NUM_KERNEL_PTS          (KERNEL_PT_AFKERNEL + KERNEL_PT_AFKERNEL_NUM)
  107 
  108 extern u_int data_abort_handler_address;
  109 extern u_int prefetch_abort_handler_address;
  110 extern u_int undefined_handler_address;
  111 
  112 struct pv_addr kernel_pt_table[NUM_KERNEL_PTS];
  113 
  114 /* Physical and virtual addresses for some global pages */
  115 
  116 vm_paddr_t phys_avail[10];
  117 vm_paddr_t dump_avail[4];
  118 
  119 struct pv_addr systempage;
  120 struct pv_addr msgbufpv;
  121 struct pv_addr irqstack;
  122 struct pv_addr undstack;
  123 struct pv_addr abtstack;
  124 struct pv_addr kernelstack;
  125 struct pv_addr minidataclean;
  126 
  127 /* Static device mappings. */
  128 static const struct pmap_devmap ixp425_devmap[] = {
  129         /* Physical/Virtual address for I/O space */
  130     { IXP425_IO_VBASE, IXP425_IO_HWBASE, IXP425_IO_SIZE,
  131       VM_PROT_READ|VM_PROT_WRITE, PTE_NOCACHE, },
  132 
  133         /* Expansion Bus */
  134     { IXP425_EXP_VBASE, IXP425_EXP_HWBASE, IXP425_EXP_SIZE,
  135       VM_PROT_READ|VM_PROT_WRITE, PTE_NOCACHE, },
  136 
  137         /* CFI Flash on the Expansion Bus */
  138     { IXP425_EXP_BUS_CS0_VBASE, IXP425_EXP_BUS_CS0_HWBASE,
  139       IXP425_EXP_BUS_CS0_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_NOCACHE, },
  140 
  141         /* IXP425 PCI Configuration */
  142     { IXP425_PCI_VBASE, IXP425_PCI_HWBASE, IXP425_PCI_SIZE,
  143       VM_PROT_READ|VM_PROT_WRITE, PTE_NOCACHE, },
  144 
  145         /* SDRAM Controller */
  146     { IXP425_MCU_VBASE, IXP425_MCU_HWBASE, IXP425_MCU_SIZE,
  147       VM_PROT_READ|VM_PROT_WRITE, PTE_NOCACHE, },
  148 
  149         /* PCI Memory Space */
  150     { IXP425_PCI_MEM_VBASE, IXP425_PCI_MEM_HWBASE, IXP425_PCI_MEM_SIZE,
  151       VM_PROT_READ|VM_PROT_WRITE, PTE_NOCACHE, },
  152 
  153         /* Q-Mgr Memory Space */
  154     { IXP425_QMGR_VBASE, IXP425_QMGR_HWBASE, IXP425_QMGR_SIZE,
  155       VM_PROT_READ|VM_PROT_WRITE, PTE_NOCACHE, },
  156 
  157     { 0 },
  158 };
  159 
  160 /* Static device mappings. */
  161 static const struct pmap_devmap ixp435_devmap[] = {
  162         /* Physical/Virtual address for I/O space */
  163     { IXP425_IO_VBASE, IXP425_IO_HWBASE, IXP425_IO_SIZE,
  164       VM_PROT_READ|VM_PROT_WRITE, PTE_NOCACHE, },
  165 
  166     { IXP425_EXP_VBASE, IXP425_EXP_HWBASE, IXP425_EXP_SIZE,
  167       VM_PROT_READ|VM_PROT_WRITE, PTE_NOCACHE, },
  168 
  169         /* IXP425 PCI Configuration */
  170     { IXP425_PCI_VBASE, IXP425_PCI_HWBASE, IXP425_PCI_SIZE,
  171       VM_PROT_READ|VM_PROT_WRITE, PTE_NOCACHE, },
  172 
  173         /* DDRII Controller NB: mapped same place as IXP425 */
  174     { IXP425_MCU_VBASE, IXP435_MCU_HWBASE, IXP425_MCU_SIZE,
  175       VM_PROT_READ|VM_PROT_WRITE, PTE_NOCACHE, },
  176 
  177         /* PCI Memory Space */
  178     { IXP425_PCI_MEM_VBASE, IXP425_PCI_MEM_HWBASE, IXP425_PCI_MEM_SIZE,
  179       VM_PROT_READ|VM_PROT_WRITE, PTE_NOCACHE, },
  180 
  181         /* Q-Mgr Memory Space */
  182     { IXP425_QMGR_VBASE, IXP425_QMGR_HWBASE, IXP425_QMGR_SIZE,
  183       VM_PROT_READ|VM_PROT_WRITE, PTE_NOCACHE, },
  184 
  185         /* CFI Flash on the Expansion Bus */
  186     { IXP425_EXP_BUS_CS0_VBASE, IXP425_EXP_BUS_CS0_HWBASE,
  187       IXP425_EXP_BUS_CS0_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_NOCACHE, },
  188 
  189         /* USB1 Memory Space */
  190     { IXP435_USB1_VBASE, IXP435_USB1_HWBASE, IXP435_USB1_SIZE,
  191       VM_PROT_READ|VM_PROT_WRITE, PTE_NOCACHE, },
  192         /* USB2 Memory Space */
  193     { IXP435_USB2_VBASE, IXP435_USB2_HWBASE, IXP435_USB2_SIZE,
  194       VM_PROT_READ|VM_PROT_WRITE, PTE_NOCACHE, },
  195 
  196         /* GPS Memory Space */
  197     { CAMBRIA_GPS_VBASE, CAMBRIA_GPS_HWBASE, CAMBRIA_GPS_SIZE,
  198       VM_PROT_READ|VM_PROT_WRITE, PTE_NOCACHE, },
  199 
  200         /* RS485 Memory Space */
  201     { CAMBRIA_RS485_VBASE, CAMBRIA_RS485_HWBASE, CAMBRIA_RS485_SIZE,
  202       VM_PROT_READ|VM_PROT_WRITE, PTE_NOCACHE, },
  203 
  204     { 0 }
  205 };
  206 
  207 extern vm_offset_t xscale_cache_clean_addr;
  208 
  209 void *
  210 initarm(struct arm_boot_params *abp)
  211 {
  212 #define next_chunk2(a,b)        (((a) + (b)) &~ ((b)-1))
  213 #define next_page(a)            next_chunk2(a,PAGE_SIZE)
  214         struct pv_addr  kernel_l1pt;
  215         struct pv_addr  dpcpu;
  216         int loop, i;
  217         u_int l1pagetable;
  218         vm_offset_t freemempos;
  219         vm_offset_t freemem_pt;
  220         vm_offset_t afterkern;
  221         vm_offset_t freemem_after;
  222         vm_offset_t lastaddr;
  223         uint32_t memsize;
  224 
  225         lastaddr = parse_boot_param(abp);
  226         set_cpufuncs();         /* NB: sets cputype */
  227         pcpu_init(pcpup, 0, sizeof(struct pcpu));
  228         PCPU_SET(curthread, &thread0);
  229 
  230         /* Do basic tuning, hz etc */
  231         init_param1();
  232                 
  233         /*
  234          * We allocate memory downwards from where we were loaded
  235          * by RedBoot; first the L1 page table, then NUM_KERNEL_PTS
  236          * entries in the L2 page table.  Past that we re-align the
  237          * allocation boundary so later data structures (stacks, etc)
  238          * can be mapped with different attributes (write-back vs
  239          * write-through).  Note this leaves a gap for expansion
  240          * (or might be repurposed).
  241          */
  242         freemempos = KERNPHYSADDR;
  243 
  244         /* macros to simplify initial memory allocation */
  245 #define alloc_pages(var, np) do {                                       \
  246         freemempos -= (np * PAGE_SIZE);                                 \
  247         (var) = freemempos;                                             \
  248         /* NB: this works because locore maps PA=VA */                  \
  249         memset((char *)(var), 0, ((np) * PAGE_SIZE));                   \
  250 } while (0)
  251 #define valloc_pages(var, np) do {                                      \
  252         alloc_pages((var).pv_pa, (np));                                 \
  253         (var).pv_va = (var).pv_pa + (KERNVIRTADDR - KERNPHYSADDR);      \
  254 } while (0)
  255 
  256         /* force L1 page table alignment */
  257         while (((freemempos - L1_TABLE_SIZE) & (L1_TABLE_SIZE - 1)) != 0)
  258                 freemempos -= PAGE_SIZE;
  259         /* allocate contiguous L1 page table */
  260         valloc_pages(kernel_l1pt, L1_TABLE_SIZE / PAGE_SIZE);
  261         /* now allocate L2 page tables; they are linked to L1 below */
  262         for (loop = 0; loop < NUM_KERNEL_PTS; ++loop) {
  263                 if (!(loop % (PAGE_SIZE / L2_TABLE_SIZE_REAL))) {
  264                         valloc_pages(kernel_pt_table[loop],
  265                             L2_TABLE_SIZE / PAGE_SIZE);
  266                 } else {
  267                         kernel_pt_table[loop].pv_pa = freemempos +
  268                             (loop % (PAGE_SIZE / L2_TABLE_SIZE_REAL)) *
  269                             L2_TABLE_SIZE_REAL;
  270                         kernel_pt_table[loop].pv_va =
  271                             kernel_pt_table[loop].pv_pa +
  272                                 (KERNVIRTADDR - KERNPHYSADDR);
  273                 }
  274         }
  275         freemem_pt = freemempos;                /* base of allocated pt's */
  276 
  277         /*
  278          * Re-align allocation boundary so we can map the area
  279          * write-back instead of write-through for the stacks and
  280          * related structures allocated below.
  281          */
  282         freemempos = PHYSADDR + 0x100000;
  283         /*
  284          * Allocate a page for the system page mapped to V0x00000000
  285          * This page will just contain the system vectors and can be
  286          * shared by all processes.
  287          */
  288         valloc_pages(systempage, 1);
  289 
  290         /* Allocate dynamic per-cpu area. */
  291         valloc_pages(dpcpu, DPCPU_SIZE / PAGE_SIZE);
  292         dpcpu_init((void *)dpcpu.pv_va, 0);
  293 
  294         /* Allocate stacks for all modes */
  295         valloc_pages(irqstack, IRQ_STACK_SIZE);
  296         valloc_pages(abtstack, ABT_STACK_SIZE);
  297         valloc_pages(undstack, UND_STACK_SIZE);
  298         valloc_pages(kernelstack, KSTACK_PAGES);
  299         alloc_pages(minidataclean.pv_pa, 1);
  300         valloc_pages(msgbufpv, round_page(msgbufsize) / PAGE_SIZE);
  301 #ifdef ARM_USE_SMALL_ALLOC
  302         freemempos -= PAGE_SIZE;
  303         freemem_pt = trunc_page(freemem_pt);
  304         freemem_after = freemempos - ((freemem_pt - (PHYSADDR + 0x100000)) /
  305             PAGE_SIZE) * sizeof(struct arm_small_page);
  306         arm_add_smallalloc_pages(
  307             (void *)(freemem_after + (KERNVIRTADDR - KERNPHYSADDR)),
  308             (void *)0xc0100000,
  309             freemem_pt - (PHYSADDR + 0x100000), 1);
  310         freemem_after -= ((freemem_after - (PHYSADDR + 0x1000)) / PAGE_SIZE) *
  311             sizeof(struct arm_small_page);
  312         arm_add_smallalloc_pages(
  313             (void *)(freemem_after + (KERNVIRTADDR - KERNPHYSADDR)),
  314             (void *)0xc0001000,
  315             trunc_page(freemem_after) - (PHYSADDR + 0x1000), 0);
  316         freemempos = trunc_page(freemem_after);
  317         freemempos -= PAGE_SIZE;
  318 #endif
  319 
  320         /*
  321          * Now construct the L1 page table.  First map the L2
  322          * page tables into the L1 so we can replace L1 mappings
  323          * later on if necessary
  324          */
  325         l1pagetable = kernel_l1pt.pv_va;
  326 
  327         /* Map the L2 pages tables in the L1 page table */
  328         pmap_link_l2pt(l1pagetable, ARM_VECTORS_HIGH & ~(0x00100000 - 1),
  329             &kernel_pt_table[KERNEL_PT_SYS]);
  330         pmap_link_l2pt(l1pagetable, IXP425_IO_VBASE,
  331             &kernel_pt_table[KERNEL_PT_IO]);
  332         pmap_link_l2pt(l1pagetable, IXP425_MCU_VBASE,
  333             &kernel_pt_table[KERNEL_PT_IO + 1]);
  334         pmap_link_l2pt(l1pagetable, IXP425_PCI_MEM_VBASE,
  335             &kernel_pt_table[KERNEL_PT_IO + 2]);
  336         pmap_link_l2pt(l1pagetable, KERNBASE,
  337             &kernel_pt_table[KERNEL_PT_BEFOREKERN]);
  338         pmap_map_chunk(l1pagetable, KERNBASE, PHYSADDR, 0x100000,
  339             VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
  340         pmap_map_chunk(l1pagetable, KERNBASE + 0x100000, PHYSADDR + 0x100000,
  341             0x100000, VM_PROT_READ|VM_PROT_WRITE, PTE_PAGETABLE);
  342         pmap_map_chunk(l1pagetable, KERNEL_TEXT_BASE, KERNEL_TEXT_PHYS,
  343             next_chunk2(((uint32_t)lastaddr) - KERNEL_TEXT_BASE, L1_S_SIZE),
  344             VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
  345         freemem_after = next_page((int)lastaddr);
  346         afterkern = round_page(next_chunk2((vm_offset_t)lastaddr, L1_S_SIZE));
  347         for (i = 0; i < KERNEL_PT_AFKERNEL_NUM; i++) {
  348                 pmap_link_l2pt(l1pagetable, afterkern + i * 0x00100000,
  349                     &kernel_pt_table[KERNEL_PT_AFKERNEL + i]);
  350         }
  351         pmap_map_entry(l1pagetable, afterkern, minidataclean.pv_pa,
  352             VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
  353 
  354 #ifdef ARM_USE_SMALL_ALLOC
  355         if ((freemem_after + 2 * PAGE_SIZE) <= afterkern) {
  356                 arm_add_smallalloc_pages((void *)(freemem_after),
  357                     (void*)(freemem_after + PAGE_SIZE),
  358                     afterkern - (freemem_after + PAGE_SIZE), 0);
  359                 
  360         }
  361 #endif
  362 
  363         /* Map the Mini-Data cache clean area. */
  364         xscale_setup_minidata(l1pagetable, afterkern,
  365             minidataclean.pv_pa);
  366 
  367         /* Map the vector page. */
  368         pmap_map_entry(l1pagetable, ARM_VECTORS_HIGH, systempage.pv_pa,
  369             VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
  370         if (cpu_is_ixp43x())
  371                 pmap_devmap_bootstrap(l1pagetable, ixp435_devmap);
  372         else
  373                 pmap_devmap_bootstrap(l1pagetable, ixp425_devmap);
  374         /*
  375          * Give the XScale global cache clean code an appropriately
  376          * sized chunk of unmapped VA space starting at 0xff000000
  377          * (our device mappings end before this address).
  378          */
  379         xscale_cache_clean_addr = 0xff000000U;
  380 
  381         cpu_domains((DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL*2)) | DOMAIN_CLIENT);
  382         setttb(kernel_l1pt.pv_pa);
  383         cpu_tlb_flushID();
  384         cpu_domains(DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL*2));
  385 
  386         /*
  387          * Pages were allocated during the secondary bootstrap for the
  388          * stacks for different CPU modes.
  389          * We must now set the r13 registers in the different CPU modes to
  390          * point to these stacks.
  391          * Since the ARM stacks use STMFD etc. we must set r13 to the top end
  392          * of the stack memory.
  393          */
  394         set_stackptrs(0);
  395 
  396         /*
  397          * We must now clean the cache again....
  398          * Cleaning may be done by reading new data to displace any
  399          * dirty data in the cache. This will have happened in setttb()
  400          * but since we are boot strapping the addresses used for the read
  401          * may have just been remapped and thus the cache could be out
  402          * of sync. A re-clean after the switch will cure this.
  403          * After booting there are no gross relocations of the kernel thus
  404          * this problem will not occur after initarm().
  405          */
  406         cpu_idcache_wbinv_all();
  407         /* ready to setup the console (XXX move earlier if possible) */
  408         cninit();
  409         /*
  410          * Fetch the RAM size from the MCU registers.  The
  411          * expansion bus was mapped above so we can now read 'em.
  412          */
  413         if (cpu_is_ixp43x())
  414                 memsize = ixp435_ddram_size();
  415         else
  416                 memsize = ixp425_sdram_size();
  417         physmem = memsize / PAGE_SIZE;
  418 
  419         /* Set stack for exception handlers */
  420 
  421         data_abort_handler_address = (u_int)data_abort_handler;
  422         prefetch_abort_handler_address = (u_int)prefetch_abort_handler;
  423         undefined_handler_address = (u_int)undefinedinstruction_bounce;
  424         undefined_init();
  425 
  426         init_proc0(kernelstack.pv_va);
  427 
  428         arm_vector_init(ARM_VECTORS_HIGH, ARM_VEC_ALL);
  429 
  430         pmap_curmaxkvaddr = afterkern + PAGE_SIZE;
  431         arm_dump_avail_init(memsize, sizeof(dump_avail) / sizeof(dump_avail[0]));
  432         vm_max_kernel_address = 0xd0000000;
  433         pmap_bootstrap(pmap_curmaxkvaddr, &kernel_l1pt);
  434         msgbufp = (void*)msgbufpv.pv_va;
  435         msgbufinit(msgbufp, msgbufsize);
  436         mutex_init();
  437 
  438         i = 0;
  439 #ifdef ARM_USE_SMALL_ALLOC
  440         phys_avail[i++] = PHYSADDR;
  441         phys_avail[i++] = PHYSADDR + PAGE_SIZE;         /*
  442                                          *XXX: Gross hack to get our
  443                                          * pages in the vm_page_array.
  444                                          */
  445 #endif
  446         phys_avail[i++] = round_page(virtual_avail - KERNBASE + PHYSADDR);
  447         phys_avail[i++] = trunc_page(PHYSADDR + memsize - 1);
  448         phys_avail[i++] = 0;
  449         phys_avail[i] = 0;
  450 
  451         init_param2(physmem);
  452         kdb_init();
  453 
  454         /* use static kernel environment if so configured */
  455         if (envmode == 1)
  456                 kern_envp = static_env;
  457 
  458         return ((void *)(kernelstack.pv_va + USPACE_SVC_STACK_TOP -
  459             sizeof(struct pcb)));
  460 #undef next_page
  461 #undef next_chunk2
  462 }

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