The Design and Implementation of the FreeBSD Operating System, Second Edition
Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)


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FreeBSD/Linux Kernel Cross Reference
sys/arm/xscale/ixp425/avila_machdep.c

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    1 /*      $NetBSD: hpc_machdep.c,v 1.70 2003/09/16 08:18:22 agc Exp $     */
    2 
    3 /*-
    4  * Copyright (c) 1994-1998 Mark Brinicombe.
    5  * Copyright (c) 1994 Brini.
    6  * All rights reserved.
    7  *
    8  * This code is derived from software written for Brini by Mark Brinicombe
    9  *
   10  * Redistribution and use in source and binary forms, with or without
   11  * modification, are permitted provided that the following conditions
   12  * are met:
   13  * 1. Redistributions of source code must retain the above copyright
   14  *    notice, this list of conditions and the following disclaimer.
   15  * 2. Redistributions in binary form must reproduce the above copyright
   16  *    notice, this list of conditions and the following disclaimer in the
   17  *    documentation and/or other materials provided with the distribution.
   18  * 3. All advertising materials mentioning features or use of this software
   19  *    must display the following acknowledgement:
   20  *      This product includes software developed by Brini.
   21  * 4. The name of the company nor the name of the author may be used to
   22  *    endorse or promote products derived from this software without specific
   23  *    prior written permission.
   24  *
   25  * THIS SOFTWARE IS PROVIDED BY BRINI ``AS IS'' AND ANY EXPRESS OR IMPLIED
   26  * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
   27  * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
   28  * IN NO EVENT SHALL BRINI OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
   29  * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
   30  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
   31  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
   32  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
   33  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
   34  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
   35  * SUCH DAMAGE.
   36  *
   37  * RiscBSD kernel project
   38  *
   39  * machdep.c
   40  *
   41  * Machine dependent functions for kernel setup
   42  *
   43  * This file needs a lot of work.
   44  *
   45  * Created      : 17/09/94
   46  */
   47 
   48 #include <sys/cdefs.h>
   49 __FBSDID("$FreeBSD: releng/11.2/sys/arm/xscale/ixp425/avila_machdep.c 331722 2018-03-29 02:50:57Z eadler $");
   50 
   51 #include "opt_kstack_pages.h"
   52 
   53 #define _ARM32_BUS_DMA_PRIVATE
   54 #include <sys/param.h>
   55 #include <sys/systm.h>
   56 #include <sys/sysproto.h>
   57 #include <sys/signalvar.h>
   58 #include <sys/imgact.h>
   59 #include <sys/kernel.h>
   60 #include <sys/ktr.h>
   61 #include <sys/linker.h>
   62 #include <sys/lock.h>
   63 #include <sys/malloc.h>
   64 #include <sys/mutex.h>
   65 #include <sys/pcpu.h>
   66 #include <sys/proc.h>
   67 #include <sys/ptrace.h>
   68 #include <sys/cons.h>
   69 #include <sys/bio.h>
   70 #include <sys/bus.h>
   71 #include <sys/buf.h>
   72 #include <sys/exec.h>
   73 #include <sys/kdb.h>
   74 #include <sys/msgbuf.h>
   75 #include <sys/devmap.h>
   76 #include <machine/physmem.h>
   77 #include <machine/reg.h>
   78 #include <machine/cpu.h>
   79 
   80 #include <vm/vm.h>
   81 #include <vm/pmap.h>
   82 #include <vm/vm_object.h>
   83 #include <vm/vm_page.h>
   84 #include <vm/vm_map.h>
   85 #include <machine/vmparam.h>
   86 #include <machine/pcb.h>
   87 #include <machine/undefined.h>
   88 #include <machine/machdep.h>
   89 #include <machine/metadata.h>
   90 #include <machine/armreg.h>
   91 #include <machine/bus.h>
   92 #include <sys/reboot.h>
   93 
   94 #include <arm/xscale/ixp425/ixp425reg.h>
   95 #include <arm/xscale/ixp425/ixp425var.h>
   96 
   97 #define KERNEL_PT_SYS           0       /* Page table for mapping proc0 zero page */
   98 #define KERNEL_PT_IO            1
   99 #define KERNEL_PT_IO_NUM        3
  100 #define KERNEL_PT_BEFOREKERN    KERNEL_PT_IO + KERNEL_PT_IO_NUM
  101 #define KERNEL_PT_AFKERNEL      KERNEL_PT_BEFOREKERN + 1        /* L2 table for mapping after kernel */
  102 #define KERNEL_PT_AFKERNEL_NUM  9
  103 
  104 /* this should be evenly divisable by PAGE_SIZE / L2_TABLE_SIZE_REAL (or 4) */
  105 #define NUM_KERNEL_PTS          (KERNEL_PT_AFKERNEL + KERNEL_PT_AFKERNEL_NUM)
  106 
  107 struct pv_addr kernel_pt_table[NUM_KERNEL_PTS];
  108 
  109 /* Physical and virtual addresses for some global pages */
  110 
  111 struct pv_addr systempage;
  112 struct pv_addr msgbufpv;
  113 struct pv_addr irqstack;
  114 struct pv_addr undstack;
  115 struct pv_addr abtstack;
  116 struct pv_addr kernelstack;
  117 struct pv_addr minidataclean;
  118 
  119 /* Static device mappings. */
  120 static const struct devmap_entry ixp425_devmap[] = {
  121         /* Physical/Virtual address for I/O space */
  122     { IXP425_IO_VBASE, IXP425_IO_HWBASE, IXP425_IO_SIZE, },
  123 
  124         /* Expansion Bus */
  125     { IXP425_EXP_VBASE, IXP425_EXP_HWBASE, IXP425_EXP_SIZE, },
  126 
  127         /* CFI Flash on the Expansion Bus */
  128     { IXP425_EXP_BUS_CS0_VBASE, IXP425_EXP_BUS_CS0_HWBASE,
  129       IXP425_EXP_BUS_CS0_SIZE, },
  130 
  131         /* IXP425 PCI Configuration */
  132     { IXP425_PCI_VBASE, IXP425_PCI_HWBASE, IXP425_PCI_SIZE, },
  133 
  134         /* SDRAM Controller */
  135     { IXP425_MCU_VBASE, IXP425_MCU_HWBASE, IXP425_MCU_SIZE, },
  136 
  137         /* PCI Memory Space */
  138     { IXP425_PCI_MEM_VBASE, IXP425_PCI_MEM_HWBASE, IXP425_PCI_MEM_SIZE, },
  139 
  140         /* Q-Mgr Memory Space */
  141     { IXP425_QMGR_VBASE, IXP425_QMGR_HWBASE, IXP425_QMGR_SIZE, },
  142 
  143     { 0 },
  144 };
  145 
  146 /* Static device mappings. */
  147 static const struct devmap_entry ixp435_devmap[] = {
  148         /* Physical/Virtual address for I/O space */
  149     { IXP425_IO_VBASE, IXP425_IO_HWBASE, IXP425_IO_SIZE, },
  150 
  151     { IXP425_EXP_VBASE, IXP425_EXP_HWBASE, IXP425_EXP_SIZE, },
  152 
  153         /* IXP425 PCI Configuration */
  154     { IXP425_PCI_VBASE, IXP425_PCI_HWBASE, IXP425_PCI_SIZE, },
  155 
  156         /* DDRII Controller NB: mapped same place as IXP425 */
  157     { IXP425_MCU_VBASE, IXP435_MCU_HWBASE, IXP425_MCU_SIZE, },
  158 
  159         /* PCI Memory Space */
  160     { IXP425_PCI_MEM_VBASE, IXP425_PCI_MEM_HWBASE, IXP425_PCI_MEM_SIZE, },
  161 
  162         /* Q-Mgr Memory Space */
  163     { IXP425_QMGR_VBASE, IXP425_QMGR_HWBASE, IXP425_QMGR_SIZE, },
  164 
  165         /* CFI Flash on the Expansion Bus */
  166     { IXP425_EXP_BUS_CS0_VBASE, IXP425_EXP_BUS_CS0_HWBASE,
  167       IXP425_EXP_BUS_CS0_SIZE, },
  168 
  169         /* USB1 Memory Space */
  170     { IXP435_USB1_VBASE, IXP435_USB1_HWBASE, IXP435_USB1_SIZE, },
  171         /* USB2 Memory Space */
  172     { IXP435_USB2_VBASE, IXP435_USB2_HWBASE, IXP435_USB2_SIZE, },
  173 
  174         /* GPS Memory Space */
  175     { CAMBRIA_GPS_VBASE, CAMBRIA_GPS_HWBASE, CAMBRIA_GPS_SIZE, },
  176 
  177         /* RS485 Memory Space */
  178     { CAMBRIA_RS485_VBASE, CAMBRIA_RS485_HWBASE, CAMBRIA_RS485_SIZE, },
  179 
  180     { 0 }
  181 };
  182 
  183 extern vm_offset_t xscale_cache_clean_addr;
  184 
  185 void *
  186 initarm(struct arm_boot_params *abp)
  187 {
  188 #define next_chunk2(a,b)        (((a) + (b)) &~ ((b)-1))
  189 #define next_page(a)            next_chunk2(a,PAGE_SIZE)
  190         struct pv_addr  kernel_l1pt;
  191         struct pv_addr  dpcpu;
  192         int loop, i;
  193         u_int l1pagetable;
  194         vm_offset_t freemempos;
  195         vm_offset_t freemem_pt;
  196         vm_offset_t afterkern;
  197         vm_offset_t freemem_after;
  198         vm_offset_t lastaddr;
  199         uint32_t memsize;
  200 
  201         /* kernel text starts where we were loaded at boot */
  202 #define KERNEL_TEXT_OFF         (abp->abp_physaddr  - PHYSADDR)
  203 #define KERNEL_TEXT_BASE        (KERNBASE + KERNEL_TEXT_OFF)
  204 #define KERNEL_TEXT_PHYS        (PHYSADDR + KERNEL_TEXT_OFF)
  205 
  206         lastaddr = parse_boot_param(abp);
  207         arm_physmem_kernaddr = abp->abp_physaddr;
  208         set_cpufuncs();         /* NB: sets cputype */
  209         pcpu_init(pcpup, 0, sizeof(struct pcpu));
  210         PCPU_SET(curthread, &thread0);
  211 
  212         init_static_kenv(NULL, 0);
  213 
  214         /* Do basic tuning, hz etc */
  215         init_param1();
  216                 
  217         /*
  218          * We allocate memory downwards from where we were loaded
  219          * by RedBoot; first the L1 page table, then NUM_KERNEL_PTS
  220          * entries in the L2 page table.  Past that we re-align the
  221          * allocation boundary so later data structures (stacks, etc)
  222          * can be mapped with different attributes (write-back vs
  223          * write-through).  Note this leaves a gap for expansion
  224          * (or might be repurposed).
  225          */
  226         freemempos = abp->abp_physaddr;
  227 
  228         /* macros to simplify initial memory allocation */
  229 #define alloc_pages(var, np) do {                                       \
  230         freemempos -= (np * PAGE_SIZE);                                 \
  231         (var) = freemempos;                                             \
  232         /* NB: this works because locore maps PA=VA */                  \
  233         memset((char *)(var), 0, ((np) * PAGE_SIZE));                   \
  234 } while (0)
  235 #define valloc_pages(var, np) do {                                      \
  236         alloc_pages((var).pv_pa, (np));                                 \
  237         (var).pv_va = (var).pv_pa + (KERNVIRTADDR - abp->abp_physaddr); \
  238 } while (0)
  239 
  240         /* force L1 page table alignment */
  241         while (((freemempos - L1_TABLE_SIZE) & (L1_TABLE_SIZE - 1)) != 0)
  242                 freemempos -= PAGE_SIZE;
  243         /* allocate contiguous L1 page table */
  244         valloc_pages(kernel_l1pt, L1_TABLE_SIZE / PAGE_SIZE);
  245         /* now allocate L2 page tables; they are linked to L1 below */
  246         for (loop = 0; loop < NUM_KERNEL_PTS; ++loop) {
  247                 if (!(loop % (PAGE_SIZE / L2_TABLE_SIZE_REAL))) {
  248                         valloc_pages(kernel_pt_table[loop],
  249                             L2_TABLE_SIZE / PAGE_SIZE);
  250                 } else {
  251                         kernel_pt_table[loop].pv_pa = freemempos +
  252                             (loop % (PAGE_SIZE / L2_TABLE_SIZE_REAL)) *
  253                             L2_TABLE_SIZE_REAL;
  254                         kernel_pt_table[loop].pv_va =
  255                             kernel_pt_table[loop].pv_pa +
  256                                 (KERNVIRTADDR - abp->abp_physaddr);
  257                 }
  258         }
  259         freemem_pt = freemempos;                /* base of allocated pt's */
  260 
  261         /*
  262          * Re-align allocation boundary so we can map the area
  263          * write-back instead of write-through for the stacks and
  264          * related structures allocated below.
  265          */
  266         freemempos = PHYSADDR + 0x100000;
  267         /*
  268          * Allocate a page for the system page mapped to V0x00000000
  269          * This page will just contain the system vectors and can be
  270          * shared by all processes.
  271          */
  272         valloc_pages(systempage, 1);
  273 
  274         /* Allocate dynamic per-cpu area. */
  275         valloc_pages(dpcpu, DPCPU_SIZE / PAGE_SIZE);
  276         dpcpu_init((void *)dpcpu.pv_va, 0);
  277 
  278         /* Allocate stacks for all modes */
  279         valloc_pages(irqstack, IRQ_STACK_SIZE);
  280         valloc_pages(abtstack, ABT_STACK_SIZE);
  281         valloc_pages(undstack, UND_STACK_SIZE);
  282         valloc_pages(kernelstack, kstack_pages);
  283         alloc_pages(minidataclean.pv_pa, 1);
  284         valloc_pages(msgbufpv, round_page(msgbufsize) / PAGE_SIZE);
  285 
  286         /*
  287          * Now construct the L1 page table.  First map the L2
  288          * page tables into the L1 so we can replace L1 mappings
  289          * later on if necessary
  290          */
  291         l1pagetable = kernel_l1pt.pv_va;
  292 
  293         /* Map the L2 pages tables in the L1 page table */
  294         pmap_link_l2pt(l1pagetable, rounddown2(ARM_VECTORS_HIGH, 0x00100000),
  295             &kernel_pt_table[KERNEL_PT_SYS]);
  296         pmap_link_l2pt(l1pagetable, IXP425_IO_VBASE,
  297             &kernel_pt_table[KERNEL_PT_IO]);
  298         pmap_link_l2pt(l1pagetable, IXP425_MCU_VBASE,
  299             &kernel_pt_table[KERNEL_PT_IO + 1]);
  300         pmap_link_l2pt(l1pagetable, IXP425_PCI_MEM_VBASE,
  301             &kernel_pt_table[KERNEL_PT_IO + 2]);
  302         pmap_link_l2pt(l1pagetable, KERNBASE,
  303             &kernel_pt_table[KERNEL_PT_BEFOREKERN]);
  304         pmap_map_chunk(l1pagetable, KERNBASE, PHYSADDR, 0x100000,
  305             VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
  306         pmap_map_chunk(l1pagetable, KERNBASE + 0x100000, PHYSADDR + 0x100000,
  307             0x100000, VM_PROT_READ|VM_PROT_WRITE, PTE_PAGETABLE);
  308         pmap_map_chunk(l1pagetable, KERNEL_TEXT_BASE, KERNEL_TEXT_PHYS,
  309             next_chunk2(((uint32_t)lastaddr) - KERNEL_TEXT_BASE, L1_S_SIZE),
  310             VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
  311         freemem_after = next_page((int)lastaddr);
  312         afterkern = round_page(next_chunk2((vm_offset_t)lastaddr, L1_S_SIZE));
  313         for (i = 0; i < KERNEL_PT_AFKERNEL_NUM; i++) {
  314                 pmap_link_l2pt(l1pagetable, afterkern + i * 0x00100000,
  315                     &kernel_pt_table[KERNEL_PT_AFKERNEL + i]);
  316         }
  317         pmap_map_entry(l1pagetable, afterkern, minidataclean.pv_pa,
  318             VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
  319 
  320 
  321         /* Map the Mini-Data cache clean area. */
  322         xscale_setup_minidata(l1pagetable, afterkern,
  323             minidataclean.pv_pa);
  324 
  325         /* Map the vector page. */
  326         pmap_map_entry(l1pagetable, ARM_VECTORS_HIGH, systempage.pv_pa,
  327             VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
  328         if (cpu_is_ixp43x())
  329                 devmap_bootstrap(l1pagetable, ixp435_devmap);
  330         else
  331                 devmap_bootstrap(l1pagetable, ixp425_devmap);
  332         /*
  333          * Give the XScale global cache clean code an appropriately
  334          * sized chunk of unmapped VA space starting at 0xff000000
  335          * (our device mappings end before this address).
  336          */
  337         xscale_cache_clean_addr = 0xff000000U;
  338 
  339         cpu_domains((DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL*2)) | DOMAIN_CLIENT);
  340         cpu_setttb(kernel_l1pt.pv_pa);
  341         cpu_tlb_flushID();
  342         cpu_domains(DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL*2));
  343 
  344         /*
  345          * Pages were allocated during the secondary bootstrap for the
  346          * stacks for different CPU modes.
  347          * We must now set the r13 registers in the different CPU modes to
  348          * point to these stacks.
  349          * Since the ARM stacks use STMFD etc. we must set r13 to the top end
  350          * of the stack memory.
  351          */
  352         set_stackptrs(0);
  353 
  354         /*
  355          * We must now clean the cache again....
  356          * Cleaning may be done by reading new data to displace any
  357          * dirty data in the cache. This will have happened in cpu_setttb()
  358          * but since we are boot strapping the addresses used for the read
  359          * may have just been remapped and thus the cache could be out
  360          * of sync. A re-clean after the switch will cure this.
  361          * After booting there are no gross relocations of the kernel thus
  362          * this problem will not occur after initarm().
  363          */
  364         cpu_idcache_wbinv_all();
  365         cpu_setup();
  366 
  367         /* ready to setup the console (XXX move earlier if possible) */
  368         cninit();
  369         /*
  370          * Fetch the RAM size from the MCU registers.  The
  371          * expansion bus was mapped above so we can now read 'em.
  372          */
  373         if (cpu_is_ixp43x())
  374                 memsize = ixp435_ddram_size();
  375         else
  376                 memsize = ixp425_sdram_size();
  377 
  378         undefined_init();
  379 
  380         init_proc0(kernelstack.pv_va);
  381 
  382         arm_vector_init(ARM_VECTORS_HIGH, ARM_VEC_ALL);
  383 
  384         pmap_curmaxkvaddr = afterkern + PAGE_SIZE;
  385         vm_max_kernel_address = 0xe0000000;
  386         pmap_bootstrap(pmap_curmaxkvaddr, &kernel_l1pt);
  387         msgbufp = (void*)msgbufpv.pv_va;
  388         msgbufinit(msgbufp, msgbufsize);
  389         mutex_init();
  390 
  391         /*
  392          * Add the physical ram we have available.
  393          *
  394          * Exclude the kernel, and all the things we allocated which immediately
  395          * follow the kernel, from the VM allocation pool but not from crash
  396          * dumps.  virtual_avail is a global variable which tracks the kva we've
  397          * "allocated" while setting up pmaps.
  398          *
  399          * Prepare the list of physical memory available to the vm subsystem.
  400          */
  401         arm_physmem_hardware_region(PHYSADDR, memsize);
  402         arm_physmem_exclude_region(freemem_pt, abp->abp_physaddr -
  403             freemem_pt, EXFLAG_NOALLOC);
  404         arm_physmem_exclude_region(freemempos, abp->abp_physaddr - 0x100000 -
  405             freemempos, EXFLAG_NOALLOC);
  406         arm_physmem_exclude_region(abp->abp_physaddr, 
  407             virtual_avail - KERNVIRTADDR, EXFLAG_NOALLOC);
  408         arm_physmem_init_kernel_globals();
  409 
  410         init_param2(physmem);
  411         kdb_init();
  412 
  413         return ((void *)(kernelstack.pv_va + USPACE_SVC_STACK_TOP -
  414             sizeof(struct pcb)));
  415 #undef next_page
  416 #undef next_chunk2
  417 }

Cache object: fbb9b83b68fe8333e1b4ce802899b3e4


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