The Design and Implementation of the FreeBSD Operating System, Second Edition
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FreeBSD/Linux Kernel Cross Reference
sys/arm/xscale/ixp425/avila_machdep.c

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    1 /*      $NetBSD: hpc_machdep.c,v 1.70 2003/09/16 08:18:22 agc Exp $     */
    2 
    3 /*-
    4  * Copyright (c) 1994-1998 Mark Brinicombe.
    5  * Copyright (c) 1994 Brini.
    6  * All rights reserved.
    7  *
    8  * This code is derived from software written for Brini by Mark Brinicombe
    9  *
   10  * Redistribution and use in source and binary forms, with or without
   11  * modification, are permitted provided that the following conditions
   12  * are met:
   13  * 1. Redistributions of source code must retain the above copyright
   14  *    notice, this list of conditions and the following disclaimer.
   15  * 2. Redistributions in binary form must reproduce the above copyright
   16  *    notice, this list of conditions and the following disclaimer in the
   17  *    documentation and/or other materials provided with the distribution.
   18  * 3. All advertising materials mentioning features or use of this software
   19  *    must display the following acknowledgement:
   20  *      This product includes software developed by Brini.
   21  * 4. The name of the company nor the name of the author may be used to
   22  *    endorse or promote products derived from this software without specific
   23  *    prior written permission.
   24  *
   25  * THIS SOFTWARE IS PROVIDED BY BRINI ``AS IS'' AND ANY EXPRESS OR IMPLIED
   26  * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
   27  * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
   28  * IN NO EVENT SHALL BRINI OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
   29  * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
   30  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
   31  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
   32  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
   33  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
   34  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
   35  * SUCH DAMAGE.
   36  *
   37  * RiscBSD kernel project
   38  *
   39  * machdep.c
   40  *
   41  * Machine dependant functions for kernel setup
   42  *
   43  * This file needs a lot of work. 
   44  *
   45  * Created      : 17/09/94
   46  */
   47 
   48 #include "opt_msgbuf.h"
   49 #include "opt_ddb.h"
   50 
   51 #include <sys/cdefs.h>
   52 __FBSDID("$FreeBSD: releng/6.4/sys/arm/xscale/ixp425/avila_machdep.c 167038 2007-02-26 23:13:09Z cognet $");
   53 
   54 #define _ARM32_BUS_DMA_PRIVATE
   55 #include <sys/param.h>
   56 #include <sys/systm.h>
   57 #include <sys/sysproto.h>
   58 #include <sys/signalvar.h>
   59 #include <sys/imgact.h>
   60 #include <sys/kernel.h>
   61 #include <sys/ktr.h>
   62 #include <sys/linker.h>
   63 #include <sys/lock.h>
   64 #include <sys/malloc.h>
   65 #include <sys/mutex.h>
   66 #include <sys/pcpu.h>
   67 #include <sys/proc.h>
   68 #include <sys/ptrace.h>
   69 #include <sys/cons.h>
   70 #include <sys/bio.h>
   71 #include <sys/bus.h>
   72 #include <sys/buf.h>
   73 #include <sys/exec.h>
   74 #include <sys/kdb.h>
   75 #include <sys/msgbuf.h>
   76 #include <machine/reg.h>
   77 #include <machine/cpu.h>
   78 
   79 #include <vm/vm.h>
   80 #include <vm/pmap.h>
   81 #include <vm/vm.h>
   82 #include <vm/vm_object.h>
   83 #include <vm/vm_page.h>
   84 #include <vm/vm_pager.h>
   85 #include <vm/vm_map.h>
   86 #include <vm/vnode_pager.h>
   87 #include <machine/pmap.h>
   88 #include <machine/vmparam.h>
   89 #include <machine/pcb.h>
   90 #include <machine/undefined.h>
   91 #include <machine/machdep.h>
   92 #include <machine/metadata.h>
   93 #include <machine/armreg.h>
   94 #include <machine/bus.h>
   95 #include <sys/reboot.h>
   96 
   97 #include <arm/xscale/ixp425/ixp425reg.h>
   98 #include <arm/xscale/ixp425/ixp425var.h>
   99 
  100 #define KERNEL_PT_SYS           0       /* Page table for mapping proc0 zero page */
  101 #define KERNEL_PT_IO            1
  102 #define KERNEL_PT_IO_NUM        3
  103 #define KERNEL_PT_BEFOREKERN    KERNEL_PT_IO + KERNEL_PT_IO_NUM
  104 #define KERNEL_PT_AFKERNEL      KERNEL_PT_BEFOREKERN + 1        /* L2 table for mapping after kernel */
  105 #define KERNEL_PT_AFKERNEL_NUM  9
  106 
  107 /* this should be evenly divisable by PAGE_SIZE / L2_TABLE_SIZE_REAL (or 4) */
  108 #define NUM_KERNEL_PTS          (KERNEL_PT_AFKERNEL + KERNEL_PT_AFKERNEL_NUM)
  109 
  110 /* Define various stack sizes in pages */
  111 #define IRQ_STACK_SIZE  1
  112 #define ABT_STACK_SIZE  1
  113 #ifdef IPKDB
  114 #define UND_STACK_SIZE  2
  115 #else
  116 #define UND_STACK_SIZE  1
  117 #endif
  118 
  119 extern u_int data_abort_handler_address;
  120 extern u_int prefetch_abort_handler_address;
  121 extern u_int undefined_handler_address;
  122 
  123 struct pv_addr kernel_pt_table[NUM_KERNEL_PTS];
  124 
  125 extern void *_end;
  126 
  127 extern vm_offset_t sa1_cache_clean_addr;
  128 
  129 extern int *end;
  130 
  131 struct pcpu __pcpu;
  132 struct pcpu *pcpup = &__pcpu;
  133 
  134 /* Physical and virtual addresses for some global pages */
  135 
  136 vm_paddr_t phys_avail[10];
  137 vm_paddr_t dump_avail[4];
  138 vm_offset_t physical_pages;
  139 vm_offset_t clean_sva, clean_eva;
  140 
  141 struct pv_addr systempage;
  142 struct pv_addr msgbufpv;
  143 struct pv_addr irqstack;
  144 struct pv_addr undstack;
  145 struct pv_addr abtstack;
  146 struct pv_addr kernelstack;
  147 struct pv_addr minidataclean;
  148 
  149 static struct trapframe proc0_tf;
  150 
  151 /* Static device mappings. */
  152 static const struct pmap_devmap ixp425_devmap[] = {
  153         /* Physical/Virtual address for I/O space */
  154     {
  155         IXP425_IO_VBASE,
  156         IXP425_IO_HWBASE,
  157         IXP425_IO_SIZE,
  158         VM_PROT_READ|VM_PROT_WRITE,
  159         PTE_NOCACHE,
  160     },
  161 
  162         /* Expansion Bus */
  163     {
  164         IXP425_EXP_VBASE,
  165         IXP425_EXP_HWBASE,
  166         IXP425_EXP_SIZE,
  167         VM_PROT_READ|VM_PROT_WRITE,
  168         PTE_NOCACHE,
  169     },
  170 
  171         /* IXP425 PCI Configuration */
  172     {
  173         IXP425_PCI_VBASE,
  174         IXP425_PCI_HWBASE,
  175         IXP425_PCI_SIZE,
  176         VM_PROT_READ|VM_PROT_WRITE,
  177         PTE_NOCACHE,
  178     },
  179 
  180         /* SDRAM Controller */
  181     {
  182         IXP425_MCU_VBASE,
  183         IXP425_MCU_HWBASE,
  184         IXP425_MCU_SIZE,
  185         VM_PROT_READ|VM_PROT_WRITE,
  186         PTE_NOCACHE,
  187     },
  188 
  189         /* PCI Memory Space */
  190     {
  191         IXP425_PCI_MEM_VBASE,
  192         IXP425_PCI_MEM_HWBASE,
  193         IXP425_PCI_MEM_SIZE,
  194         VM_PROT_READ|VM_PROT_WRITE,
  195         PTE_NOCACHE,
  196     },
  197         /* NPE-A Memory Space */
  198     {
  199         IXP425_NPE_A_VBASE,
  200         IXP425_NPE_A_HWBASE,
  201         IXP425_NPE_A_SIZE,
  202         VM_PROT_READ|VM_PROT_WRITE,
  203         PTE_NOCACHE,
  204     },
  205         /* NPE-B Memory Space */
  206     {
  207         IXP425_NPE_B_VBASE,
  208         IXP425_NPE_B_HWBASE,
  209         IXP425_NPE_B_SIZE,
  210         VM_PROT_READ|VM_PROT_WRITE,
  211         PTE_NOCACHE,
  212     },
  213         /* NPE-C Memory Space */
  214     {
  215         IXP425_NPE_C_VBASE,
  216         IXP425_NPE_C_HWBASE,
  217         IXP425_NPE_C_SIZE,
  218         VM_PROT_READ|VM_PROT_WRITE,
  219         PTE_NOCACHE,
  220     },
  221         /* MAC-A Memory Space */
  222     {
  223         IXP425_MAC_A_VBASE,
  224         IXP425_MAC_A_HWBASE,
  225         IXP425_MAC_A_SIZE,
  226         VM_PROT_READ|VM_PROT_WRITE,
  227         PTE_NOCACHE,
  228     },
  229         /* MAC-B Memory Space */
  230     {
  231         IXP425_MAC_B_VBASE,
  232         IXP425_MAC_B_HWBASE,
  233         IXP425_MAC_B_SIZE,
  234         VM_PROT_READ|VM_PROT_WRITE,
  235         PTE_NOCACHE,
  236     },
  237         /* Q-Mgr Memory Space */
  238     {
  239         IXP425_QMGR_VBASE,
  240         IXP425_QMGR_HWBASE,
  241         IXP425_QMGR_SIZE,
  242         VM_PROT_READ|VM_PROT_WRITE,
  243         PTE_NOCACHE,
  244     },
  245 
  246     {
  247         0,
  248         0,
  249         0,
  250         0,
  251         0,
  252     }
  253 };
  254 
  255 #define SDRAM_START 0x10000000
  256 
  257 #ifdef DDB
  258 extern vm_offset_t ksym_start, ksym_end;
  259 #endif
  260 
  261 extern vm_offset_t xscale_cache_clean_addr;
  262 
  263 void *
  264 initarm(void *arg, void *arg2)
  265 {
  266         struct pv_addr  kernel_l1pt;
  267         int loop;
  268         u_int l1pagetable;
  269         vm_offset_t freemempos;
  270         vm_offset_t freemem_pt;
  271         vm_offset_t afterkern;
  272         vm_offset_t freemem_after;
  273         vm_offset_t lastaddr;
  274 #ifdef DDB
  275         vm_offset_t zstart = 0, zend = 0;
  276 #endif
  277         int i = 0;
  278         uint32_t fake_preload[35];
  279         uint32_t memsize;
  280 
  281         i = 0;
  282 
  283         set_cpufuncs();
  284         fake_preload[i++] = MODINFO_NAME;
  285         fake_preload[i++] = strlen("elf kernel") + 1;
  286         strcpy((char*)&fake_preload[i++], "elf kernel");
  287         i += 2;
  288         fake_preload[i++] = MODINFO_TYPE;
  289         fake_preload[i++] = strlen("elf kernel") + 1;
  290         strcpy((char*)&fake_preload[i++], "elf kernel");
  291         i += 2;
  292         fake_preload[i++] = MODINFO_ADDR;
  293         fake_preload[i++] = sizeof(vm_offset_t);
  294         fake_preload[i++] = KERNBASE + 0x00200000;
  295         fake_preload[i++] = MODINFO_SIZE;
  296         fake_preload[i++] = sizeof(uint32_t);
  297         fake_preload[i++] = (uint32_t)&end - KERNBASE - 0x00200000;
  298 #ifdef DDB
  299         if (*(uint32_t *)KERNVIRTADDR == MAGIC_TRAMP_NUMBER) {
  300                 fake_preload[i++] = MODINFO_METADATA|MODINFOMD_SSYM;
  301                 fake_preload[i++] = sizeof(vm_offset_t);
  302                 fake_preload[i++] = *(uint32_t *)(KERNVIRTADDR + 4);
  303                 fake_preload[i++] = MODINFO_METADATA|MODINFOMD_ESYM;
  304                 fake_preload[i++] = sizeof(vm_offset_t);
  305                 fake_preload[i++] = *(uint32_t *)(KERNVIRTADDR + 8);
  306                 lastaddr = *(uint32_t *)(KERNVIRTADDR + 8);
  307                 zend = lastaddr;
  308                 zstart = *(uint32_t *)(KERNVIRTADDR + 4);
  309                 ksym_start = zstart;
  310                 ksym_end = zend;
  311         } else
  312 #endif
  313                 lastaddr = (vm_offset_t)&end;
  314 
  315         fake_preload[i++] = 0;
  316         fake_preload[i] = 0;
  317         preload_metadata = (void *)fake_preload;
  318 
  319 
  320         pcpu_init(pcpup, 0, sizeof(struct pcpu));
  321         PCPU_SET(curthread, &thread0);
  322 
  323 #define KERNEL_TEXT_BASE (KERNBASE + 0x00200000)
  324         freemempos = 0x10200000;
  325         /* Define a macro to simplify memory allocation */
  326 #define valloc_pages(var, np)                   \
  327         alloc_pages((var).pv_pa, (np));         \
  328         (var).pv_va = (var).pv_pa + 0xb0000000;
  329 
  330 #define alloc_pages(var, np)                    \
  331         freemempos -= (np * PAGE_SIZE);         \
  332         (var) = freemempos;             \
  333         memset((char *)(var), 0, ((np) * PAGE_SIZE));
  334 
  335         while (((freemempos - L1_TABLE_SIZE) & (L1_TABLE_SIZE - 1)) != 0)
  336                 freemempos -= PAGE_SIZE;
  337         valloc_pages(kernel_l1pt, L1_TABLE_SIZE / PAGE_SIZE);
  338         for (loop = 0; loop < NUM_KERNEL_PTS; ++loop) {
  339                 if (!(loop % (PAGE_SIZE / L2_TABLE_SIZE_REAL))) {
  340                         valloc_pages(kernel_pt_table[loop],
  341                             L2_TABLE_SIZE / PAGE_SIZE);
  342                 } else {
  343                         kernel_pt_table[loop].pv_pa = freemempos +
  344                             (loop % (PAGE_SIZE / L2_TABLE_SIZE_REAL)) *
  345                             L2_TABLE_SIZE_REAL;
  346                         kernel_pt_table[loop].pv_va = 
  347                             kernel_pt_table[loop].pv_pa + 0xb0000000;
  348                 }
  349         }
  350         freemem_pt = freemempos;
  351         freemempos = 0x10100000;
  352         /*
  353          * Allocate a page for the system page mapped to V0x00000000
  354          * This page will just contain the system vectors and can be
  355          * shared by all processes.
  356          */
  357         valloc_pages(systempage, 1);
  358 
  359         /* Allocate stacks for all modes */
  360         valloc_pages(irqstack, IRQ_STACK_SIZE);
  361         valloc_pages(abtstack, ABT_STACK_SIZE);
  362         valloc_pages(undstack, UND_STACK_SIZE);
  363         valloc_pages(kernelstack, KSTACK_PAGES);
  364         alloc_pages(minidataclean.pv_pa, 1);
  365         valloc_pages(msgbufpv, round_page(MSGBUF_SIZE) / PAGE_SIZE);
  366 #ifdef ARM_USE_SMALL_ALLOC
  367         freemempos -= PAGE_SIZE;
  368         freemem_pt = trunc_page(freemem_pt);
  369         freemem_after = freemempos - ((freemem_pt - 0x10100000) /
  370             PAGE_SIZE) * sizeof(struct arm_small_page);
  371         arm_add_smallalloc_pages((void *)(freemem_after + 0xb0000000)
  372             , (void *)0xc0100000, freemem_pt - 0x10100000, 1);
  373         freemem_after -= ((freemem_after - 0x10001000) / PAGE_SIZE) *
  374             sizeof(struct arm_small_page);
  375         arm_add_smallalloc_pages((void *)(freemem_after + 0xb0000000)
  376         , (void *)0xc0001000, trunc_page(freemem_after) - 0x10001000, 0);
  377         freemempos = trunc_page(freemem_after);
  378         freemempos -= PAGE_SIZE;
  379 #endif
  380         /*
  381          * Allocate memory for the l1 and l2 page tables. The scheme to avoid
  382          * wasting memory by allocating the l1pt on the first 16k memory was
  383          * taken from NetBSD rpc_machdep.c. NKPT should be greater than 12 for
  384          * this to work (which is supposed to be the case).
  385          */
  386 
  387         /*
  388          * Now we start construction of the L1 page table
  389          * We start by mapping the L2 page tables into the L1.
  390          * This means that we can replace L1 mappings later on if necessary
  391          */
  392         l1pagetable = kernel_l1pt.pv_va;
  393 
  394         /* Map the L2 pages tables in the L1 page table */
  395         pmap_link_l2pt(l1pagetable, ARM_VECTORS_HIGH & ~(0x00100000 - 1),
  396             &kernel_pt_table[KERNEL_PT_SYS]);
  397         pmap_link_l2pt(l1pagetable, IXP425_IO_VBASE,
  398                         &kernel_pt_table[KERNEL_PT_IO]);
  399         pmap_link_l2pt(l1pagetable, IXP425_MCU_VBASE,
  400                         &kernel_pt_table[KERNEL_PT_IO + 1]);
  401         pmap_link_l2pt(l1pagetable, IXP425_PCI_MEM_VBASE,
  402                         &kernel_pt_table[KERNEL_PT_IO + 2]);
  403         pmap_link_l2pt(l1pagetable, KERNBASE,
  404             &kernel_pt_table[KERNEL_PT_BEFOREKERN]);
  405         pmap_map_chunk(l1pagetable, KERNBASE, SDRAM_START, 0x100000,
  406             VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
  407         pmap_map_chunk(l1pagetable, KERNBASE + 0x100000, SDRAM_START + 0x100000,
  408             0x100000, VM_PROT_READ|VM_PROT_WRITE, PTE_PAGETABLE);
  409         pmap_map_chunk(l1pagetable, KERNBASE + 0x200000, SDRAM_START + 0x200000,
  410            (((uint32_t)(lastaddr) - KERNBASE - 0x200000) + L1_S_SIZE) & ~(L1_S_SIZE - 1),
  411             VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
  412         freemem_after = ((int)lastaddr + PAGE_SIZE) & ~(PAGE_SIZE - 1);
  413         afterkern = round_page(((vm_offset_t)lastaddr + L1_S_SIZE) & ~(L1_S_SIZE 
  414             - 1));
  415         for (i = 0; i < KERNEL_PT_AFKERNEL_NUM; i++) {
  416                 pmap_link_l2pt(l1pagetable, afterkern + i * 0x00100000,
  417                     &kernel_pt_table[KERNEL_PT_AFKERNEL + i]);
  418         }
  419         pmap_map_entry(l1pagetable, afterkern, minidataclean.pv_pa, 
  420             VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
  421         
  422 
  423 #ifdef ARM_USE_SMALL_ALLOC
  424         if ((freemem_after + 2 * PAGE_SIZE) <= afterkern) {
  425                 arm_add_smallalloc_pages((void *)(freemem_after),
  426                     (void*)(freemem_after + PAGE_SIZE),
  427                     afterkern - (freemem_after + PAGE_SIZE), 0);
  428                     
  429         }
  430 #endif
  431 
  432         /* Map the Mini-Data cache clean area. */
  433         xscale_setup_minidata(l1pagetable, afterkern,
  434             minidataclean.pv_pa);
  435 
  436         /* Map the vector page. */
  437         pmap_map_entry(l1pagetable, ARM_VECTORS_HIGH, systempage.pv_pa,
  438             VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
  439         pmap_devmap_bootstrap(l1pagetable, ixp425_devmap);
  440         /*
  441          * Give the XScale global cache clean code an appropriately
  442          * sized chunk of unmapped VA space starting at 0xff000000
  443          * (our device mappings end before this address).
  444          */
  445         xscale_cache_clean_addr = 0xff000000U;
  446 
  447         cpu_domains((DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL*2)) | DOMAIN_CLIENT);
  448         setttb(kernel_l1pt.pv_pa);
  449         cpu_tlb_flushID();
  450         cpu_domains(DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL*2));
  451         /*
  452          * Pages were allocated during the secondary bootstrap for the
  453          * stacks for different CPU modes.
  454          * We must now set the r13 registers in the different CPU modes to
  455          * point to these stacks.
  456          * Since the ARM stacks use STMFD etc. we must set r13 to the top end
  457          * of the stack memory.
  458          */
  459 
  460                                    
  461         set_stackptr(PSR_IRQ32_MODE,
  462             irqstack.pv_va + IRQ_STACK_SIZE * PAGE_SIZE);
  463         set_stackptr(PSR_ABT32_MODE,
  464             abtstack.pv_va + ABT_STACK_SIZE * PAGE_SIZE);
  465         set_stackptr(PSR_UND32_MODE,
  466             undstack.pv_va + UND_STACK_SIZE * PAGE_SIZE);
  467 
  468 
  469 
  470         /*
  471          * We must now clean the cache again....
  472          * Cleaning may be done by reading new data to displace any
  473          * dirty data in the cache. This will have happened in setttb()
  474          * but since we are boot strapping the addresses used for the read
  475          * may have just been remapped and thus the cache could be out
  476          * of sync. A re-clean after the switch will cure this.
  477          * After booting there are no gross reloations of the kernel thus
  478          * this problem will not occur after initarm().
  479          */
  480         cpu_idcache_wbinv_all();
  481         /*
  482          * Fetch the SDRAM start/size from the ixp425 SDRAM configration
  483          * registers.
  484          */
  485         cninit();
  486         memsize = ixp425_sdram_size();
  487         physmem = memsize / PAGE_SIZE;
  488 
  489         /* Set stack for exception handlers */
  490         
  491         data_abort_handler_address = (u_int)data_abort_handler;
  492         prefetch_abort_handler_address = (u_int)prefetch_abort_handler;
  493         undefined_handler_address = (u_int)undefinedinstruction_bounce;
  494         undefined_init();
  495                                 
  496         proc_linkup(&proc0, &ksegrp0, &thread0);
  497         thread0.td_kstack = kernelstack.pv_va;
  498         thread0.td_pcb = (struct pcb *)
  499                 (thread0.td_kstack + KSTACK_PAGES * PAGE_SIZE) - 1;
  500         thread0.td_pcb->pcb_flags = 0;
  501         thread0.td_frame = &proc0_tf;
  502         pcpup->pc_curpcb = thread0.td_pcb;
  503         
  504         /* Enable MMU, I-cache, D-cache, write buffer. */
  505 
  506         arm_vector_init(ARM_VECTORS_HIGH, ARM_VEC_ALL);
  507 
  508 
  509 
  510         pmap_curmaxkvaddr = afterkern + PAGE_SIZE;
  511         dump_avail[0] = 0x10000000;
  512         dump_avail[1] = 0x10000000 + memsize;
  513         dump_avail[2] = 0;
  514         dump_avail[3] = 0;
  515                                         
  516         pmap_bootstrap(pmap_curmaxkvaddr, 
  517             0xd0000000, &kernel_l1pt);
  518         msgbufp = (void*)msgbufpv.pv_va;
  519         msgbufinit(msgbufp, MSGBUF_SIZE);
  520         mutex_init();
  521         
  522         i = 0;
  523 #ifdef ARM_USE_SMALL_ALLOC
  524         phys_avail[i++] = 0x10000000;
  525         phys_avail[i++] = 0x10001000;   /*
  526                                          *XXX: Gross hack to get our
  527                                          * pages in the vm_page_array
  528                                          . */
  529 #endif
  530         phys_avail[i++] = round_page(virtual_avail - KERNBASE + SDRAM_START);
  531         phys_avail[i++] = trunc_page(0x10000000 + memsize - 1);
  532         phys_avail[i++] = 0;
  533         phys_avail[i] = 0;
  534         
  535         /* Do basic tuning, hz etc */
  536         init_param1();
  537         init_param2(physmem);
  538         kdb_init();
  539         return ((void *)(kernelstack.pv_va + USPACE_SVC_STACK_TOP -
  540             sizeof(struct pcb)));
  541 }

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