The Design and Implementation of the FreeBSD Operating System, Second Edition
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FreeBSD/Linux Kernel Cross Reference
sys/arm/xscale/ixp425/avila_machdep.c

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    1 /*      $NetBSD: hpc_machdep.c,v 1.70 2003/09/16 08:18:22 agc Exp $     */
    2 
    3 /*-
    4  * Copyright (c) 1994-1998 Mark Brinicombe.
    5  * Copyright (c) 1994 Brini.
    6  * All rights reserved.
    7  *
    8  * This code is derived from software written for Brini by Mark Brinicombe
    9  *
   10  * Redistribution and use in source and binary forms, with or without
   11  * modification, are permitted provided that the following conditions
   12  * are met:
   13  * 1. Redistributions of source code must retain the above copyright
   14  *    notice, this list of conditions and the following disclaimer.
   15  * 2. Redistributions in binary form must reproduce the above copyright
   16  *    notice, this list of conditions and the following disclaimer in the
   17  *    documentation and/or other materials provided with the distribution.
   18  * 3. All advertising materials mentioning features or use of this software
   19  *    must display the following acknowledgement:
   20  *      This product includes software developed by Brini.
   21  * 4. The name of the company nor the name of the author may be used to
   22  *    endorse or promote products derived from this software without specific
   23  *    prior written permission.
   24  *
   25  * THIS SOFTWARE IS PROVIDED BY BRINI ``AS IS'' AND ANY EXPRESS OR IMPLIED
   26  * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
   27  * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
   28  * IN NO EVENT SHALL BRINI OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
   29  * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
   30  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
   31  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
   32  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
   33  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
   34  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
   35  * SUCH DAMAGE.
   36  *
   37  * RiscBSD kernel project
   38  *
   39  * machdep.c
   40  *
   41  * Machine dependant functions for kernel setup
   42  *
   43  * This file needs a lot of work. 
   44  *
   45  * Created      : 17/09/94
   46  */
   47 
   48 #include "opt_msgbuf.h"
   49 #include "opt_ddb.h"
   50 
   51 #include <sys/cdefs.h>
   52 __FBSDID("$FreeBSD$");
   53 
   54 #define _ARM32_BUS_DMA_PRIVATE
   55 #include <sys/param.h>
   56 #include <sys/systm.h>
   57 #include <sys/sysproto.h>
   58 #include <sys/signalvar.h>
   59 #include <sys/imgact.h>
   60 #include <sys/kernel.h>
   61 #include <sys/ktr.h>
   62 #include <sys/linker.h>
   63 #include <sys/lock.h>
   64 #include <sys/malloc.h>
   65 #include <sys/mutex.h>
   66 #include <sys/pcpu.h>
   67 #include <sys/proc.h>
   68 #include <sys/ptrace.h>
   69 #include <sys/cons.h>
   70 #include <sys/bio.h>
   71 #include <sys/bus.h>
   72 #include <sys/buf.h>
   73 #include <sys/exec.h>
   74 #include <sys/kdb.h>
   75 #include <sys/msgbuf.h>
   76 #include <machine/reg.h>
   77 #include <machine/cpu.h>
   78 
   79 #include <vm/vm.h>
   80 #include <vm/pmap.h>
   81 #include <vm/vm_object.h>
   82 #include <vm/vm_page.h>
   83 #include <vm/vm_pager.h>
   84 #include <vm/vm_map.h>
   85 #include <vm/vnode_pager.h>
   86 #include <machine/pmap.h>
   87 #include <machine/vmparam.h>
   88 #include <machine/pcb.h>
   89 #include <machine/undefined.h>
   90 #include <machine/machdep.h>
   91 #include <machine/metadata.h>
   92 #include <machine/armreg.h>
   93 #include <machine/bus.h>
   94 #include <sys/reboot.h>
   95 
   96 #include <arm/xscale/ixp425/ixp425reg.h>
   97 #include <arm/xscale/ixp425/ixp425var.h>
   98 
   99 #define KERNEL_PT_SYS           0       /* Page table for mapping proc0 zero page */
  100 #define KERNEL_PT_IO            1
  101 #define KERNEL_PT_IO_NUM        3
  102 #define KERNEL_PT_BEFOREKERN    KERNEL_PT_IO + KERNEL_PT_IO_NUM
  103 #define KERNEL_PT_AFKERNEL      KERNEL_PT_BEFOREKERN + 1        /* L2 table for mapping after kernel */
  104 #define KERNEL_PT_AFKERNEL_NUM  9
  105 
  106 /* this should be evenly divisable by PAGE_SIZE / L2_TABLE_SIZE_REAL (or 4) */
  107 #define NUM_KERNEL_PTS          (KERNEL_PT_AFKERNEL + KERNEL_PT_AFKERNEL_NUM)
  108 
  109 /* Define various stack sizes in pages */
  110 #define IRQ_STACK_SIZE  1
  111 #define ABT_STACK_SIZE  1
  112 #ifdef IPKDB
  113 #define UND_STACK_SIZE  2
  114 #else
  115 #define UND_STACK_SIZE  1
  116 #endif
  117 
  118 extern u_int data_abort_handler_address;
  119 extern u_int prefetch_abort_handler_address;
  120 extern u_int undefined_handler_address;
  121 
  122 struct pv_addr kernel_pt_table[NUM_KERNEL_PTS];
  123 
  124 extern void *_end;
  125 
  126 extern int *end;
  127 
  128 struct pcpu __pcpu;
  129 struct pcpu *pcpup = &__pcpu;
  130 
  131 /* Physical and virtual addresses for some global pages */
  132 
  133 vm_paddr_t phys_avail[10];
  134 vm_paddr_t dump_avail[4];
  135 vm_offset_t physical_pages;
  136 vm_offset_t clean_sva, clean_eva;
  137 
  138 struct pv_addr systempage;
  139 struct pv_addr msgbufpv;
  140 struct pv_addr irqstack;
  141 struct pv_addr undstack;
  142 struct pv_addr abtstack;
  143 struct pv_addr kernelstack;
  144 struct pv_addr minidataclean;
  145 
  146 static struct trapframe proc0_tf;
  147 
  148 /* Static device mappings. */
  149 static const struct pmap_devmap ixp425_devmap[] = {
  150         /* Physical/Virtual address for I/O space */
  151     {
  152         IXP425_IO_VBASE,
  153         IXP425_IO_HWBASE,
  154         IXP425_IO_SIZE,
  155         VM_PROT_READ|VM_PROT_WRITE,
  156         PTE_NOCACHE,
  157     },
  158 
  159         /* Expansion Bus */
  160     {
  161         IXP425_EXP_VBASE,
  162         IXP425_EXP_HWBASE,
  163         IXP425_EXP_SIZE,
  164         VM_PROT_READ|VM_PROT_WRITE,
  165         PTE_NOCACHE,
  166     },
  167 
  168         /* IXP425 PCI Configuration */
  169     {
  170         IXP425_PCI_VBASE,
  171         IXP425_PCI_HWBASE,
  172         IXP425_PCI_SIZE,
  173         VM_PROT_READ|VM_PROT_WRITE,
  174         PTE_NOCACHE,
  175     },
  176 
  177         /* SDRAM Controller */
  178     {
  179         IXP425_MCU_VBASE,
  180         IXP425_MCU_HWBASE,
  181         IXP425_MCU_SIZE,
  182         VM_PROT_READ|VM_PROT_WRITE,
  183         PTE_NOCACHE,
  184     },
  185 
  186         /* PCI Memory Space */
  187     {
  188         IXP425_PCI_MEM_VBASE,
  189         IXP425_PCI_MEM_HWBASE,
  190         IXP425_PCI_MEM_SIZE,
  191         VM_PROT_READ|VM_PROT_WRITE,
  192         PTE_NOCACHE,
  193     },
  194         /* NPE-A Memory Space */
  195     {
  196         IXP425_NPE_A_VBASE,
  197         IXP425_NPE_A_HWBASE,
  198         IXP425_NPE_A_SIZE,
  199         VM_PROT_READ|VM_PROT_WRITE,
  200         PTE_NOCACHE,
  201     },
  202         /* NPE-B Memory Space */
  203     {
  204         IXP425_NPE_B_VBASE,
  205         IXP425_NPE_B_HWBASE,
  206         IXP425_NPE_B_SIZE,
  207         VM_PROT_READ|VM_PROT_WRITE,
  208         PTE_NOCACHE,
  209     },
  210         /* NPE-C Memory Space */
  211     {
  212         IXP425_NPE_C_VBASE,
  213         IXP425_NPE_C_HWBASE,
  214         IXP425_NPE_C_SIZE,
  215         VM_PROT_READ|VM_PROT_WRITE,
  216         PTE_NOCACHE,
  217     },
  218         /* MAC-A Memory Space */
  219     {
  220         IXP425_MAC_A_VBASE,
  221         IXP425_MAC_A_HWBASE,
  222         IXP425_MAC_A_SIZE,
  223         VM_PROT_READ|VM_PROT_WRITE,
  224         PTE_NOCACHE,
  225     },
  226         /* MAC-B Memory Space */
  227     {
  228         IXP425_MAC_B_VBASE,
  229         IXP425_MAC_B_HWBASE,
  230         IXP425_MAC_B_SIZE,
  231         VM_PROT_READ|VM_PROT_WRITE,
  232         PTE_NOCACHE,
  233     },
  234         /* Q-Mgr Memory Space */
  235     {
  236         IXP425_QMGR_VBASE,
  237         IXP425_QMGR_HWBASE,
  238         IXP425_QMGR_SIZE,
  239         VM_PROT_READ|VM_PROT_WRITE,
  240         PTE_NOCACHE,
  241     },
  242 
  243     {
  244         0,
  245         0,
  246         0,
  247         0,
  248         0,
  249     }
  250 };
  251 
  252 #define SDRAM_START 0x10000000
  253 
  254 #ifdef DDB
  255 extern vm_offset_t ksym_start, ksym_end;
  256 #endif
  257 
  258 extern vm_offset_t xscale_cache_clean_addr;
  259 
  260 void *
  261 initarm(void *arg, void *arg2)
  262 {
  263         struct pv_addr  kernel_l1pt;
  264         int loop;
  265         u_int l1pagetable;
  266         vm_offset_t freemempos;
  267         vm_offset_t freemem_pt;
  268         vm_offset_t afterkern;
  269         vm_offset_t freemem_after;
  270         vm_offset_t lastaddr;
  271 #ifdef DDB
  272         vm_offset_t zstart = 0, zend = 0;
  273 #endif
  274         int i;
  275         uint32_t fake_preload[35];
  276         uint32_t memsize;
  277 
  278         i = 0;
  279 
  280         set_cpufuncs();
  281         fake_preload[i++] = MODINFO_NAME;
  282         fake_preload[i++] = strlen("elf kernel") + 1;
  283         strcpy((char*)&fake_preload[i++], "elf kernel");
  284         i += 2;
  285         fake_preload[i++] = MODINFO_TYPE;
  286         fake_preload[i++] = strlen("elf kernel") + 1;
  287         strcpy((char*)&fake_preload[i++], "elf kernel");
  288         i += 2;
  289         fake_preload[i++] = MODINFO_ADDR;
  290         fake_preload[i++] = sizeof(vm_offset_t);
  291         fake_preload[i++] = KERNBASE + 0x00200000;
  292         fake_preload[i++] = MODINFO_SIZE;
  293         fake_preload[i++] = sizeof(uint32_t);
  294         fake_preload[i++] = (uint32_t)&end - KERNBASE - 0x00200000;
  295 #ifdef DDB
  296         if (*(uint32_t *)KERNVIRTADDR == MAGIC_TRAMP_NUMBER) {
  297                 fake_preload[i++] = MODINFO_METADATA|MODINFOMD_SSYM;
  298                 fake_preload[i++] = sizeof(vm_offset_t);
  299                 fake_preload[i++] = *(uint32_t *)(KERNVIRTADDR + 4);
  300                 fake_preload[i++] = MODINFO_METADATA|MODINFOMD_ESYM;
  301                 fake_preload[i++] = sizeof(vm_offset_t);
  302                 fake_preload[i++] = *(uint32_t *)(KERNVIRTADDR + 8);
  303                 lastaddr = *(uint32_t *)(KERNVIRTADDR + 8);
  304                 zend = lastaddr;
  305                 zstart = *(uint32_t *)(KERNVIRTADDR + 4);
  306                 ksym_start = zstart;
  307                 ksym_end = zend;
  308         } else
  309 #endif
  310                 lastaddr = (vm_offset_t)&end;
  311 
  312         fake_preload[i++] = 0;
  313         fake_preload[i] = 0;
  314         preload_metadata = (void *)fake_preload;
  315 
  316 
  317         pcpu_init(pcpup, 0, sizeof(struct pcpu));
  318         PCPU_SET(curthread, &thread0);
  319 
  320 #define KERNEL_TEXT_BASE (KERNBASE + 0x00200000)
  321         freemempos = 0x10200000;
  322         /* Define a macro to simplify memory allocation */
  323 #define valloc_pages(var, np)                   \
  324         alloc_pages((var).pv_pa, (np));         \
  325         (var).pv_va = (var).pv_pa + 0xb0000000;
  326 
  327 #define alloc_pages(var, np)                    \
  328         freemempos -= (np * PAGE_SIZE);         \
  329         (var) = freemempos;             \
  330         memset((char *)(var), 0, ((np) * PAGE_SIZE));
  331 
  332         while (((freemempos - L1_TABLE_SIZE) & (L1_TABLE_SIZE - 1)) != 0)
  333                 freemempos -= PAGE_SIZE;
  334         valloc_pages(kernel_l1pt, L1_TABLE_SIZE / PAGE_SIZE);
  335         for (loop = 0; loop < NUM_KERNEL_PTS; ++loop) {
  336                 if (!(loop % (PAGE_SIZE / L2_TABLE_SIZE_REAL))) {
  337                         valloc_pages(kernel_pt_table[loop],
  338                             L2_TABLE_SIZE / PAGE_SIZE);
  339                 } else {
  340                         kernel_pt_table[loop].pv_pa = freemempos +
  341                             (loop % (PAGE_SIZE / L2_TABLE_SIZE_REAL)) *
  342                             L2_TABLE_SIZE_REAL;
  343                         kernel_pt_table[loop].pv_va = 
  344                             kernel_pt_table[loop].pv_pa + 0xb0000000;
  345                 }
  346         }
  347         freemem_pt = freemempos;
  348         freemempos = 0x10100000;
  349         /*
  350          * Allocate a page for the system page mapped to V0x00000000
  351          * This page will just contain the system vectors and can be
  352          * shared by all processes.
  353          */
  354         valloc_pages(systempage, 1);
  355 
  356         /* Allocate stacks for all modes */
  357         valloc_pages(irqstack, IRQ_STACK_SIZE);
  358         valloc_pages(abtstack, ABT_STACK_SIZE);
  359         valloc_pages(undstack, UND_STACK_SIZE);
  360         valloc_pages(kernelstack, KSTACK_PAGES);
  361         alloc_pages(minidataclean.pv_pa, 1);
  362         valloc_pages(msgbufpv, round_page(MSGBUF_SIZE) / PAGE_SIZE);
  363 #ifdef ARM_USE_SMALL_ALLOC
  364         freemempos -= PAGE_SIZE;
  365         freemem_pt = trunc_page(freemem_pt);
  366         freemem_after = freemempos - ((freemem_pt - 0x10100000) /
  367             PAGE_SIZE) * sizeof(struct arm_small_page);
  368         arm_add_smallalloc_pages((void *)(freemem_after + 0xb0000000)
  369             , (void *)0xc0100000, freemem_pt - 0x10100000, 1);
  370         freemem_after -= ((freemem_after - 0x10001000) / PAGE_SIZE) *
  371             sizeof(struct arm_small_page);
  372         arm_add_smallalloc_pages((void *)(freemem_after + 0xb0000000)
  373         , (void *)0xc0001000, trunc_page(freemem_after) - 0x10001000, 0);
  374         freemempos = trunc_page(freemem_after);
  375         freemempos -= PAGE_SIZE;
  376 #endif
  377         /*
  378          * Allocate memory for the l1 and l2 page tables. The scheme to avoid
  379          * wasting memory by allocating the l1pt on the first 16k memory was
  380          * taken from NetBSD rpc_machdep.c. NKPT should be greater than 12 for
  381          * this to work (which is supposed to be the case).
  382          */
  383 
  384         /*
  385          * Now we start construction of the L1 page table
  386          * We start by mapping the L2 page tables into the L1.
  387          * This means that we can replace L1 mappings later on if necessary
  388          */
  389         l1pagetable = kernel_l1pt.pv_va;
  390 
  391         /* Map the L2 pages tables in the L1 page table */
  392         pmap_link_l2pt(l1pagetable, ARM_VECTORS_HIGH & ~(0x00100000 - 1),
  393             &kernel_pt_table[KERNEL_PT_SYS]);
  394         pmap_link_l2pt(l1pagetable, IXP425_IO_VBASE,
  395                         &kernel_pt_table[KERNEL_PT_IO]);
  396         pmap_link_l2pt(l1pagetable, IXP425_MCU_VBASE,
  397                         &kernel_pt_table[KERNEL_PT_IO + 1]);
  398         pmap_link_l2pt(l1pagetable, IXP425_PCI_MEM_VBASE,
  399                         &kernel_pt_table[KERNEL_PT_IO + 2]);
  400         pmap_link_l2pt(l1pagetable, KERNBASE,
  401             &kernel_pt_table[KERNEL_PT_BEFOREKERN]);
  402         pmap_map_chunk(l1pagetable, KERNBASE, SDRAM_START, 0x100000,
  403             VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
  404         pmap_map_chunk(l1pagetable, KERNBASE + 0x100000, SDRAM_START + 0x100000,
  405             0x100000, VM_PROT_READ|VM_PROT_WRITE, PTE_PAGETABLE);
  406         pmap_map_chunk(l1pagetable, KERNBASE + 0x200000, SDRAM_START + 0x200000,
  407            (((uint32_t)(lastaddr) - KERNBASE - 0x200000) + L1_S_SIZE) & ~(L1_S_SIZE - 1),
  408             VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
  409         freemem_after = ((int)lastaddr + PAGE_SIZE) & ~(PAGE_SIZE - 1);
  410         afterkern = round_page(((vm_offset_t)lastaddr + L1_S_SIZE) & ~(L1_S_SIZE 
  411             - 1));
  412         for (i = 0; i < KERNEL_PT_AFKERNEL_NUM; i++) {
  413                 pmap_link_l2pt(l1pagetable, afterkern + i * 0x00100000,
  414                     &kernel_pt_table[KERNEL_PT_AFKERNEL + i]);
  415         }
  416         pmap_map_entry(l1pagetable, afterkern, minidataclean.pv_pa, 
  417             VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
  418         
  419 
  420 #ifdef ARM_USE_SMALL_ALLOC
  421         if ((freemem_after + 2 * PAGE_SIZE) <= afterkern) {
  422                 arm_add_smallalloc_pages((void *)(freemem_after),
  423                     (void*)(freemem_after + PAGE_SIZE),
  424                     afterkern - (freemem_after + PAGE_SIZE), 0);
  425                     
  426         }
  427 #endif
  428 
  429         /* Map the Mini-Data cache clean area. */
  430         xscale_setup_minidata(l1pagetable, afterkern,
  431             minidataclean.pv_pa);
  432 
  433         /* Map the vector page. */
  434         pmap_map_entry(l1pagetable, ARM_VECTORS_HIGH, systempage.pv_pa,
  435             VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
  436         pmap_devmap_bootstrap(l1pagetable, ixp425_devmap);
  437         /*
  438          * Give the XScale global cache clean code an appropriately
  439          * sized chunk of unmapped VA space starting at 0xff000000
  440          * (our device mappings end before this address).
  441          */
  442         xscale_cache_clean_addr = 0xff000000U;
  443 
  444         cpu_domains((DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL*2)) | DOMAIN_CLIENT);
  445         setttb(kernel_l1pt.pv_pa);
  446         cpu_tlb_flushID();
  447         cpu_domains(DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL*2));
  448         /*
  449          * Pages were allocated during the secondary bootstrap for the
  450          * stacks for different CPU modes.
  451          * We must now set the r13 registers in the different CPU modes to
  452          * point to these stacks.
  453          * Since the ARM stacks use STMFD etc. we must set r13 to the top end
  454          * of the stack memory.
  455          */
  456 
  457                                    
  458         set_stackptr(PSR_IRQ32_MODE,
  459             irqstack.pv_va + IRQ_STACK_SIZE * PAGE_SIZE);
  460         set_stackptr(PSR_ABT32_MODE,
  461             abtstack.pv_va + ABT_STACK_SIZE * PAGE_SIZE);
  462         set_stackptr(PSR_UND32_MODE,
  463             undstack.pv_va + UND_STACK_SIZE * PAGE_SIZE);
  464 
  465 
  466 
  467         /*
  468          * We must now clean the cache again....
  469          * Cleaning may be done by reading new data to displace any
  470          * dirty data in the cache. This will have happened in setttb()
  471          * but since we are boot strapping the addresses used for the read
  472          * may have just been remapped and thus the cache could be out
  473          * of sync. A re-clean after the switch will cure this.
  474          * After booting there are no gross reloations of the kernel thus
  475          * this problem will not occur after initarm().
  476          */
  477         cpu_idcache_wbinv_all();
  478         /*
  479          * Fetch the SDRAM start/size from the ixp425 SDRAM configration
  480          * registers.
  481          */
  482         cninit();
  483         memsize = ixp425_sdram_size();
  484         physmem = memsize / PAGE_SIZE;
  485 
  486         /* Set stack for exception handlers */
  487         
  488         data_abort_handler_address = (u_int)data_abort_handler;
  489         prefetch_abort_handler_address = (u_int)prefetch_abort_handler;
  490         undefined_handler_address = (u_int)undefinedinstruction_bounce;
  491         undefined_init();
  492                                 
  493         proc_linkup0(&proc0, &thread0);
  494         thread0.td_kstack = kernelstack.pv_va;
  495         thread0.td_pcb = (struct pcb *)
  496                 (thread0.td_kstack + KSTACK_PAGES * PAGE_SIZE) - 1;
  497         thread0.td_pcb->pcb_flags = 0;
  498         thread0.td_frame = &proc0_tf;
  499         pcpup->pc_curpcb = thread0.td_pcb;
  500         
  501         /* Enable MMU, I-cache, D-cache, write buffer. */
  502 
  503         arm_vector_init(ARM_VECTORS_HIGH, ARM_VEC_ALL);
  504 
  505 
  506 
  507         pmap_curmaxkvaddr = afterkern + PAGE_SIZE;
  508         dump_avail[0] = 0x10000000;
  509         dump_avail[1] = 0x10000000 + memsize;
  510         dump_avail[2] = 0;
  511         dump_avail[3] = 0;
  512                                         
  513         pmap_bootstrap(pmap_curmaxkvaddr, 
  514             0xd0000000, &kernel_l1pt);
  515         msgbufp = (void*)msgbufpv.pv_va;
  516         msgbufinit(msgbufp, MSGBUF_SIZE);
  517         mutex_init();
  518         
  519         i = 0;
  520 #ifdef ARM_USE_SMALL_ALLOC
  521         phys_avail[i++] = 0x10000000;
  522         phys_avail[i++] = 0x10001000;   /*
  523                                          *XXX: Gross hack to get our
  524                                          * pages in the vm_page_array
  525                                          . */
  526 #endif
  527         phys_avail[i++] = round_page(virtual_avail - KERNBASE + SDRAM_START);
  528         phys_avail[i++] = trunc_page(0x10000000 + memsize - 1);
  529         phys_avail[i++] = 0;
  530         phys_avail[i] = 0;
  531         
  532         /* Do basic tuning, hz etc */
  533         init_param1();
  534         init_param2(physmem);
  535         kdb_init();
  536         return ((void *)(kernelstack.pv_va + USPACE_SVC_STACK_TOP -
  537             sizeof(struct pcb)));
  538 }

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