1 /* $NetBSD: hpc_machdep.c,v 1.70 2003/09/16 08:18:22 agc Exp $ */
2
3 /*-
4 * Copyright (c) 1994-1998 Mark Brinicombe.
5 * Copyright (c) 1994 Brini.
6 * All rights reserved.
7 *
8 * This code is derived from software written for Brini by Mark Brinicombe
9 *
10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions
12 * are met:
13 * 1. Redistributions of source code must retain the above copyright
14 * notice, this list of conditions and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright
16 * notice, this list of conditions and the following disclaimer in the
17 * documentation and/or other materials provided with the distribution.
18 * 3. All advertising materials mentioning features or use of this software
19 * must display the following acknowledgement:
20 * This product includes software developed by Brini.
21 * 4. The name of the company nor the name of the author may be used to
22 * endorse or promote products derived from this software without specific
23 * prior written permission.
24 *
25 * THIS SOFTWARE IS PROVIDED BY BRINI ``AS IS'' AND ANY EXPRESS OR IMPLIED
26 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
27 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
28 * IN NO EVENT SHALL BRINI OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
29 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
30 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
31 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
32 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
33 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
34 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
35 * SUCH DAMAGE.
36 *
37 * RiscBSD kernel project
38 *
39 * machdep.c
40 *
41 * Machine dependant functions for kernel setup
42 *
43 * This file needs a lot of work.
44 *
45 * Created : 17/09/94
46 */
47
48 #include "opt_msgbuf.h"
49
50 #include <sys/cdefs.h>
51 __FBSDID("$FreeBSD$");
52
53 #define _ARM32_BUS_DMA_PRIVATE
54 #include <sys/param.h>
55 #include <sys/systm.h>
56 #include <sys/sysproto.h>
57 #include <sys/signalvar.h>
58 #include <sys/imgact.h>
59 #include <sys/kernel.h>
60 #include <sys/ktr.h>
61 #include <sys/linker.h>
62 #include <sys/lock.h>
63 #include <sys/malloc.h>
64 #include <sys/mutex.h>
65 #include <sys/pcpu.h>
66 #include <sys/proc.h>
67 #include <sys/ptrace.h>
68 #include <sys/cons.h>
69 #include <sys/bio.h>
70 #include <sys/bus.h>
71 #include <sys/buf.h>
72 #include <sys/exec.h>
73 #include <sys/kdb.h>
74 #include <sys/msgbuf.h>
75 #include <machine/reg.h>
76 #include <machine/cpu.h>
77
78 #include <vm/vm.h>
79 #include <vm/pmap.h>
80 #include <vm/vm_object.h>
81 #include <vm/vm_page.h>
82 #include <vm/vm_pager.h>
83 #include <vm/vm_map.h>
84 #include <vm/vnode_pager.h>
85 #include <machine/pmap.h>
86 #include <machine/vmparam.h>
87 #include <machine/pcb.h>
88 #include <machine/undefined.h>
89 #include <machine/machdep.h>
90 #include <machine/metadata.h>
91 #include <machine/armreg.h>
92 #include <machine/bus.h>
93 #include <sys/reboot.h>
94
95 #include <arm/xscale/ixp425/ixp425reg.h>
96 #include <arm/xscale/ixp425/ixp425var.h>
97
98 #define KERNEL_PT_SYS 0 /* Page table for mapping proc0 zero page */
99 #define KERNEL_PT_IO 1
100 #define KERNEL_PT_IO_NUM 3
101 #define KERNEL_PT_BEFOREKERN KERNEL_PT_IO + KERNEL_PT_IO_NUM
102 #define KERNEL_PT_AFKERNEL KERNEL_PT_BEFOREKERN + 1 /* L2 table for mapping after kernel */
103 #define KERNEL_PT_AFKERNEL_NUM 9
104
105 /* this should be evenly divisable by PAGE_SIZE / L2_TABLE_SIZE_REAL (or 4) */
106 #define NUM_KERNEL_PTS (KERNEL_PT_AFKERNEL + KERNEL_PT_AFKERNEL_NUM)
107
108 /* Define various stack sizes in pages */
109 #define IRQ_STACK_SIZE 1
110 #define ABT_STACK_SIZE 1
111 #define UND_STACK_SIZE 1
112
113 extern u_int data_abort_handler_address;
114 extern u_int prefetch_abort_handler_address;
115 extern u_int undefined_handler_address;
116
117 struct pv_addr kernel_pt_table[NUM_KERNEL_PTS];
118
119 extern void *_end;
120
121 extern int *end;
122
123 struct pcpu __pcpu;
124 struct pcpu *pcpup = &__pcpu;
125
126 /* Physical and virtual addresses for some global pages */
127
128 vm_paddr_t phys_avail[10];
129 vm_paddr_t dump_avail[4];
130 vm_offset_t physical_pages;
131
132 struct pv_addr systempage;
133 struct pv_addr msgbufpv;
134 struct pv_addr irqstack;
135 struct pv_addr undstack;
136 struct pv_addr abtstack;
137 struct pv_addr kernelstack;
138 struct pv_addr minidataclean;
139
140 static struct trapframe proc0_tf;
141
142 /* Static device mappings. */
143 static const struct pmap_devmap ixp425_devmap[] = {
144 /* Physical/Virtual address for I/O space */
145 {
146 IXP425_IO_VBASE,
147 IXP425_IO_HWBASE,
148 IXP425_IO_SIZE,
149 VM_PROT_READ|VM_PROT_WRITE,
150 PTE_NOCACHE,
151 },
152
153 /* Expansion Bus */
154 {
155 IXP425_EXP_VBASE,
156 IXP425_EXP_HWBASE,
157 IXP425_EXP_SIZE,
158 VM_PROT_READ|VM_PROT_WRITE,
159 PTE_NOCACHE,
160 },
161
162 /* IXP425 PCI Configuration */
163 {
164 IXP425_PCI_VBASE,
165 IXP425_PCI_HWBASE,
166 IXP425_PCI_SIZE,
167 VM_PROT_READ|VM_PROT_WRITE,
168 PTE_NOCACHE,
169 },
170
171 /* SDRAM Controller */
172 {
173 IXP425_MCU_VBASE,
174 IXP425_MCU_HWBASE,
175 IXP425_MCU_SIZE,
176 VM_PROT_READ|VM_PROT_WRITE,
177 PTE_NOCACHE,
178 },
179
180 /* PCI Memory Space */
181 {
182 IXP425_PCI_MEM_VBASE,
183 IXP425_PCI_MEM_HWBASE,
184 IXP425_PCI_MEM_SIZE,
185 VM_PROT_READ|VM_PROT_WRITE,
186 PTE_NOCACHE,
187 },
188 /* NPE-A Memory Space */
189 {
190 IXP425_NPE_A_VBASE,
191 IXP425_NPE_A_HWBASE,
192 IXP425_NPE_A_SIZE,
193 VM_PROT_READ|VM_PROT_WRITE,
194 PTE_NOCACHE,
195 },
196 /* NPE-B Memory Space */
197 {
198 IXP425_NPE_B_VBASE,
199 IXP425_NPE_B_HWBASE,
200 IXP425_NPE_B_SIZE,
201 VM_PROT_READ|VM_PROT_WRITE,
202 PTE_NOCACHE,
203 },
204 /* NPE-C Memory Space */
205 {
206 IXP425_NPE_C_VBASE,
207 IXP425_NPE_C_HWBASE,
208 IXP425_NPE_C_SIZE,
209 VM_PROT_READ|VM_PROT_WRITE,
210 PTE_NOCACHE,
211 },
212 /* MAC-A Memory Space */
213 {
214 IXP425_MAC_A_VBASE,
215 IXP425_MAC_A_HWBASE,
216 IXP425_MAC_A_SIZE,
217 VM_PROT_READ|VM_PROT_WRITE,
218 PTE_NOCACHE,
219 },
220 /* MAC-B Memory Space */
221 {
222 IXP425_MAC_B_VBASE,
223 IXP425_MAC_B_HWBASE,
224 IXP425_MAC_B_SIZE,
225 VM_PROT_READ|VM_PROT_WRITE,
226 PTE_NOCACHE,
227 },
228 /* Q-Mgr Memory Space */
229 {
230 IXP425_QMGR_VBASE,
231 IXP425_QMGR_HWBASE,
232 IXP425_QMGR_SIZE,
233 VM_PROT_READ|VM_PROT_WRITE,
234 PTE_NOCACHE,
235 },
236
237 {
238 0,
239 0,
240 0,
241 0,
242 0,
243 }
244 };
245
246 #define SDRAM_START 0x10000000
247
248 extern vm_offset_t xscale_cache_clean_addr;
249
250 void *
251 initarm(void *arg, void *arg2)
252 {
253 struct pv_addr kernel_l1pt;
254 int loop, i;
255 u_int l1pagetable;
256 vm_offset_t freemempos;
257 vm_offset_t freemem_pt;
258 vm_offset_t afterkern;
259 vm_offset_t freemem_after;
260 vm_offset_t lastaddr;
261 uint32_t memsize;
262
263 set_cpufuncs();
264 lastaddr = fake_preload_metadata();
265 pcpu_init(pcpup, 0, sizeof(struct pcpu));
266 PCPU_SET(curthread, &thread0);
267
268 freemempos = 0x10200000;
269 /* Define a macro to simplify memory allocation */
270 #define valloc_pages(var, np) \
271 alloc_pages((var).pv_pa, (np)); \
272 (var).pv_va = (var).pv_pa + 0xb0000000;
273
274 #define alloc_pages(var, np) \
275 freemempos -= (np * PAGE_SIZE); \
276 (var) = freemempos; \
277 memset((char *)(var), 0, ((np) * PAGE_SIZE));
278
279 while (((freemempos - L1_TABLE_SIZE) & (L1_TABLE_SIZE - 1)) != 0)
280 freemempos -= PAGE_SIZE;
281 valloc_pages(kernel_l1pt, L1_TABLE_SIZE / PAGE_SIZE);
282 for (loop = 0; loop < NUM_KERNEL_PTS; ++loop) {
283 if (!(loop % (PAGE_SIZE / L2_TABLE_SIZE_REAL))) {
284 valloc_pages(kernel_pt_table[loop],
285 L2_TABLE_SIZE / PAGE_SIZE);
286 } else {
287 kernel_pt_table[loop].pv_pa = freemempos +
288 (loop % (PAGE_SIZE / L2_TABLE_SIZE_REAL)) *
289 L2_TABLE_SIZE_REAL;
290 kernel_pt_table[loop].pv_va =
291 kernel_pt_table[loop].pv_pa + 0xb0000000;
292 }
293 }
294 freemem_pt = freemempos;
295 freemempos = 0x10100000;
296 /*
297 * Allocate a page for the system page mapped to V0x00000000
298 * This page will just contain the system vectors and can be
299 * shared by all processes.
300 */
301 valloc_pages(systempage, 1);
302
303 /* Allocate stacks for all modes */
304 valloc_pages(irqstack, IRQ_STACK_SIZE);
305 valloc_pages(abtstack, ABT_STACK_SIZE);
306 valloc_pages(undstack, UND_STACK_SIZE);
307 valloc_pages(kernelstack, KSTACK_PAGES);
308 alloc_pages(minidataclean.pv_pa, 1);
309 valloc_pages(msgbufpv, round_page(MSGBUF_SIZE) / PAGE_SIZE);
310 #ifdef ARM_USE_SMALL_ALLOC
311 freemempos -= PAGE_SIZE;
312 freemem_pt = trunc_page(freemem_pt);
313 freemem_after = freemempos - ((freemem_pt - 0x10100000) /
314 PAGE_SIZE) * sizeof(struct arm_small_page);
315 arm_add_smallalloc_pages((void *)(freemem_after + 0xb0000000)
316 , (void *)0xc0100000, freemem_pt - 0x10100000, 1);
317 freemem_after -= ((freemem_after - 0x10001000) / PAGE_SIZE) *
318 sizeof(struct arm_small_page);
319 arm_add_smallalloc_pages((void *)(freemem_after + 0xb0000000)
320 , (void *)0xc0001000, trunc_page(freemem_after) - 0x10001000, 0);
321 freemempos = trunc_page(freemem_after);
322 freemempos -= PAGE_SIZE;
323 #endif
324 /*
325 * Allocate memory for the l1 and l2 page tables. The scheme to avoid
326 * wasting memory by allocating the l1pt on the first 16k memory was
327 * taken from NetBSD rpc_machdep.c. NKPT should be greater than 12 for
328 * this to work (which is supposed to be the case).
329 */
330
331 /*
332 * Now we start construction of the L1 page table
333 * We start by mapping the L2 page tables into the L1.
334 * This means that we can replace L1 mappings later on if necessary
335 */
336 l1pagetable = kernel_l1pt.pv_va;
337
338 /* Map the L2 pages tables in the L1 page table */
339 pmap_link_l2pt(l1pagetable, ARM_VECTORS_HIGH & ~(0x00100000 - 1),
340 &kernel_pt_table[KERNEL_PT_SYS]);
341 pmap_link_l2pt(l1pagetable, IXP425_IO_VBASE,
342 &kernel_pt_table[KERNEL_PT_IO]);
343 pmap_link_l2pt(l1pagetable, IXP425_MCU_VBASE,
344 &kernel_pt_table[KERNEL_PT_IO + 1]);
345 pmap_link_l2pt(l1pagetable, IXP425_PCI_MEM_VBASE,
346 &kernel_pt_table[KERNEL_PT_IO + 2]);
347 pmap_link_l2pt(l1pagetable, KERNBASE,
348 &kernel_pt_table[KERNEL_PT_BEFOREKERN]);
349 pmap_map_chunk(l1pagetable, KERNBASE, SDRAM_START, 0x100000,
350 VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
351 pmap_map_chunk(l1pagetable, KERNBASE + 0x100000, SDRAM_START + 0x100000,
352 0x100000, VM_PROT_READ|VM_PROT_WRITE, PTE_PAGETABLE);
353 pmap_map_chunk(l1pagetable, KERNBASE + 0x200000, SDRAM_START + 0x200000,
354 (((uint32_t)(lastaddr) - KERNBASE - 0x200000) + L1_S_SIZE) & ~(L1_S_SIZE - 1),
355 VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
356 freemem_after = ((int)lastaddr + PAGE_SIZE) & ~(PAGE_SIZE - 1);
357 afterkern = round_page(((vm_offset_t)lastaddr + L1_S_SIZE) & ~(L1_S_SIZE
358 - 1));
359 for (i = 0; i < KERNEL_PT_AFKERNEL_NUM; i++) {
360 pmap_link_l2pt(l1pagetable, afterkern + i * 0x00100000,
361 &kernel_pt_table[KERNEL_PT_AFKERNEL + i]);
362 }
363 pmap_map_entry(l1pagetable, afterkern, minidataclean.pv_pa,
364 VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
365
366
367 #ifdef ARM_USE_SMALL_ALLOC
368 if ((freemem_after + 2 * PAGE_SIZE) <= afterkern) {
369 arm_add_smallalloc_pages((void *)(freemem_after),
370 (void*)(freemem_after + PAGE_SIZE),
371 afterkern - (freemem_after + PAGE_SIZE), 0);
372
373 }
374 #endif
375
376 /* Map the Mini-Data cache clean area. */
377 xscale_setup_minidata(l1pagetable, afterkern,
378 minidataclean.pv_pa);
379
380 /* Map the vector page. */
381 pmap_map_entry(l1pagetable, ARM_VECTORS_HIGH, systempage.pv_pa,
382 VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
383 pmap_devmap_bootstrap(l1pagetable, ixp425_devmap);
384 /*
385 * Give the XScale global cache clean code an appropriately
386 * sized chunk of unmapped VA space starting at 0xff000000
387 * (our device mappings end before this address).
388 */
389 xscale_cache_clean_addr = 0xff000000U;
390
391 cpu_domains((DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL*2)) | DOMAIN_CLIENT);
392 setttb(kernel_l1pt.pv_pa);
393 cpu_tlb_flushID();
394 cpu_domains(DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL*2));
395 /*
396 * Pages were allocated during the secondary bootstrap for the
397 * stacks for different CPU modes.
398 * We must now set the r13 registers in the different CPU modes to
399 * point to these stacks.
400 * Since the ARM stacks use STMFD etc. we must set r13 to the top end
401 * of the stack memory.
402 */
403
404
405 set_stackptr(PSR_IRQ32_MODE,
406 irqstack.pv_va + IRQ_STACK_SIZE * PAGE_SIZE);
407 set_stackptr(PSR_ABT32_MODE,
408 abtstack.pv_va + ABT_STACK_SIZE * PAGE_SIZE);
409 set_stackptr(PSR_UND32_MODE,
410 undstack.pv_va + UND_STACK_SIZE * PAGE_SIZE);
411
412
413
414 /*
415 * We must now clean the cache again....
416 * Cleaning may be done by reading new data to displace any
417 * dirty data in the cache. This will have happened in setttb()
418 * but since we are boot strapping the addresses used for the read
419 * may have just been remapped and thus the cache could be out
420 * of sync. A re-clean after the switch will cure this.
421 * After booting there are no gross reloations of the kernel thus
422 * this problem will not occur after initarm().
423 */
424 cpu_idcache_wbinv_all();
425 /*
426 * Fetch the SDRAM start/size from the ixp425 SDRAM configration
427 * registers.
428 */
429 cninit();
430 memsize = ixp425_sdram_size();
431 physmem = memsize / PAGE_SIZE;
432
433 /* Set stack for exception handlers */
434
435 data_abort_handler_address = (u_int)data_abort_handler;
436 prefetch_abort_handler_address = (u_int)prefetch_abort_handler;
437 undefined_handler_address = (u_int)undefinedinstruction_bounce;
438 undefined_init();
439
440 proc_linkup0(&proc0, &thread0);
441 thread0.td_kstack = kernelstack.pv_va;
442 thread0.td_pcb = (struct pcb *)
443 (thread0.td_kstack + KSTACK_PAGES * PAGE_SIZE) - 1;
444 thread0.td_pcb->pcb_flags = 0;
445 thread0.td_frame = &proc0_tf;
446 pcpup->pc_curpcb = thread0.td_pcb;
447
448 /* Enable MMU, I-cache, D-cache, write buffer. */
449
450 arm_vector_init(ARM_VECTORS_HIGH, ARM_VEC_ALL);
451
452
453
454 pmap_curmaxkvaddr = afterkern + PAGE_SIZE;
455 dump_avail[0] = 0x10000000;
456 dump_avail[1] = 0x10000000 + memsize;
457 dump_avail[2] = 0;
458 dump_avail[3] = 0;
459
460 pmap_bootstrap(pmap_curmaxkvaddr,
461 0xd0000000, &kernel_l1pt);
462 msgbufp = (void*)msgbufpv.pv_va;
463 msgbufinit(msgbufp, MSGBUF_SIZE);
464 mutex_init();
465
466 i = 0;
467 #ifdef ARM_USE_SMALL_ALLOC
468 phys_avail[i++] = 0x10000000;
469 phys_avail[i++] = 0x10001000; /*
470 *XXX: Gross hack to get our
471 * pages in the vm_page_array
472 . */
473 #endif
474 phys_avail[i++] = round_page(virtual_avail - KERNBASE + SDRAM_START);
475 phys_avail[i++] = trunc_page(0x10000000 + memsize - 1);
476 phys_avail[i++] = 0;
477 phys_avail[i] = 0;
478
479 /* Do basic tuning, hz etc */
480 init_param1();
481 init_param2(physmem);
482 kdb_init();
483 return ((void *)(kernelstack.pv_va + USPACE_SVC_STACK_TOP -
484 sizeof(struct pcb)));
485 }
Cache object: 30fa9a72aa32ca248048f5d3adacae2e
|