The Design and Implementation of the FreeBSD Operating System, Second Edition
Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)


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FreeBSD/Linux Kernel Cross Reference
sys/arm/xscale/ixp425/ixp425_a4x_io.S

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    1 /*      $NetBSD: ixp425_a4x_io.S,v 1.2 2005/12/11 12:16:51 christos Exp $       */
    2 
    3 /*
    4  * Copyright 2003 Wasabi Systems, Inc.
    5  * All rights reserved.
    6  *
    7  * Written by Steve C. Woodford for Wasabi Systems, Inc.
    8  *
    9  * Redistribution and use in source and binary forms, with or without
   10  * modification, are permitted provided that the following conditions
   11  * are met:
   12  * 1. Redistributions of source code must retain the above copyright
   13  *    notice, this list of conditions and the following disclaimer.
   14  * 2. Redistributions in binary form must reproduce the above copyright
   15  *    notice, this list of conditions and the following disclaimer in the
   16  *    documentation and/or other materials provided with the distribution.
   17  * 3. All advertising materials mentioning features or use of this software
   18  *    must display the following acknowledgement:
   19  *      This product includes software developed for the NetBSD Project by
   20  *      Wasabi Systems, Inc.
   21  * 4. The name of Wasabi Systems, Inc. may not be used to endorse
   22  *    or promote products derived from this software without specific prior
   23  *    written permission.
   24  *
   25  * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
   26  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
   27  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
   28  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL WASABI SYSTEMS, INC
   29  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
   30  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
   31  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
   32  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
   33  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
   34  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
   35  * POSSIBILITY OF SUCH DAMAGE.
   36  */
   37 
   38 /*      
   39  * There are simple bus space functions for IO registers mapped at
   40  * 32-bit aligned positions.  offset is multiplied by 4.  
   41  *
   42  * Based loosely on pxa2x0_a2x_io.S
   43  */
   44 
   45 #include <machine/asm.h>
   46 __FBSDID("$FreeBSD: releng/11.2/sys/arm/xscale/ixp425/ixp425_a4x_io.S 275519 2014-12-05 19:04:08Z andrew $");
   47 
   48 /*
   49  * bus_space I/O functions with offset*4
   50  */
   51 
   52 /*
   53  * Read single
   54  */
   55 ENTRY(a4x_bs_r_1)
   56         ldr     r0, [r1, r2, LSL #2]
   57         and     r0, r0, #0xff
   58         mov     pc, lr
   59 END(a4x_bs_r_1)
   60 
   61 ENTRY(a4x_bs_r_2)
   62         ldr     r0, [r1, r2, LSL #2]
   63         mov     r1, #0xff
   64         orr     r1, r1, r1, lsl #8
   65         and     r0, r0, r1
   66         mov     pc, lr
   67 END(a4x_bs_r_2)
   68 
   69 ENTRY(a4x_bs_r_4)
   70         ldr     r0, [r1, r2, LSL #2]
   71         mov     pc, lr
   72 END(a4x_bs_r_4)
   73 
   74 /*
   75  * Write single
   76  */
   77 ENTRY(a4x_bs_w_1)
   78         and     r3, r3, #0xff
   79         str     r3, [r1, r2, LSL #2]
   80         mov     pc, lr
   81 END(a4x_bs_w_1)
   82 
   83 ENTRY(a4x_bs_w_2)
   84         mov     r0, #0xff
   85         orr     r0, r0, r0, lsl #8
   86         and     r3, r3, r0
   87         str     r3, [r1, r2, LSL #2]
   88         mov     pc, lr
   89 END(a4x_bs_w_2)
   90 
   91 ENTRY(a4x_bs_w_4)
   92         str     r3, [r1, r2, LSL #2]
   93         mov     pc, lr
   94 END(a4x_bs_w_4)
   95 
   96 /*
   97  * Read multiple
   98  */
   99 ENTRY(a4x_bs_rm_1)
  100         add     r0, r1, r2, lsl #2
  101         ldr     r2, [sp, #0]
  102         mov     r1, r3
  103         teq     r2, #0
  104         moveq   pc, lr
  105 1:      ldr     r3, [r0]
  106         subs    r2, r2, #1
  107         strb    r3, [r1], #1
  108         bne     1b
  109         mov     pc, lr
  110 END(a4x_bs_rm_1)
  111 
  112 ENTRY(a4x_bs_rm_2)
  113         add     r0, r1, r2, lsl #2
  114         ldr     r2, [sp, #0]
  115         mov     r1, r3
  116         teq     r2, #0
  117         moveq   pc, lr
  118 1:      ldr     r3, [r0]
  119         subs    r2, r2, #1
  120         strh    r3, [r1], #2
  121         bne     1b
  122         mov     pc, lr
  123 END(a4x_bs_rm_2)
  124 
  125 /*
  126  * Write multiple
  127  */
  128 ENTRY(a4x_bs_wm_1)
  129         add     r0, r1, r2, lsl #2
  130         ldr     r2, [sp, #0]
  131         mov     r1, r3
  132         teq     r2, #0
  133         moveq   pc, lr
  134 1:      ldrb    r3, [r1], #1
  135         subs    r2, r2, #1
  136         str     r3, [r0]
  137         bne     1b
  138         mov     pc, lr
  139 END(a4x_bs_wm_1)
  140 
  141 ENTRY(a4x_bs_wm_2)
  142         add     r0, r1, r2, lsl #2
  143         ldr     r2, [sp, #0]
  144         mov     r1, r3
  145         teq     r2, #0
  146         moveq   pc, lr
  147 1:      ldrh    r3, [r1], #2
  148         subs    r2, r2, #1
  149         str     r3, [r0]
  150         bne     1b
  151         mov     pc, lr
  152 END(a4x_bs_wm_2)

Cache object: 910fa99854afd777ef7d588f62bbda27


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