1 /*-
2 * Copyright (c) 2006 Sam Leffler. All rights reserved.
3 *
4 * Redistribution and use in source and binary forms, with or without
5 * modification, are permitted provided that the following conditions
6 * are met:
7 * 1. Redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer.
9 * 2. Redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution.
12 *
13 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
14 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
15 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
16 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
17 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
18 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
19 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
20 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
21 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
22 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
23 *
24 * $FreeBSD$
25 */
26
27 #ifndef _IXP425_NPEVAR_H_
28 #define _IXP425_NPEVAR_H_
29
30 /*
31 * Intel (R) IXP400 Software NPE Image ID Definition
32 *
33 * Firmware Id's for current firmware image. These are typed by
34 * NPE ID and the feature set. Not all features are available
35 * on all NPE's. The Image ID has the following structure:
36 *
37 * Field [Bit Location]
38 * -----------------------------------
39 * Device ID [28..31]
40 * NPE ID [24..27]
41 * NPE Functionality ID [16..23]
42 * Major Release Number [8..15]
43 * Minor Release Number [0..7]
44 *
45 * The following "feature sets" are known to exist:
46 *
47 * HSS-0: supports 32 channelized and 4 packetized.
48 * HSS-0 + ATM + SPHY:
49 * For HSS, 16/32 channelized and 4/0 packetized.
50 * For ATM, AAL5, AAL0 and OAM for UTOPIA SPHY, 1 logical port, 32 VCs.
51 * Fast Path support.
52 * HSS-0 + ATM + MPHY:
53 * For HSS, 16/32 channelized and 4/0 packetized.
54 * For ATM, AAL5, AAL0 and OAM for UTOPIA MPHY, 1 logical port, 32 VCs.
55 * Fast Path support.
56 * ATM-Only:
57 * AAL5, AAL0 and OAM for UTOPIA MPHY, 12 logical ports, 32 VCs.
58 * Fast Path support.
59 * HSS-2:
60 * HSS-0 and HSS-1.
61 * Each HSS port supports 32 channelized and 4 packetized.
62 * ETH: Ethernet Rx/Tx which includes:
63 * MAC_FILTERING, MAC_LEARNING, SPANNING_TREE, FIREWALL
64 * ETH+VLAN Ethernet Rx/Tx which includes:
65 * MAC_FILTERING, MAC_LEARNING, SPANNING_TREE, FIREWALL, VLAN_QOS
66 * ETH+VLAN+HDR: Ethernet Rx/Tx which includes:
67 * SPANNING_TREE, FIREWALL, VLAN_QOS, HEADER_CONVERSION
68 */
69 #define NPEIMAGE_DEVID(id) (((id) >> 28) & 0xf)
70 #define NPEIMAGE_NPEID(id) (((id) >> 24) & 0xf)
71 #define NPEIMAGE_FUNCID(id) (((id) >> 16) & 0xff)
72 #define NPEIMAGE_MAJOR(id) (((id) >> 8) & 0xff)
73 #define NPEIMAGE_MINOR(id) (((id) >> 0) & 0xff)
74 #define NPEIMAGE_MAKEID(dev, npe, func, maj, min) \
75 ((((dev) & 0xf) << 28) | (((npe) & 0xf) << 24) | \
76 (((func) & 0xff) << 16) (((maj) & 0xff) << 8) | (((min) & 0xff) << 0))
77
78 /* XXX not right, revise */
79 /* NPE A Firmware Image Id's */
80 #define NPEFW_A_HSS0 0x00010000 /* HSS-0: 32 chan+4 packet */
81 #define NPEFW_A_HSS0_ATM_S_1 0x00020000 /* HSS-0+ATM UTOPIA SPHY (1 port) */
82 #define NPEFW_A_HSS0_ATM_M_1 0x00020000 /* HSS-0+ATM UTOPIA MPHY (1 port) */
83 #define NPEFW_A_ATM_M_12 0x00040000 /* ATM UTOPIA MPHY (12 ports) */
84 #define NPEFW_A_DMA 0x00150100 /* DMA only */
85 #define NPEFW_A_HSS2 0x00090000 /* HSS-0 + HSS-1 */
86 #define NPEFW_A_ETH 0x10800200 /* Basic Ethernet */
87 #define NPEFW_A_ETH_VLAN 0x10810200 /* NPEFW_A_ETH + VLAN QoS */
88 #define NPEFW_A_ETH_VLAN_HDR 0x10820200 /* NPEFW_A_ETH_VLAN + Hdr conv */
89 /* XXX ... more not included */
90
91 /* NPE B Firmware Image Id's */
92 #define NPEFW_B_ETH 0x01000200 /* Basic Ethernet */
93 #define NPEFW_B_ETH_VLAN 0x01010200 /* NPEFW_B_ETH + VLAN QoS */
94 #define NPEFW_B_ETH_VLAN_HDR 0x01020201 /* NPEFW_B_ETH_VLAN + Hdr conv */
95 #define NPEFW_B_DMA 0x01020100 /* DMA only */
96 /* XXX ... more not include */
97
98 /* NPE ID's */
99 #define NPE_A 0
100 #define NPE_B 1
101 #define NPE_C 2
102 #define NPE_MAX (NPE_C+1)
103
104 #define IXP425_NPE_A_IMAGEID 0x10820200
105 #define IXP425_NPE_B_IMAGEID 0x01020201
106 #define IXP425_NPE_C_IMAGEID 0x02050201
107
108 struct ixpnpe_softc;
109 struct ixpnpe_softc *ixpnpe_attach(device_t, int npeid);
110 void ixpnpe_detach(struct ixpnpe_softc *);
111 int ixpnpe_stopandreset(struct ixpnpe_softc *);
112 int ixpnpe_start(struct ixpnpe_softc *);
113 int ixpnpe_stop(struct ixpnpe_softc *);
114 int ixpnpe_init(struct ixpnpe_softc *);
115 int ixpnpe_getfunctionality(struct ixpnpe_softc *sc);
116
117 int ixpnpe_sendmsg_async(struct ixpnpe_softc *, const uint32_t msg[2]);
118 int ixpnpe_recvmsg_async(struct ixpnpe_softc *, uint32_t msg[2]);
119 int ixpnpe_sendandrecvmsg_sync(struct ixpnpe_softc *,
120 const uint32_t send[2], uint32_t recv[2]);
121 int ixpnpe_recvmsg_sync(struct ixpnpe_softc *, uint32_t msg[2]);
122 #endif /* _IXP425_NPEVAR_H_ */
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