The Design and Implementation of the FreeBSD Operating System, Second Edition
Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)


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FreeBSD/Linux Kernel Cross Reference
sys/arm/xscale/pxa/pxa_machdep.c

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    1 /*      $NetBSD: hpc_machdep.c,v 1.70 2003/09/16 08:18:22 agc Exp $     */
    2 
    3 /*-
    4  * Copyright (c) 1994-1998 Mark Brinicombe.
    5  * Copyright (c) 1994 Brini.
    6  * All rights reserved.
    7  *
    8  * This code is derived from software written for Brini by Mark Brinicombe
    9  *
   10  * Redistribution and use in source and binary forms, with or without
   11  * modification, are permitted provided that the following conditions
   12  * are met:
   13  * 1. Redistributions of source code must retain the above copyright
   14  *    notice, this list of conditions and the following disclaimer.
   15  * 2. Redistributions in binary form must reproduce the above copyright
   16  *    notice, this list of conditions and the following disclaimer in the
   17  *    documentation and/or other materials provided with the distribution.
   18  * 3. All advertising materials mentioning features or use of this software
   19  *    must display the following acknowledgement:
   20  *      This product includes software developed by Brini.
   21  * 4. The name of the company nor the name of the author may be used to
   22  *    endorse or promote products derived from this software without specific
   23  *    prior written permission.
   24  *
   25  * THIS SOFTWARE IS PROVIDED BY BRINI ``AS IS'' AND ANY EXPRESS OR IMPLIED
   26  * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
   27  * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
   28  * IN NO EVENT SHALL BRINI OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
   29  * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
   30  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
   31  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
   32  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
   33  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
   34  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
   35  * SUCH DAMAGE.
   36  *
   37  * RiscBSD kernel project
   38  *
   39  * machdep.c
   40  *
   41  * Machine dependent functions for kernel setup
   42  *
   43  * This file needs a lot of work.
   44  *
   45  * Created      : 17/09/94
   46  */
   47 
   48 #include "opt_ddb.h"
   49 #include "opt_kstack_pages.h"
   50 
   51 #include <sys/cdefs.h>
   52 __FBSDID("$FreeBSD: releng/11.2/sys/arm/xscale/pxa/pxa_machdep.c 331722 2018-03-29 02:50:57Z eadler $");
   53 
   54 #define _ARM32_BUS_DMA_PRIVATE
   55 #include <sys/param.h>
   56 #include <sys/systm.h>
   57 #include <sys/sysproto.h>
   58 #include <sys/signalvar.h>
   59 #include <sys/imgact.h>
   60 #include <sys/kernel.h>
   61 #include <sys/ktr.h>
   62 #include <sys/linker.h>
   63 #include <sys/lock.h>
   64 #include <sys/malloc.h>
   65 #include <sys/mutex.h>
   66 #include <sys/pcpu.h>
   67 #include <sys/proc.h>
   68 #include <sys/ptrace.h>
   69 #include <sys/cons.h>
   70 #include <sys/bio.h>
   71 #include <sys/bus.h>
   72 #include <sys/buf.h>
   73 #include <sys/exec.h>
   74 #include <sys/kdb.h>
   75 #include <sys/msgbuf.h>
   76 #include <sys/devmap.h>
   77 #include <machine/reg.h>
   78 #include <machine/cpu.h>
   79 
   80 #include <vm/vm.h>
   81 #include <vm/pmap.h>
   82 #include <vm/vm_object.h>
   83 #include <vm/vm_page.h>
   84 #include <vm/vm_map.h>
   85 #include <machine/vmparam.h>
   86 #include <machine/pcb.h>
   87 #include <machine/undefined.h>
   88 #include <machine/machdep.h>
   89 #include <machine/metadata.h>
   90 #include <machine/armreg.h>
   91 #include <machine/bus.h>
   92 #include <machine/physmem.h>
   93 #include <sys/reboot.h>
   94 
   95 #include <arm/xscale/pxa/pxareg.h>
   96 #include <arm/xscale/pxa/pxavar.h>
   97 
   98 #define KERNEL_PT_SYS           0       /* Page table for mapping proc0 zero page */
   99 #define KERNEL_PT_IOPXS         1
  100 #define KERNEL_PT_BEFOREKERN    2
  101 #define KERNEL_PT_AFKERNEL      3       /* L2 table for mapping after kernel */
  102 #define KERNEL_PT_AFKERNEL_NUM  9
  103 
  104 /* this should be evenly divisable by PAGE_SIZE / L2_TABLE_SIZE_REAL (or 4) */
  105 #define NUM_KERNEL_PTS          (KERNEL_PT_AFKERNEL + KERNEL_PT_AFKERNEL_NUM)
  106 
  107 struct pv_addr kernel_pt_table[NUM_KERNEL_PTS];
  108 
  109 /* Physical and virtual addresses for some global pages */
  110 
  111 struct pv_addr systempage;
  112 struct pv_addr msgbufpv;
  113 struct pv_addr irqstack;
  114 struct pv_addr undstack;
  115 struct pv_addr abtstack;
  116 struct pv_addr kernelstack;
  117 struct pv_addr minidataclean;
  118 
  119 static void     pxa_probe_sdram(bus_space_tag_t, bus_space_handle_t,
  120                     uint32_t *, uint32_t *);
  121 
  122 /* Static device mappings. */
  123 static const struct devmap_entry pxa_devmap[] = {
  124         /*
  125          * Map the on-board devices up into the KVA region so we don't muck
  126          * up user-space.
  127          */
  128         {
  129                 PXA2X0_PERIPH_START + PXA2X0_PERIPH_OFFSET,
  130                 PXA2X0_PERIPH_START,
  131                 PXA250_PERIPH_END - PXA2X0_PERIPH_START,
  132         },
  133         { 0, 0, 0, }
  134 };
  135 
  136 #define SDRAM_START 0xa0000000
  137 
  138 extern vm_offset_t xscale_cache_clean_addr;
  139 
  140 void *
  141 initarm(struct arm_boot_params *abp)
  142 {
  143         struct pv_addr  kernel_l1pt;
  144         struct pv_addr  dpcpu;
  145         int loop;
  146         u_int l1pagetable;
  147         vm_offset_t freemempos;
  148         vm_offset_t freemem_pt;
  149         vm_offset_t afterkern;
  150         vm_offset_t freemem_after;
  151         vm_offset_t lastaddr;
  152         int i, j;
  153         uint32_t memsize[PXA2X0_SDRAM_BANKS], memstart[PXA2X0_SDRAM_BANKS];
  154 
  155         lastaddr = parse_boot_param(abp);
  156         arm_physmem_kernaddr = abp->abp_physaddr;
  157         set_cpufuncs();
  158         pcpu_init(pcpup, 0, sizeof(struct pcpu));
  159         PCPU_SET(curthread, &thread0);
  160 
  161         /* Do basic tuning, hz etc */
  162         init_param1();
  163 
  164         freemempos = 0xa0200000;
  165         /* Define a macro to simplify memory allocation */
  166 #define valloc_pages(var, np)                   \
  167         alloc_pages((var).pv_pa, (np));         \
  168         (var).pv_va = (var).pv_pa + 0x20000000;
  169 
  170 #define alloc_pages(var, np)                    \
  171         freemempos -= (np * PAGE_SIZE);         \
  172         (var) = freemempos;             \
  173         memset((char *)(var), 0, ((np) * PAGE_SIZE));
  174 
  175         while (((freemempos - L1_TABLE_SIZE) & (L1_TABLE_SIZE - 1)) != 0)
  176                 freemempos -= PAGE_SIZE;
  177         valloc_pages(kernel_l1pt, L1_TABLE_SIZE / PAGE_SIZE);
  178         for (loop = 0; loop < NUM_KERNEL_PTS; ++loop) {
  179                 if (!(loop % (PAGE_SIZE / L2_TABLE_SIZE_REAL))) {
  180                         valloc_pages(kernel_pt_table[loop],
  181                             L2_TABLE_SIZE / PAGE_SIZE);
  182                 } else {
  183                         kernel_pt_table[loop].pv_pa = freemempos +
  184                             (loop % (PAGE_SIZE / L2_TABLE_SIZE_REAL)) *
  185                             L2_TABLE_SIZE_REAL;
  186                         kernel_pt_table[loop].pv_va =
  187                             kernel_pt_table[loop].pv_pa + 0x20000000;
  188                 }
  189         }
  190         freemem_pt = freemempos;
  191         freemempos = 0xa0100000;
  192         /*
  193          * Allocate a page for the system page mapped to V0x00000000
  194          * This page will just contain the system vectors and can be
  195          * shared by all processes.
  196          */
  197         valloc_pages(systempage, 1);
  198 
  199         /* Allocate dynamic per-cpu area. */
  200         valloc_pages(dpcpu, DPCPU_SIZE / PAGE_SIZE);
  201         dpcpu_init((void *)dpcpu.pv_va, 0);
  202 
  203         /* Allocate stacks for all modes */
  204         valloc_pages(irqstack, IRQ_STACK_SIZE);
  205         valloc_pages(abtstack, ABT_STACK_SIZE);
  206         valloc_pages(undstack, UND_STACK_SIZE);
  207         valloc_pages(kernelstack, kstack_pages);
  208         alloc_pages(minidataclean.pv_pa, 1);
  209         valloc_pages(msgbufpv, round_page(msgbufsize) / PAGE_SIZE);
  210         /*
  211          * Allocate memory for the l1 and l2 page tables. The scheme to avoid
  212          * wasting memory by allocating the l1pt on the first 16k memory was
  213          * taken from NetBSD rpc_machdep.c. NKPT should be greater than 12 for
  214          * this to work (which is supposed to be the case).
  215          */
  216 
  217         /*
  218          * Now we start construction of the L1 page table
  219          * We start by mapping the L2 page tables into the L1.
  220          * This means that we can replace L1 mappings later on if necessary
  221          */
  222         l1pagetable = kernel_l1pt.pv_va;
  223 
  224         /* Map the L2 pages tables in the L1 page table */
  225         pmap_link_l2pt(l1pagetable, rounddown2(ARM_VECTORS_HIGH, 0x00100000),
  226                        &kernel_pt_table[KERNEL_PT_SYS]);
  227 #if 0 /* XXXBJR: What is this?  Don't know if there's an analogue. */
  228         pmap_link_l2pt(l1pagetable, IQ80321_IOPXS_VBASE,
  229                         &kernel_pt_table[KERNEL_PT_IOPXS]);
  230 #endif
  231         pmap_link_l2pt(l1pagetable, KERNBASE,
  232             &kernel_pt_table[KERNEL_PT_BEFOREKERN]);
  233         pmap_map_chunk(l1pagetable, KERNBASE, SDRAM_START, 0x100000,
  234             VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
  235         pmap_map_chunk(l1pagetable, KERNBASE + 0x100000, SDRAM_START + 0x100000,
  236             0x100000, VM_PROT_READ|VM_PROT_WRITE, PTE_PAGETABLE);
  237         pmap_map_chunk(l1pagetable, KERNBASE + 0x200000, SDRAM_START + 0x200000,
  238            rounddown2(((uint32_t)(lastaddr) - KERNBASE - 0x200000) + L1_S_SIZE, L1_S_SIZE),
  239            VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
  240         freemem_after = rounddown2((int)lastaddr + PAGE_SIZE, PAGE_SIZE);
  241         afterkern = round_page(rounddown2((vm_offset_t)lastaddr + L1_S_SIZE, L1_S_SIZE));
  242         for (i = 0; i < KERNEL_PT_AFKERNEL_NUM; i++) {
  243                 pmap_link_l2pt(l1pagetable, afterkern + i * 0x00100000,
  244                     &kernel_pt_table[KERNEL_PT_AFKERNEL + i]);
  245         }
  246         pmap_map_entry(l1pagetable, afterkern, minidataclean.pv_pa,
  247             VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
  248 
  249 
  250         /* Map the Mini-Data cache clean area. */
  251         xscale_setup_minidata(l1pagetable, afterkern,
  252             minidataclean.pv_pa);
  253 
  254         /* Map the vector page. */
  255         pmap_map_entry(l1pagetable, ARM_VECTORS_HIGH, systempage.pv_pa,
  256             VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
  257         devmap_bootstrap(l1pagetable, pxa_devmap);
  258 
  259         /*
  260          * Give the XScale global cache clean code an appropriately
  261          * sized chunk of unmapped VA space starting at 0xff000000
  262          * (our device mappings end before this address).
  263          */
  264         xscale_cache_clean_addr = 0xff000000U;
  265 
  266         cpu_domains((DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL*2)) | DOMAIN_CLIENT);
  267         cpu_setttb(kernel_l1pt.pv_pa);
  268         cpu_tlb_flushID();
  269         cpu_domains(DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL*2));
  270 
  271         /*
  272          * Pages were allocated during the secondary bootstrap for the
  273          * stacks for different CPU modes.
  274          * We must now set the r13 registers in the different CPU modes to
  275          * point to these stacks.
  276          * Since the ARM stacks use STMFD etc. we must set r13 to the top end
  277          * of the stack memory.
  278          */
  279         set_stackptrs(0);
  280 
  281         /*
  282          * We must now clean the cache again....
  283          * Cleaning may be done by reading new data to displace any
  284          * dirty data in the cache. This will have happened in cpu_setttb()
  285          * but since we are boot strapping the addresses used for the read
  286          * may have just been remapped and thus the cache could be out
  287          * of sync. A re-clean after the switch will cure this.
  288          * After booting there are no gross relocations of the kernel thus
  289          * this problem will not occur after initarm().
  290          */
  291         cpu_idcache_wbinv_all();
  292         cpu_setup();
  293 
  294         /*
  295          * Sort out bus_space for on-board devices.
  296          */
  297         pxa_obio_tag_init();
  298 
  299         /*
  300          * Fetch the SDRAM start/size from the PXA2X0 SDRAM configration
  301          * registers.
  302          */
  303         pxa_probe_sdram(obio_tag, PXA2X0_MEMCTL_BASE, memstart, memsize);
  304 
  305         /* Fire up consoles. */
  306         cninit();
  307 
  308         undefined_init();
  309 
  310         init_proc0(kernelstack.pv_va);
  311 
  312         /* Enable MMU, I-cache, D-cache, write buffer. */
  313         arm_vector_init(ARM_VECTORS_HIGH, ARM_VEC_ALL);
  314 
  315         pmap_curmaxkvaddr = afterkern + PAGE_SIZE;
  316         vm_max_kernel_address = 0xe0000000;
  317         pmap_bootstrap(pmap_curmaxkvaddr, &kernel_l1pt);
  318         msgbufp = (void*)msgbufpv.pv_va;
  319         msgbufinit(msgbufp, msgbufsize);
  320         mutex_init();
  321 
  322         /*
  323          * Add the physical ram we have available.
  324          *
  325          * Exclude the kernel (and all the things we allocated which immediately
  326          * follow the kernel) from the VM allocation pool but not from crash
  327          * dumps.  virtual_avail is a global variable which tracks the kva we've
  328          * "allocated" while setting up pmaps.
  329          *
  330          * Prepare the list of physical memory available to the vm subsystem.
  331          */
  332         for (j = 0; j < PXA2X0_SDRAM_BANKS; j++) {
  333                 if (memsize[j] > 0)
  334                         arm_physmem_hardware_region(memstart[j], memsize[j]);
  335         }
  336         arm_physmem_exclude_region(freemem_pt, abp->abp_physaddr -
  337             freemem_pt, EXFLAG_NOALLOC);
  338         arm_physmem_exclude_region(freemempos, abp->abp_physaddr - 0x100000 -
  339             freemempos, EXFLAG_NOALLOC);
  340         arm_physmem_exclude_region(abp->abp_physaddr, 
  341             virtual_avail - KERNVIRTADDR, EXFLAG_NOALLOC);
  342         arm_physmem_init_kernel_globals();
  343 
  344         init_param2(physmem);
  345         kdb_init();
  346         return ((void *)(kernelstack.pv_va + USPACE_SVC_STACK_TOP -
  347             sizeof(struct pcb)));
  348 }
  349 
  350 static void
  351 pxa_probe_sdram(bus_space_tag_t bst, bus_space_handle_t bsh,
  352     uint32_t *memstart, uint32_t *memsize)
  353 {
  354         uint32_t        mdcnfg, dwid, dcac, drac, dnb;
  355         int             i;
  356 
  357         mdcnfg = bus_space_read_4(bst, bsh, MEMCTL_MDCNFG);
  358 
  359         /*
  360          * Scan all 4 SDRAM banks
  361          */
  362         for (i = 0; i < PXA2X0_SDRAM_BANKS; i++) {
  363                 memstart[i] = 0;
  364                 memsize[i] = 0;
  365 
  366                 switch (i) {
  367                 case 0:
  368                 case 1:
  369                         if ((i == 0 && (mdcnfg & MDCNFG_DE0) == 0) ||
  370                             (i == 1 && (mdcnfg & MDCNFG_DE1) == 0))
  371                                 continue;
  372                         dwid = mdcnfg >> MDCNFD_DWID01_SHIFT;
  373                         dcac = mdcnfg >> MDCNFD_DCAC01_SHIFT;
  374                         drac = mdcnfg >> MDCNFD_DRAC01_SHIFT;
  375                         dnb = mdcnfg >> MDCNFD_DNB01_SHIFT;
  376                         break;
  377 
  378                 case 2:
  379                 case 3:
  380                         if ((i == 2 && (mdcnfg & MDCNFG_DE2) == 0) ||
  381                             (i == 3 && (mdcnfg & MDCNFG_DE3) == 0))
  382                                 continue;
  383                         dwid = mdcnfg >> MDCNFD_DWID23_SHIFT;
  384                         dcac = mdcnfg >> MDCNFD_DCAC23_SHIFT;
  385                         drac = mdcnfg >> MDCNFD_DRAC23_SHIFT;
  386                         dnb = mdcnfg >> MDCNFD_DNB23_SHIFT;
  387                         break;
  388                 default:
  389                         panic("pxa_probe_sdram: impossible");
  390                 }
  391 
  392                 dwid = 2 << (1 - (dwid & MDCNFD_DWID_MASK));  /* 16/32 width */
  393                 dcac = 1 << ((dcac & MDCNFD_DCAC_MASK) + 8);  /* 8-11 columns */
  394                 drac = 1 << ((drac & MDCNFD_DRAC_MASK) + 11); /* 11-13 rows */
  395                 dnb = 2 << (dnb & MDCNFD_DNB_MASK);           /* # of banks */
  396 
  397                 memsize[i] = dwid * dcac * drac * dnb;
  398                 memstart[i] = PXA2X0_SDRAM0_START +
  399                     (i * PXA2X0_SDRAM_BANK_SIZE);
  400         }
  401 }
  402 
  403 #define TIMER_FREQUENCY 3686400
  404 #define UNIMPLEMENTED   panic("%s: unimplemented", __func__)
  405 
  406 /* XXXBJR: Belongs with DELAY in a timer.c of some sort. */
  407 void
  408 cpu_startprofclock(void)
  409 {
  410         UNIMPLEMENTED;
  411 }
  412 
  413 void
  414 cpu_stopprofclock(void)
  415 {
  416         UNIMPLEMENTED;
  417 }
  418 
  419 static struct arm32_dma_range pxa_range = {
  420         .dr_sysbase = 0,
  421         .dr_busbase = 0,
  422         .dr_len = ~0u,
  423 };
  424 
  425 struct arm32_dma_range *
  426 bus_dma_get_range(void)
  427 {
  428 
  429         return (&pxa_range);
  430 }
  431 
  432 int
  433 bus_dma_get_range_nb(void)
  434 {
  435 
  436         return (1);
  437 }

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