1 /* $NetBSD: hpc_machdep.c,v 1.70 2003/09/16 08:18:22 agc Exp $ */
2
3 /*-
4 * Copyright (c) 1994-1998 Mark Brinicombe.
5 * Copyright (c) 1994 Brini.
6 * All rights reserved.
7 *
8 * This code is derived from software written for Brini by Mark Brinicombe
9 *
10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions
12 * are met:
13 * 1. Redistributions of source code must retain the above copyright
14 * notice, this list of conditions and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright
16 * notice, this list of conditions and the following disclaimer in the
17 * documentation and/or other materials provided with the distribution.
18 * 3. All advertising materials mentioning features or use of this software
19 * must display the following acknowledgement:
20 * This product includes software developed by Brini.
21 * 4. The name of the company nor the name of the author may be used to
22 * endorse or promote products derived from this software without specific
23 * prior written permission.
24 *
25 * THIS SOFTWARE IS PROVIDED BY BRINI ``AS IS'' AND ANY EXPRESS OR IMPLIED
26 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
27 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
28 * IN NO EVENT SHALL BRINI OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
29 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
30 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
31 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
32 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
33 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
34 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
35 * SUCH DAMAGE.
36 *
37 * RiscBSD kernel project
38 *
39 * machdep.c
40 *
41 * Machine dependant functions for kernel setup
42 *
43 * This file needs a lot of work.
44 *
45 * Created : 17/09/94
46 */
47
48 #include "opt_ddb.h"
49
50 #include <sys/cdefs.h>
51 __FBSDID("$FreeBSD$");
52
53 #define _ARM32_BUS_DMA_PRIVATE
54 #include <sys/param.h>
55 #include <sys/systm.h>
56 #include <sys/sysproto.h>
57 #include <sys/signalvar.h>
58 #include <sys/imgact.h>
59 #include <sys/kernel.h>
60 #include <sys/ktr.h>
61 #include <sys/linker.h>
62 #include <sys/lock.h>
63 #include <sys/malloc.h>
64 #include <sys/mutex.h>
65 #include <sys/pcpu.h>
66 #include <sys/proc.h>
67 #include <sys/ptrace.h>
68 #include <sys/cons.h>
69 #include <sys/bio.h>
70 #include <sys/bus.h>
71 #include <sys/buf.h>
72 #include <sys/exec.h>
73 #include <sys/kdb.h>
74 #include <sys/msgbuf.h>
75 #include <machine/reg.h>
76 #include <machine/cpu.h>
77
78 #include <vm/vm.h>
79 #include <vm/pmap.h>
80 #include <vm/vm_object.h>
81 #include <vm/vm_page.h>
82 #include <vm/vm_pager.h>
83 #include <vm/vm_map.h>
84 #include <vm/vnode_pager.h>
85 #include <machine/pmap.h>
86 #include <machine/vmparam.h>
87 #include <machine/pcb.h>
88 #include <machine/undefined.h>
89 #include <machine/machdep.h>
90 #include <machine/metadata.h>
91 #include <machine/armreg.h>
92 #include <machine/bus.h>
93 #include <sys/reboot.h>
94
95 #include <arm/xscale/pxa/pxareg.h>
96 #include <arm/xscale/pxa/pxavar.h>
97
98 #define KERNEL_PT_SYS 0 /* Page table for mapping proc0 zero page */
99 #define KERNEL_PT_IOPXS 1
100 #define KERNEL_PT_BEFOREKERN 2
101 #define KERNEL_PT_AFKERNEL 3 /* L2 table for mapping after kernel */
102 #define KERNEL_PT_AFKERNEL_NUM 9
103
104 /* this should be evenly divisable by PAGE_SIZE / L2_TABLE_SIZE_REAL (or 4) */
105 #define NUM_KERNEL_PTS (KERNEL_PT_AFKERNEL + KERNEL_PT_AFKERNEL_NUM)
106
107 /* Define various stack sizes in pages */
108 #define IRQ_STACK_SIZE 1
109 #define ABT_STACK_SIZE 1
110 #define UND_STACK_SIZE 1
111
112 extern u_int data_abort_handler_address;
113 extern u_int prefetch_abort_handler_address;
114 extern u_int undefined_handler_address;
115
116 struct pv_addr kernel_pt_table[NUM_KERNEL_PTS];
117
118 extern void *_end;
119
120 extern int *end;
121
122 struct pcpu __pcpu;
123 struct pcpu *pcpup = &__pcpu;
124
125 /* Physical and virtual addresses for some global pages */
126
127 vm_paddr_t phys_avail[PXA2X0_SDRAM_BANKS * 2 + 4];
128 vm_paddr_t dump_avail[PXA2X0_SDRAM_BANKS * 2 + 4];
129 vm_offset_t physical_pages;
130
131 struct pv_addr systempage;
132 struct pv_addr msgbufpv;
133 struct pv_addr irqstack;
134 struct pv_addr undstack;
135 struct pv_addr abtstack;
136 struct pv_addr kernelstack;
137 struct pv_addr minidataclean;
138
139 static struct trapframe proc0_tf;
140
141 static void pxa_probe_sdram(bus_space_tag_t, bus_space_handle_t,
142 uint32_t *, uint32_t *);
143
144 /* Static device mappings. */
145 static const struct pmap_devmap pxa_devmap[] = {
146 /*
147 * Map the on-board devices up into the KVA region so we don't muck
148 * up user-space.
149 */
150 {
151 PXA2X0_PERIPH_START + PXA2X0_PERIPH_OFFSET,
152 PXA2X0_PERIPH_START,
153 PXA250_PERIPH_END - PXA2X0_PERIPH_START,
154 VM_PROT_READ|VM_PROT_WRITE,
155 PTE_NOCACHE,
156 },
157 { 0, 0, 0, 0, 0, }
158 };
159
160 #define SDRAM_START 0xa0000000
161
162 extern vm_offset_t xscale_cache_clean_addr;
163
164 void *
165 initarm(void *arg, void *arg2)
166 {
167 struct pv_addr kernel_l1pt;
168 struct pv_addr dpcpu;
169 int loop;
170 u_int l1pagetable;
171 vm_offset_t freemempos;
172 vm_offset_t freemem_pt;
173 vm_offset_t afterkern;
174 vm_offset_t freemem_after;
175 vm_offset_t lastaddr;
176 int i, j;
177 uint32_t memsize[PXA2X0_SDRAM_BANKS], memstart[PXA2X0_SDRAM_BANKS];
178
179 set_cpufuncs();
180
181 lastaddr = fake_preload_metadata();
182 pcpu_init(pcpup, 0, sizeof(struct pcpu));
183 PCPU_SET(curthread, &thread0);
184
185 /* Do basic tuning, hz etc */
186 init_param1();
187
188 freemempos = 0xa0200000;
189 /* Define a macro to simplify memory allocation */
190 #define valloc_pages(var, np) \
191 alloc_pages((var).pv_pa, (np)); \
192 (var).pv_va = (var).pv_pa + 0x20000000;
193
194 #define alloc_pages(var, np) \
195 freemempos -= (np * PAGE_SIZE); \
196 (var) = freemempos; \
197 memset((char *)(var), 0, ((np) * PAGE_SIZE));
198
199 while (((freemempos - L1_TABLE_SIZE) & (L1_TABLE_SIZE - 1)) != 0)
200 freemempos -= PAGE_SIZE;
201 valloc_pages(kernel_l1pt, L1_TABLE_SIZE / PAGE_SIZE);
202 for (loop = 0; loop < NUM_KERNEL_PTS; ++loop) {
203 if (!(loop % (PAGE_SIZE / L2_TABLE_SIZE_REAL))) {
204 valloc_pages(kernel_pt_table[loop],
205 L2_TABLE_SIZE / PAGE_SIZE);
206 } else {
207 kernel_pt_table[loop].pv_pa = freemempos +
208 (loop % (PAGE_SIZE / L2_TABLE_SIZE_REAL)) *
209 L2_TABLE_SIZE_REAL;
210 kernel_pt_table[loop].pv_va =
211 kernel_pt_table[loop].pv_pa + 0x20000000;
212 }
213 i++;
214 }
215 freemem_pt = freemempos;
216 freemempos = 0xa0100000;
217 /*
218 * Allocate a page for the system page mapped to V0x00000000
219 * This page will just contain the system vectors and can be
220 * shared by all processes.
221 */
222 valloc_pages(systempage, 1);
223
224 /* Allocate dynamic per-cpu area. */
225 valloc_pages(dpcpu, DPCPU_SIZE / PAGE_SIZE);
226 dpcpu_init((void *)dpcpu.pv_va, 0);
227
228 /* Allocate stacks for all modes */
229 valloc_pages(irqstack, IRQ_STACK_SIZE);
230 valloc_pages(abtstack, ABT_STACK_SIZE);
231 valloc_pages(undstack, UND_STACK_SIZE);
232 valloc_pages(kernelstack, KSTACK_PAGES);
233 alloc_pages(minidataclean.pv_pa, 1);
234 valloc_pages(msgbufpv, round_page(msgbufsize) / PAGE_SIZE);
235 #ifdef ARM_USE_SMALL_ALLOC
236 freemempos -= PAGE_SIZE;
237 freemem_pt = trunc_page(freemem_pt);
238 freemem_after = freemempos - ((freemem_pt - 0xa0100000) /
239 PAGE_SIZE) * sizeof(struct arm_small_page);
240 arm_add_smallalloc_pages((void *)(freemem_after + 0x20000000)
241 , (void *)0xc0100000, freemem_pt - 0xa0100000, 1);
242 freemem_after -= ((freemem_after - 0xa0001000) / PAGE_SIZE) *
243 sizeof(struct arm_small_page);
244 arm_add_smallalloc_pages((void *)(freemem_after + 0x20000000)
245 , (void *)0xc0001000, trunc_page(freemem_after) - 0xa0001000, 0);
246 freemempos = trunc_page(freemem_after);
247 freemempos -= PAGE_SIZE;
248 #endif
249 /*
250 * Allocate memory for the l1 and l2 page tables. The scheme to avoid
251 * wasting memory by allocating the l1pt on the first 16k memory was
252 * taken from NetBSD rpc_machdep.c. NKPT should be greater than 12 for
253 * this to work (which is supposed to be the case).
254 */
255
256 /*
257 * Now we start construction of the L1 page table
258 * We start by mapping the L2 page tables into the L1.
259 * This means that we can replace L1 mappings later on if necessary
260 */
261 l1pagetable = kernel_l1pt.pv_va;
262
263 /* Map the L2 pages tables in the L1 page table */
264 pmap_link_l2pt(l1pagetable, ARM_VECTORS_HIGH & ~(0x00100000 - 1),
265 &kernel_pt_table[KERNEL_PT_SYS]);
266 #if 0 /* XXXBJR: What is this? Don't know if there's an analogue. */
267 pmap_link_l2pt(l1pagetable, IQ80321_IOPXS_VBASE,
268 &kernel_pt_table[KERNEL_PT_IOPXS]);
269 #endif
270 pmap_link_l2pt(l1pagetable, KERNBASE,
271 &kernel_pt_table[KERNEL_PT_BEFOREKERN]);
272 pmap_map_chunk(l1pagetable, KERNBASE, SDRAM_START, 0x100000,
273 VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
274 pmap_map_chunk(l1pagetable, KERNBASE + 0x100000, SDRAM_START + 0x100000,
275 0x100000, VM_PROT_READ|VM_PROT_WRITE, PTE_PAGETABLE);
276 pmap_map_chunk(l1pagetable, KERNBASE + 0x200000, SDRAM_START + 0x200000,
277 (((uint32_t)(lastaddr) - KERNBASE - 0x200000) + L1_S_SIZE) & ~(L1_S_SIZE - 1),
278 VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
279 freemem_after = ((int)lastaddr + PAGE_SIZE) & ~(PAGE_SIZE - 1);
280 afterkern = round_page(((vm_offset_t)lastaddr + L1_S_SIZE) &
281 ~(L1_S_SIZE - 1));
282 for (i = 0; i < KERNEL_PT_AFKERNEL_NUM; i++) {
283 pmap_link_l2pt(l1pagetable, afterkern + i * 0x00100000,
284 &kernel_pt_table[KERNEL_PT_AFKERNEL + i]);
285 }
286 pmap_map_entry(l1pagetable, afterkern, minidataclean.pv_pa,
287 VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
288
289 #ifdef ARM_USE_SMALL_ALLOC
290 if ((freemem_after + 2 * PAGE_SIZE) <= afterkern) {
291 arm_add_smallalloc_pages((void *)(freemem_after),
292 (void*)(freemem_after + PAGE_SIZE),
293 afterkern - (freemem_after + PAGE_SIZE), 0);
294 }
295 #endif
296
297 /* Map the Mini-Data cache clean area. */
298 xscale_setup_minidata(l1pagetable, afterkern,
299 minidataclean.pv_pa);
300
301 /* Map the vector page. */
302 pmap_map_entry(l1pagetable, ARM_VECTORS_HIGH, systempage.pv_pa,
303 VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
304 pmap_devmap_bootstrap(l1pagetable, pxa_devmap);
305
306 /*
307 * Give the XScale global cache clean code an appropriately
308 * sized chunk of unmapped VA space starting at 0xff000000
309 * (our device mappings end before this address).
310 */
311 xscale_cache_clean_addr = 0xff000000U;
312
313 cpu_domains((DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL*2)) | DOMAIN_CLIENT);
314 setttb(kernel_l1pt.pv_pa);
315 cpu_tlb_flushID();
316 cpu_domains(DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL*2));
317
318 /*
319 * Pages were allocated during the secondary bootstrap for the
320 * stacks for different CPU modes.
321 * We must now set the r13 registers in the different CPU modes to
322 * point to these stacks.
323 * Since the ARM stacks use STMFD etc. we must set r13 to the top end
324 * of the stack memory.
325 */
326 set_stackptr(PSR_IRQ32_MODE,
327 irqstack.pv_va + IRQ_STACK_SIZE * PAGE_SIZE);
328 set_stackptr(PSR_ABT32_MODE,
329 abtstack.pv_va + ABT_STACK_SIZE * PAGE_SIZE);
330 set_stackptr(PSR_UND32_MODE,
331 undstack.pv_va + UND_STACK_SIZE * PAGE_SIZE);
332
333 /*
334 * We must now clean the cache again....
335 * Cleaning may be done by reading new data to displace any
336 * dirty data in the cache. This will have happened in setttb()
337 * but since we are boot strapping the addresses used for the read
338 * may have just been remapped and thus the cache could be out
339 * of sync. A re-clean after the switch will cure this.
340 * After booting there are no gross relocations of the kernel thus
341 * this problem will not occur after initarm().
342 */
343 cpu_idcache_wbinv_all();
344
345 /*
346 * Sort out bus_space for on-board devices.
347 */
348 pxa_obio_tag_init();
349
350 /*
351 * Fetch the SDRAM start/size from the PXA2X0 SDRAM configration
352 * registers.
353 */
354 pxa_probe_sdram(obio_tag, PXA2X0_MEMCTL_BASE, memstart, memsize);
355
356 physmem = 0;
357 for (i = 0; i < PXA2X0_SDRAM_BANKS; i++) {
358 physmem += memsize[i] / PAGE_SIZE;
359 }
360
361 /* Fire up consoles. */
362 cninit();
363
364 /* Set stack for exception handlers */
365 data_abort_handler_address = (u_int)data_abort_handler;
366 prefetch_abort_handler_address = (u_int)prefetch_abort_handler;
367 undefined_handler_address = (u_int)undefinedinstruction_bounce;
368 undefined_init();
369
370 proc_linkup(&proc0, &thread0);
371 thread0.td_kstack = kernelstack.pv_va;
372 thread0.td_pcb = (struct pcb *)
373 (thread0.td_kstack + KSTACK_PAGES * PAGE_SIZE) - 1;
374 thread0.td_pcb->pcb_flags = 0;
375 thread0.td_frame = &proc0_tf;
376 pcpup->pc_curpcb = thread0.td_pcb;
377
378 /* Enable MMU, I-cache, D-cache, write buffer. */
379 arm_vector_init(ARM_VECTORS_HIGH, ARM_VEC_ALL);
380
381 pmap_curmaxkvaddr = afterkern + PAGE_SIZE;
382 /*
383 * ARM USE_SMALL_ALLOC uses dump_avail, so it must be filled before
384 * calling pmap_bootstrap.
385 */
386 i = 0;
387 for (j = 0; j < PXA2X0_SDRAM_BANKS; j++) {
388 if (memsize[j] > 0) {
389 dump_avail[i++] = round_page(memstart[j]);
390 dump_avail[i++] =
391 trunc_page(memstart[j] + memsize[j]);
392 }
393 }
394 dump_avail[i] = 0;
395 dump_avail[i] = 0;
396 pmap_bootstrap(pmap_curmaxkvaddr, 0xd0000000, &kernel_l1pt);
397 msgbufp = (void*)msgbufpv.pv_va;
398 msgbufinit(msgbufp, msgbufsize);
399 mutex_init();
400
401 i = 0;
402 #ifdef ARM_USE_SMALL_ALLOC
403 phys_avail[i++] = 0xa0000000;
404 phys_avail[i++] = 0xa0001000; /*
405 *XXX: Gross hack to get our
406 * pages in the vm_page_array
407 . */
408 #endif
409 for (j = 0; j < PXA2X0_SDRAM_BANKS; j++) {
410 if (memsize[j] > 0) {
411 phys_avail[i] = round_page(memstart[j]);
412 dump_avail[i++] = round_page(memstart[j]);
413 phys_avail[i] =
414 trunc_page(memstart[j] + memsize[j]);
415 dump_avail[i++] =
416 trunc_page(memstart[j] + memsize[j]);
417 }
418 }
419
420 dump_avail[i] = 0;
421 phys_avail[i++] = 0;
422 dump_avail[i] = 0;
423 phys_avail[i] = 0;
424 #ifdef ARM_USE_SMALL_ALLOC
425 phys_avail[2] = round_page(virtual_avail - KERNBASE + phys_avail[2]);
426 #else
427 phys_avail[0] = round_page(virtual_avail - KERNBASE + phys_avail[0]);
428 #endif
429
430 init_param2(physmem);
431 kdb_init();
432 return ((void *)(kernelstack.pv_va + USPACE_SVC_STACK_TOP -
433 sizeof(struct pcb)));
434 }
435
436 static void
437 pxa_probe_sdram(bus_space_tag_t bst, bus_space_handle_t bsh,
438 uint32_t *memstart, uint32_t *memsize)
439 {
440 uint32_t mdcnfg, dwid, dcac, drac, dnb;
441 int i;
442
443 mdcnfg = bus_space_read_4(bst, bsh, MEMCTL_MDCNFG);
444
445 /*
446 * Scan all 4 SDRAM banks
447 */
448 for (i = 0; i < PXA2X0_SDRAM_BANKS; i++) {
449 memstart[i] = 0;
450 memsize[i] = 0;
451
452 switch (i) {
453 case 0:
454 case 1:
455 if ((i == 0 && (mdcnfg & MDCNFG_DE0) == 0) ||
456 (i == 1 && (mdcnfg & MDCNFG_DE1) == 0))
457 continue;
458 dwid = mdcnfg >> MDCNFD_DWID01_SHIFT;
459 dcac = mdcnfg >> MDCNFD_DCAC01_SHIFT;
460 drac = mdcnfg >> MDCNFD_DRAC01_SHIFT;
461 dnb = mdcnfg >> MDCNFD_DNB01_SHIFT;
462 break;
463
464 case 2:
465 case 3:
466 if ((i == 2 && (mdcnfg & MDCNFG_DE2) == 0) ||
467 (i == 3 && (mdcnfg & MDCNFG_DE3) == 0))
468 continue;
469 dwid = mdcnfg >> MDCNFD_DWID23_SHIFT;
470 dcac = mdcnfg >> MDCNFD_DCAC23_SHIFT;
471 drac = mdcnfg >> MDCNFD_DRAC23_SHIFT;
472 dnb = mdcnfg >> MDCNFD_DNB23_SHIFT;
473 break;
474 default:
475 panic("pxa_probe_sdram: impossible");
476 }
477
478 dwid = 2 << (1 - (dwid & MDCNFD_DWID_MASK)); /* 16/32 width */
479 dcac = 1 << ((dcac & MDCNFD_DCAC_MASK) + 8); /* 8-11 columns */
480 drac = 1 << ((drac & MDCNFD_DRAC_MASK) + 11); /* 11-13 rows */
481 dnb = 2 << (dnb & MDCNFD_DNB_MASK); /* # of banks */
482
483 memsize[i] = dwid * dcac * drac * dnb;
484 memstart[i] = PXA2X0_SDRAM0_START +
485 (i * PXA2X0_SDRAM_BANK_SIZE);
486 }
487 }
488
489 #define TIMER_FREQUENCY 3686400
490 #define UNIMPLEMENTED panic("%s: unimplemented", __func__)
491
492 /* XXXBJR: Belongs with DELAY in a timer.c of some sort. */
493 void
494 cpu_startprofclock(void)
495 {
496 UNIMPLEMENTED;
497 }
498
499 void
500 cpu_stopprofclock(void)
501 {
502 UNIMPLEMENTED;
503 }
504
505 static struct arm32_dma_range pxa_range = {
506 .dr_sysbase = 0,
507 .dr_busbase = 0,
508 .dr_len = ~0u,
509 };
510
511 struct arm32_dma_range *
512 bus_dma_get_range(void)
513 {
514
515 return (&pxa_range);
516 }
517
518 int
519 bus_dma_get_range_nb(void)
520 {
521
522 return (1);
523 }
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