The Design and Implementation of the FreeBSD Operating System, Second Edition
Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)


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FreeBSD/Linux Kernel Cross Reference
sys/arm/xscale/pxa/pxavar.h

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    1 /*      $NetBSD: obiovar.h,v 1.4 2003/06/16 17:40:53 thorpej Exp $      */
    2 
    3 /*-
    4  * Copyright (c) 2002, 2003 Wasabi Systems, Inc.
    5  * All rights reserved.
    6  *
    7  * Written by Jason R. Thorpe for Wasabi Systems, Inc.
    8  *
    9  * Redistribution and use in source and binary forms, with or without
   10  * modification, are permitted provided that the following conditions
   11  * are met:
   12  * 1. Redistributions of source code must retain the above copyright
   13  *    notice, this list of conditions and the following disclaimer.
   14  * 2. Redistributions in binary form must reproduce the above copyright
   15  *    notice, this list of conditions and the following disclaimer in the
   16  *    documentation and/or other materials provided with the distribution.
   17  * 3. All advertising materials mentioning features or use of this software
   18  *    must display the following acknowledgement:
   19  *      This product includes software developed for the NetBSD Project by
   20  *      Wasabi Systems, Inc.
   21  * 4. The name of Wasabi Systems, Inc. may not be used to endorse
   22  *    or promote products derived from this software without specific prior
   23  *    written permission.
   24  *
   25  * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
   26  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
   27  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
   28  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL WASABI SYSTEMS, INC
   29  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
   30  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
   31  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
   32  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
   33  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
   34  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
   35  * POSSIBILITY OF SUCH DAMAGE.
   36  *
   37  * $FreeBSD$
   38  *
   39  */
   40 
   41 #ifndef _PXAVAR_H_
   42 #define _PXAVAR_H_
   43 
   44 #include <sys/rman.h>
   45 
   46 struct obio_softc {
   47         bus_space_tag_t obio_bst;       /* bus space tag */
   48         struct rman     obio_mem;
   49         struct rman     obio_irq;
   50 };
   51 
   52 extern bus_space_tag_t  base_tag;
   53 extern bus_space_tag_t  obio_tag;
   54 void            pxa_obio_tag_init(void);
   55 bus_space_tag_t pxa_bus_tag_alloc(bus_addr_t);
   56 
   57 uint32_t        pxa_gpio_get_function(int);
   58 uint32_t        pxa_gpio_set_function(int, uint32_t);
   59 int             pxa_gpio_setup_intrhandler(const char *, driver_filter_t *,
   60                     driver_intr_t *, void *, int, int, void **);
   61 void            pxa_gpio_mask_irq(int);
   62 void            pxa_gpio_unmask_irq(int);
   63 int             pxa_gpio_get_next_irq(void);
   64 
   65 struct dmac_channel;
   66 
   67 struct dmac_descriptor {
   68         uint32_t        ddadr;
   69         uint32_t        dsadr;
   70         uint32_t        dtadr;
   71         uint32_t        dcmd;
   72 };
   73 #define DMACD_SET_DESCRIPTOR(d, dadr)   do { d->ddadr = dadr; } while (0)
   74 #define DMACD_SET_SOURCE(d, sadr)       do { d->dsadr = sadr; } while (0)
   75 #define DMACD_SET_TARGET(d, tadr)       do { d->dtadr = tadr; } while (0)
   76 #define DMACD_SET_COMMAND(d, cmd)       do { d->dcmd = cmd; } while (0)
   77 
   78 #define DMAC_PRIORITY_HIGHEST   1
   79 #define DMAC_PRIORITY_HIGH      2
   80 #define DMAC_PRIORITY_LOW       3
   81 
   82 int     pxa_dmac_alloc(int, struct dmac_channel **, int);
   83 void    pxa_dmac_release(struct dmac_channel *);
   84 int     pxa_dmac_transfer(struct dmac_channel *, bus_addr_t);
   85 int     pxa_dmac_transfer_single(struct dmac_channel *,
   86                     bus_addr_t, bus_addr_t, uint32_t);
   87 int     pxa_dmac_transfer_done(struct dmac_channel *);
   88 int     pxa_dmac_transfer_failed(struct dmac_channel *);
   89 
   90 enum pxa_device_ivars {
   91         PXA_IVAR_BASE,
   92 };
   93 
   94 enum smi_device_ivars {
   95         SMI_IVAR_PHYSBASE,
   96 };
   97 
   98 #define PXA_ACCESSOR(var, ivar, type)   \
   99         __BUS_ACCESSOR(pxa, var, PXA, ivar, type)
  100 
  101 PXA_ACCESSOR(base,      BASE,   u_long)
  102 
  103 #undef  PXA_ACCESSOR
  104 
  105 #define SMI_ACCESSOR(var, ivar, type)   \
  106         __BUS_ACCESSOR(smi, var, SMI, ivar, type)
  107 
  108 SMI_ACCESSOR(physbase,  PHYSBASE,       bus_addr_t)
  109 
  110 #undef CSR_ACCESSOR
  111 
  112 #endif /* _PXAVAR_H_ */

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