Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)
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FreeBSD/Linux Kernel Cross Reference
sys/arm64/arm64/exec_machdep.c
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1 /*- 2 * Copyright (c) 2014 Andrew Turner 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24 * SUCH DAMAGE. 25 * 26 */ 27 28 #include <sys/cdefs.h> 29 __FBSDID("$FreeBSD$"); 30 31 #include <sys/param.h> 32 #include <sys/systm.h> 33 #include <sys/exec.h> 34 #include <sys/imgact.h> 35 #include <sys/kdb.h> 36 #include <sys/kernel.h> 37 #include <sys/ktr.h> 38 #include <sys/limits.h> 39 #include <sys/lock.h> 40 #include <sys/mutex.h> 41 #include <sys/proc.h> 42 #include <sys/ptrace.h> 43 #include <sys/reg.h> 44 #include <sys/rwlock.h> 45 #include <sys/signalvar.h> 46 #include <sys/syscallsubr.h> 47 #include <sys/sysent.h> 48 #include <sys/sysproto.h> 49 #include <sys/ucontext.h> 50 51 #include <vm/vm.h> 52 #include <vm/vm_param.h> 53 #include <vm/pmap.h> 54 #include <vm/vm_map.h> 55 56 #include <machine/armreg.h> 57 #include <machine/kdb.h> 58 #include <machine/md_var.h> 59 #include <machine/pcb.h> 60 61 #ifdef VFP 62 #include <machine/vfp.h> 63 #endif 64 65 _Static_assert(sizeof(mcontext_t) == 880, "mcontext_t size incorrect"); 66 _Static_assert(sizeof(ucontext_t) == 960, "ucontext_t size incorrect"); 67 _Static_assert(sizeof(siginfo_t) == 80, "siginfo_t size incorrect"); 68 69 static void get_fpcontext(struct thread *td, mcontext_t *mcp); 70 static void set_fpcontext(struct thread *td, mcontext_t *mcp); 71 72 int 73 fill_regs(struct thread *td, struct reg *regs) 74 { 75 struct trapframe *frame; 76 77 frame = td->td_frame; 78 regs->sp = frame->tf_sp; 79 regs->lr = frame->tf_lr; 80 regs->elr = frame->tf_elr; 81 regs->spsr = frame->tf_spsr; 82 83 memcpy(regs->x, frame->tf_x, sizeof(regs->x)); 84 85 #ifdef COMPAT_FREEBSD32 86 /* 87 * We may be called here for a 32bits process, if we're using a 88 * 64bits debugger. If so, put PC and SPSR where it expects it. 89 */ 90 if (SV_PROC_FLAG(td->td_proc, SV_ILP32)) { 91 regs->x[15] = frame->tf_elr; 92 regs->x[16] = frame->tf_spsr; 93 } 94 #endif 95 return (0); 96 } 97 98 int 99 set_regs(struct thread *td, struct reg *regs) 100 { 101 struct trapframe *frame; 102 103 frame = td->td_frame; 104 frame->tf_sp = regs->sp; 105 frame->tf_lr = regs->lr; 106 107 memcpy(frame->tf_x, regs->x, sizeof(frame->tf_x)); 108 109 #ifdef COMPAT_FREEBSD32 110 if (SV_PROC_FLAG(td->td_proc, SV_ILP32)) { 111 /* 112 * We may be called for a 32bits process if we're using 113 * a 64bits debugger. If so, get PC and SPSR from where 114 * it put it. 115 */ 116 frame->tf_elr = regs->x[15]; 117 frame->tf_spsr &= ~PSR_SETTABLE_32; 118 frame->tf_spsr |= regs->x[16] & PSR_SETTABLE_32; 119 /* Don't allow userspace to ask to continue single stepping. 120 * The SPSR.SS field doesn't exist when the EL1 is AArch32. 121 * As the SPSR.DIT field has moved in its place don't 122 * allow userspace to set the SPSR.SS field. 123 */ 124 } else 125 #endif 126 { 127 frame->tf_elr = regs->elr; 128 frame->tf_spsr &= ~PSR_SETTABLE_64; 129 frame->tf_spsr |= regs->spsr & PSR_SETTABLE_64; 130 /* Enable single stepping if userspace asked fot it */ 131 if ((frame->tf_spsr & PSR_SS) != 0) { 132 td->td_pcb->pcb_flags |= PCB_SINGLE_STEP; 133 134 WRITE_SPECIALREG(mdscr_el1, 135 READ_SPECIALREG(mdscr_el1) | MDSCR_SS); 136 isb(); 137 } 138 } 139 return (0); 140 } 141 142 int 143 fill_fpregs(struct thread *td, struct fpreg *regs) 144 { 145 #ifdef VFP 146 struct pcb *pcb; 147 148 pcb = td->td_pcb; 149 if ((pcb->pcb_fpflags & PCB_FP_STARTED) != 0) { 150 /* 151 * If we have just been running VFP instructions we will 152 * need to save the state to memcpy it below. 153 */ 154 if (td == curthread) 155 vfp_save_state(td, pcb); 156 } 157 158 KASSERT(pcb->pcb_fpusaved == &pcb->pcb_fpustate, 159 ("Called fill_fpregs while the kernel is using the VFP")); 160 memcpy(regs->fp_q, pcb->pcb_fpustate.vfp_regs, 161 sizeof(regs->fp_q)); 162 regs->fp_cr = pcb->pcb_fpustate.vfp_fpcr; 163 regs->fp_sr = pcb->pcb_fpustate.vfp_fpsr; 164 #else 165 memset(regs, 0, sizeof(*regs)); 166 #endif 167 return (0); 168 } 169 170 int 171 set_fpregs(struct thread *td, struct fpreg *regs) 172 { 173 #ifdef VFP 174 struct pcb *pcb; 175 176 pcb = td->td_pcb; 177 KASSERT(pcb->pcb_fpusaved == &pcb->pcb_fpustate, 178 ("Called set_fpregs while the kernel is using the VFP")); 179 memcpy(pcb->pcb_fpustate.vfp_regs, regs->fp_q, sizeof(regs->fp_q)); 180 pcb->pcb_fpustate.vfp_fpcr = regs->fp_cr; 181 pcb->pcb_fpustate.vfp_fpsr = regs->fp_sr; 182 #endif 183 return (0); 184 } 185 186 int 187 fill_dbregs(struct thread *td, struct dbreg *regs) 188 { 189 struct debug_monitor_state *monitor; 190 int i; 191 uint8_t debug_ver, nbkpts, nwtpts; 192 193 memset(regs, 0, sizeof(*regs)); 194 195 extract_user_id_field(ID_AA64DFR0_EL1, ID_AA64DFR0_DebugVer_SHIFT, 196 &debug_ver); 197 extract_user_id_field(ID_AA64DFR0_EL1, ID_AA64DFR0_BRPs_SHIFT, 198 &nbkpts); 199 extract_user_id_field(ID_AA64DFR0_EL1, ID_AA64DFR0_WRPs_SHIFT, 200 &nwtpts); 201 202 /* 203 * The BRPs field contains the number of breakpoints - 1. Armv8-A 204 * allows the hardware to provide 2-16 breakpoints so this won't 205 * overflow an 8 bit value. The same applies to the WRPs field. 206 */ 207 nbkpts++; 208 nwtpts++; 209 210 regs->db_debug_ver = debug_ver; 211 regs->db_nbkpts = nbkpts; 212 regs->db_nwtpts = nwtpts; 213 214 monitor = &td->td_pcb->pcb_dbg_regs; 215 if ((monitor->dbg_flags & DBGMON_ENABLED) != 0) { 216 for (i = 0; i < nbkpts; i++) { 217 regs->db_breakregs[i].dbr_addr = monitor->dbg_bvr[i]; 218 regs->db_breakregs[i].dbr_ctrl = monitor->dbg_bcr[i]; 219 } 220 for (i = 0; i < nwtpts; i++) { 221 regs->db_watchregs[i].dbw_addr = monitor->dbg_wvr[i]; 222 regs->db_watchregs[i].dbw_ctrl = monitor->dbg_wcr[i]; 223 } 224 } 225 226 return (0); 227 } 228 229 int 230 set_dbregs(struct thread *td, struct dbreg *regs) 231 { 232 struct debug_monitor_state *monitor; 233 uint64_t addr; 234 uint32_t ctrl; 235 int i; 236 237 monitor = &td->td_pcb->pcb_dbg_regs; 238 monitor->dbg_enable_count = 0; 239 240 for (i = 0; i < DBG_BRP_MAX; i++) { 241 addr = regs->db_breakregs[i].dbr_addr; 242 ctrl = regs->db_breakregs[i].dbr_ctrl; 243 244 /* 245 * Don't let the user set a breakpoint on a kernel or 246 * non-canonical user address. 247 */ 248 if (addr >= VM_MAXUSER_ADDRESS) 249 return (EINVAL); 250 251 /* 252 * The lowest 2 bits are ignored, so record the effective 253 * address. 254 */ 255 addr = rounddown2(addr, 4); 256 257 /* 258 * Some control fields are ignored, and other bits reserved. 259 * Only unlinked, address-matching breakpoints are supported. 260 * 261 * XXX: fields that appear unvalidated, such as BAS, have 262 * constrained undefined behaviour. If the user mis-programs 263 * these, there is no risk to the system. 264 */ 265 ctrl &= DBGBCR_EN | DBGBCR_PMC | DBGBCR_BAS; 266 if ((ctrl & DBGBCR_EN) != 0) { 267 /* Only target EL0. */ 268 if ((ctrl & DBGBCR_PMC) != DBGBCR_PMC_EL0) 269 return (EINVAL); 270 271 monitor->dbg_enable_count++; 272 } 273 274 monitor->dbg_bvr[i] = addr; 275 monitor->dbg_bcr[i] = ctrl; 276 } 277 278 for (i = 0; i < DBG_WRP_MAX; i++) { 279 addr = regs->db_watchregs[i].dbw_addr; 280 ctrl = regs->db_watchregs[i].dbw_ctrl; 281 282 /* 283 * Don't let the user set a watchpoint on a kernel or 284 * non-canonical user address. 285 */ 286 if (addr >= VM_MAXUSER_ADDRESS) 287 return (EINVAL); 288 289 /* 290 * Some control fields are ignored, and other bits reserved. 291 * Only unlinked watchpoints are supported. 292 */ 293 ctrl &= DBGWCR_EN | DBGWCR_PAC | DBGWCR_LSC | DBGWCR_BAS | 294 DBGWCR_MASK; 295 296 if ((ctrl & DBGWCR_EN) != 0) { 297 /* Only target EL0. */ 298 if ((ctrl & DBGWCR_PAC) != DBGWCR_PAC_EL0) 299 return (EINVAL); 300 301 /* Must set at least one of the load/store bits. */ 302 if ((ctrl & DBGWCR_LSC) == 0) 303 return (EINVAL); 304 305 /* 306 * When specifying the address range with BAS, the MASK 307 * field must be zero. 308 */ 309 if ((ctrl & DBGWCR_BAS) != DBGWCR_BAS && 310 (ctrl & DBGWCR_MASK) != 0) 311 return (EINVAL); 312 313 monitor->dbg_enable_count++; 314 } 315 monitor->dbg_wvr[i] = addr; 316 monitor->dbg_wcr[i] = ctrl; 317 } 318 319 if (monitor->dbg_enable_count > 0) 320 monitor->dbg_flags |= DBGMON_ENABLED; 321 322 return (0); 323 } 324 325 #ifdef COMPAT_FREEBSD32 326 int 327 fill_regs32(struct thread *td, struct reg32 *regs) 328 { 329 int i; 330 struct trapframe *tf; 331 332 tf = td->td_frame; 333 for (i = 0; i < 13; i++) 334 regs->r[i] = tf->tf_x[i]; 335 /* For arm32, SP is r13 and LR is r14 */ 336 regs->r_sp = tf->tf_x[13]; 337 regs->r_lr = tf->tf_x[14]; 338 regs->r_pc = tf->tf_elr; 339 regs->r_cpsr = tf->tf_spsr; 340 341 return (0); 342 } 343 344 int 345 set_regs32(struct thread *td, struct reg32 *regs) 346 { 347 int i; 348 struct trapframe *tf; 349 350 tf = td->td_frame; 351 for (i = 0; i < 13; i++) 352 tf->tf_x[i] = regs->r[i]; 353 /* For arm 32, SP is r13 an LR is r14 */ 354 tf->tf_x[13] = regs->r_sp; 355 tf->tf_x[14] = regs->r_lr; 356 tf->tf_elr = regs->r_pc; 357 tf->tf_spsr &= ~PSR_SETTABLE_32; 358 tf->tf_spsr |= regs->r_cpsr & PSR_SETTABLE_32; 359 360 return (0); 361 } 362 363 /* XXX fill/set dbregs/fpregs are stubbed on 32-bit arm. */ 364 int 365 fill_fpregs32(struct thread *td, struct fpreg32 *regs) 366 { 367 368 memset(regs, 0, sizeof(*regs)); 369 return (0); 370 } 371 372 int 373 set_fpregs32(struct thread *td, struct fpreg32 *regs) 374 { 375 376 return (0); 377 } 378 379 int 380 fill_dbregs32(struct thread *td, struct dbreg32 *regs) 381 { 382 383 memset(regs, 0, sizeof(*regs)); 384 return (0); 385 } 386 387 int 388 set_dbregs32(struct thread *td, struct dbreg32 *regs) 389 { 390 391 return (0); 392 } 393 #endif 394 395 void 396 exec_setregs(struct thread *td, struct image_params *imgp, uintptr_t stack) 397 { 398 struct trapframe *tf = td->td_frame; 399 struct pcb *pcb = td->td_pcb; 400 401 memset(tf, 0, sizeof(struct trapframe)); 402 403 tf->tf_x[0] = stack; 404 tf->tf_sp = STACKALIGN(stack); 405 tf->tf_lr = imgp->entry_addr; 406 tf->tf_elr = imgp->entry_addr; 407 408 td->td_pcb->pcb_tpidr_el0 = 0; 409 td->td_pcb->pcb_tpidrro_el0 = 0; 410 WRITE_SPECIALREG(tpidrro_el0, 0); 411 WRITE_SPECIALREG(tpidr_el0, 0); 412 413 #ifdef VFP 414 vfp_reset_state(td, pcb); 415 #endif 416 417 /* 418 * Clear debug register state. It is not applicable to the new process. 419 */ 420 bzero(&pcb->pcb_dbg_regs, sizeof(pcb->pcb_dbg_regs)); 421 422 /* Generate new pointer authentication keys */ 423 ptrauth_exec(td); 424 } 425 426 /* Sanity check these are the same size, they will be memcpy'd to and from */ 427 CTASSERT(sizeof(((struct trapframe *)0)->tf_x) == 428 sizeof((struct gpregs *)0)->gp_x); 429 CTASSERT(sizeof(((struct trapframe *)0)->tf_x) == 430 sizeof((struct reg *)0)->x); 431 432 int 433 get_mcontext(struct thread *td, mcontext_t *mcp, int clear_ret) 434 { 435 struct trapframe *tf = td->td_frame; 436 437 if (clear_ret & GET_MC_CLEAR_RET) { 438 mcp->mc_gpregs.gp_x[0] = 0; 439 mcp->mc_gpregs.gp_spsr = tf->tf_spsr & ~PSR_C; 440 } else { 441 mcp->mc_gpregs.gp_x[0] = tf->tf_x[0]; 442 mcp->mc_gpregs.gp_spsr = tf->tf_spsr; 443 } 444 445 memcpy(&mcp->mc_gpregs.gp_x[1], &tf->tf_x[1], 446 sizeof(mcp->mc_gpregs.gp_x[1]) * (nitems(mcp->mc_gpregs.gp_x) - 1)); 447 448 mcp->mc_gpregs.gp_sp = tf->tf_sp; 449 mcp->mc_gpregs.gp_lr = tf->tf_lr; 450 mcp->mc_gpregs.gp_elr = tf->tf_elr; 451 get_fpcontext(td, mcp); 452 453 return (0); 454 } 455 456 int 457 set_mcontext(struct thread *td, mcontext_t *mcp) 458 { 459 struct trapframe *tf = td->td_frame; 460 uint32_t spsr; 461 462 spsr = mcp->mc_gpregs.gp_spsr; 463 if ((spsr & PSR_M_MASK) != PSR_M_EL0t || 464 (spsr & PSR_AARCH32) != 0 || 465 (spsr & PSR_DAIF) != (td->td_frame->tf_spsr & PSR_DAIF)) 466 return (EINVAL); 467 468 memcpy(tf->tf_x, mcp->mc_gpregs.gp_x, sizeof(tf->tf_x)); 469 470 tf->tf_sp = mcp->mc_gpregs.gp_sp; 471 tf->tf_lr = mcp->mc_gpregs.gp_lr; 472 tf->tf_elr = mcp->mc_gpregs.gp_elr; 473 tf->tf_spsr = mcp->mc_gpregs.gp_spsr; 474 if ((tf->tf_spsr & PSR_SS) != 0) { 475 td->td_pcb->pcb_flags |= PCB_SINGLE_STEP; 476 477 WRITE_SPECIALREG(mdscr_el1, 478 READ_SPECIALREG(mdscr_el1) | MDSCR_SS); 479 isb(); 480 } 481 set_fpcontext(td, mcp); 482 483 return (0); 484 } 485 486 static void 487 get_fpcontext(struct thread *td, mcontext_t *mcp) 488 { 489 #ifdef VFP 490 struct pcb *curpcb; 491 492 MPASS(td == curthread); 493 494 curpcb = curthread->td_pcb; 495 if ((curpcb->pcb_fpflags & PCB_FP_STARTED) != 0) { 496 /* 497 * If we have just been running VFP instructions we will 498 * need to save the state to memcpy it below. 499 */ 500 vfp_save_state(td, curpcb); 501 } 502 503 KASSERT(curpcb->pcb_fpusaved == &curpcb->pcb_fpustate, 504 ("Called get_fpcontext while the kernel is using the VFP")); 505 KASSERT((curpcb->pcb_fpflags & ~PCB_FP_USERMASK) == 0, 506 ("Non-userspace FPU flags set in get_fpcontext")); 507 memcpy(mcp->mc_fpregs.fp_q, curpcb->pcb_fpustate.vfp_regs, 508 sizeof(mcp->mc_fpregs.fp_q)); 509 mcp->mc_fpregs.fp_cr = curpcb->pcb_fpustate.vfp_fpcr; 510 mcp->mc_fpregs.fp_sr = curpcb->pcb_fpustate.vfp_fpsr; 511 mcp->mc_fpregs.fp_flags = curpcb->pcb_fpflags; 512 mcp->mc_flags |= _MC_FP_VALID; 513 #endif 514 } 515 516 static void 517 set_fpcontext(struct thread *td, mcontext_t *mcp) 518 { 519 #ifdef VFP 520 struct pcb *curpcb; 521 522 MPASS(td == curthread); 523 if ((mcp->mc_flags & _MC_FP_VALID) != 0) { 524 curpcb = curthread->td_pcb; 525 526 /* 527 * Discard any vfp state for the current thread, we 528 * are about to override it. 529 */ 530 critical_enter(); 531 vfp_discard(td); 532 critical_exit(); 533 534 KASSERT(curpcb->pcb_fpusaved == &curpcb->pcb_fpustate, 535 ("Called set_fpcontext while the kernel is using the VFP")); 536 memcpy(curpcb->pcb_fpustate.vfp_regs, mcp->mc_fpregs.fp_q, 537 sizeof(mcp->mc_fpregs.fp_q)); 538 curpcb->pcb_fpustate.vfp_fpcr = mcp->mc_fpregs.fp_cr; 539 curpcb->pcb_fpustate.vfp_fpsr = mcp->mc_fpregs.fp_sr; 540 curpcb->pcb_fpflags = mcp->mc_fpregs.fp_flags & PCB_FP_USERMASK; 541 } 542 #endif 543 } 544 545 int 546 sys_sigreturn(struct thread *td, struct sigreturn_args *uap) 547 { 548 ucontext_t uc; 549 int error; 550 551 if (copyin(uap->sigcntxp, &uc, sizeof(uc))) 552 return (EFAULT); 553 554 error = set_mcontext(td, &uc.uc_mcontext); 555 if (error != 0) 556 return (error); 557 558 /* Restore signal mask. */ 559 kern_sigprocmask(td, SIG_SETMASK, &uc.uc_sigmask, NULL, 0); 560 561 return (EJUSTRETURN); 562 } 563 564 void 565 sendsig(sig_t catcher, ksiginfo_t *ksi, sigset_t *mask) 566 { 567 struct thread *td; 568 struct proc *p; 569 struct trapframe *tf; 570 struct sigframe *fp, frame; 571 struct sigacts *psp; 572 int onstack, sig; 573 574 td = curthread; 575 p = td->td_proc; 576 PROC_LOCK_ASSERT(p, MA_OWNED); 577 578 sig = ksi->ksi_signo; 579 psp = p->p_sigacts; 580 mtx_assert(&psp->ps_mtx, MA_OWNED); 581 582 tf = td->td_frame; 583 onstack = sigonstack(tf->tf_sp); 584 585 CTR4(KTR_SIG, "sendsig: td=%p (%s) catcher=%p sig=%d", td, p->p_comm, 586 catcher, sig); 587 588 /* Allocate and validate space for the signal handler context. */ 589 if ((td->td_pflags & TDP_ALTSTACK) != 0 && !onstack && 590 SIGISMEMBER(psp->ps_sigonstack, sig)) { 591 fp = (struct sigframe *)((uintptr_t)td->td_sigstk.ss_sp + 592 td->td_sigstk.ss_size); 593 #if defined(COMPAT_43) 594 td->td_sigstk.ss_flags |= SS_ONSTACK; 595 #endif 596 } else { 597 fp = (struct sigframe *)td->td_frame->tf_sp; 598 } 599 600 /* Make room, keeping the stack aligned */ 601 fp--; 602 fp = (struct sigframe *)STACKALIGN(fp); 603 604 /* Fill in the frame to copy out */ 605 bzero(&frame, sizeof(frame)); 606 get_mcontext(td, &frame.sf_uc.uc_mcontext, 0); 607 frame.sf_si = ksi->ksi_info; 608 frame.sf_uc.uc_sigmask = *mask; 609 frame.sf_uc.uc_stack = td->td_sigstk; 610 frame.sf_uc.uc_stack.ss_flags = (td->td_pflags & TDP_ALTSTACK) != 0 ? 611 (onstack ? SS_ONSTACK : 0) : SS_DISABLE; 612 mtx_unlock(&psp->ps_mtx); 613 PROC_UNLOCK(td->td_proc); 614 615 /* Copy the sigframe out to the user's stack. */ 616 if (copyout(&frame, fp, sizeof(*fp)) != 0) { 617 /* Process has trashed its stack. Kill it. */ 618 CTR2(KTR_SIG, "sendsig: sigexit td=%p fp=%p", td, fp); 619 PROC_LOCK(p); 620 sigexit(td, SIGILL); 621 } 622 623 tf->tf_x[0] = sig; 624 tf->tf_x[1] = (register_t)&fp->sf_si; 625 tf->tf_x[2] = (register_t)&fp->sf_uc; 626 tf->tf_x[8] = (register_t)catcher; 627 tf->tf_sp = (register_t)fp; 628 tf->tf_elr = (register_t)PROC_SIGCODE(p); 629 630 /* Clear the single step flag while in the signal handler */ 631 if ((td->td_pcb->pcb_flags & PCB_SINGLE_STEP) != 0) { 632 td->td_pcb->pcb_flags &= ~PCB_SINGLE_STEP; 633 WRITE_SPECIALREG(mdscr_el1, 634 READ_SPECIALREG(mdscr_el1) & ~MDSCR_SS); 635 isb(); 636 } 637 638 CTR3(KTR_SIG, "sendsig: return td=%p pc=%#x sp=%#x", td, tf->tf_elr, 639 tf->tf_sp); 640 641 PROC_LOCK(p); 642 mtx_lock(&psp->ps_mtx); 643 }
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