thunder_pcie_common.c

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    1 /*-
    2  * Copyright (c) 2015 The FreeBSD Foundation
    3  *
    4  * This software was developed by Semihalf under
    5  * the sponsorship of the FreeBSD Foundation.
    6  *
    7  * Redistribution and use in source and binary forms, with or without
    8  * modification, are permitted provided that the following conditions
    9  * are met:
   10  * 1. Redistributions of source code must retain the above copyright
   11  * notice, this list of conditions and the following disclaimer.
   12  * 2. Redistributions in binary form must reproduce the above copyright
   13  * notice, this list of conditions and the following disclaimer in the
   14  * documentation and/or other materials provided with the distribution.
   15  *
   16  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
   17  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
   18  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
   19  * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
   20  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
   21  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
   22  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
   23  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
   24  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
   25  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
   26  * SUCH DAMAGE.
   27  */
   28 
   29 /* Common PCIe functions for Cavium Thunder SOC */
   30 
   31 #include <sys/cdefs.h>
   32 __FBSDID("$FreeBSD$");
   33 
   34 #include "opt_platform.h"
   35 
   36 #include <sys/param.h>
   37 #include <sys/systm.h>
   38 #include <sys/kernel.h>
   39 #include <sys/malloc.h>
   40 #include <sys/bus.h>
   41 #include <sys/rman.h>
   42 
   43 #include <machine/bus.h>
   44 #include <machine/cpu.h>
   45 #include <machine/intr.h>
   46 
   47 #ifdef FDT
   48 #include <dev/ofw/openfirm.h>
   49 #include <dev/ofw/ofw_bus.h>
   50 #include <dev/ofw/ofw_bus_subr.h>
   51 #include <dev/ofw/ofw_pci.h>
   52 #endif
   53 
   54 #include <sys/pciio.h>
   55 #include <dev/pci/pcireg.h>
   56 #include <dev/pci/pcivar.h>
   57 #include <dev/pci/pci_private.h>
   58 #include <dev/pci/pcib_private.h>
   59 #include <dev/pci/pci_host_generic.h>
   60 #ifdef FDT
   61 #include <dev/pci/pci_host_generic_fdt.h>
   62 #endif
   63 
   64 #include "thunder_pcie_common.h"
   65 
   66 MALLOC_DEFINE(M_THUNDER_PCIE, "Thunder PCIe driver", "Thunder PCIe driver memory");
   67 
   68 #define THUNDER_CFG_BASE_TO_ECAM(x)     ((((x) >> 36UL) & 0x3) | (((x) >> 42UL) & 0x4))
   69 
   70 uint32_t
   71 range_addr_is_pci(struct pcie_range *ranges, uint64_t addr, uint64_t size)
   72 {
   73         struct pcie_range *r;
   74         int tuple;
   75 
   76         for (tuple = 0; tuple < MAX_RANGES_TUPLES; tuple++) {
   77                 r = &ranges[tuple];
   78                 if (addr >= r->pci_base &&
   79                     addr < (r->pci_base + r->size) &&
   80                     size < r->size) {
   81                         /* Address is within PCI range */
   82                         return (1);
   83                 }
   84         }
   85 
   86         /* Address is outside PCI range */
   87         return (0);
   88 }
   89 
   90 uint32_t
   91 range_addr_is_phys(struct pcie_range *ranges, uint64_t addr, uint64_t size)
   92 {
   93         struct pcie_range *r;
   94         int tuple;
   95 
   96         for (tuple = 0; tuple < MAX_RANGES_TUPLES; tuple++) {
   97                 r = &ranges[tuple];
   98                 if (addr >= r->phys_base &&
   99                     addr < (r->phys_base + r->size) &&
  100                     size < r->size) {
  101                         /* Address is within Physical range */
  102                         return (1);
  103                 }
  104         }
  105 
  106         /* Address is outside Physical range */
  107         return (0);
  108 }
  109 
  110 uint64_t
  111 range_addr_phys_to_pci(struct pcie_range *ranges, uint64_t phys_addr)
  112 {
  113         struct pcie_range *r;
  114         uint64_t offset;
  115         int tuple;
  116 
  117         /* Find physical address corresponding to given bus address */
  118         for (tuple = 0; tuple < MAX_RANGES_TUPLES; tuple++) {
  119                 r = &ranges[tuple];
  120                 if (phys_addr >= r->phys_base &&
  121                     phys_addr < (r->phys_base + r->size)) {
  122                         /* Given phys addr is in this range.
  123                          * Translate phys addr to bus addr.
  124                          */
  125                         offset = phys_addr - r->phys_base;
  126                         return (r->pci_base + offset);
  127                 }
  128         }
  129         return (0);
  130 }
  131 
  132 uint64_t
  133 range_addr_pci_to_phys(struct pcie_range *ranges, uint64_t pci_addr)
  134 {
  135         struct pcie_range *r;
  136         uint64_t offset;
  137         int tuple;
  138 
  139         /* Find physical address corresponding to given bus address */
  140         for (tuple = 0; tuple < MAX_RANGES_TUPLES; tuple++) {
  141                 r = &ranges[tuple];
  142                 if (pci_addr >= r->pci_base &&
  143                     pci_addr < (r->pci_base + r->size)) {
  144                         /* Given pci addr is in this range.
  145                          * Translate bus addr to phys addr.
  146                          */
  147                         offset = pci_addr - r->pci_base;
  148                         return (r->phys_base + offset);
  149                 }
  150         }
  151         return (0);
  152 }
  153 
  154 int
  155 thunder_pcie_identify_ecam(device_t dev, int *ecam)
  156 {
  157         rman_res_t start;
  158 
  159         /* Check if we're running on Cavium ThunderX */
  160         if (!CPU_MATCH(CPU_IMPL_MASK | CPU_PART_MASK,
  161             CPU_IMPL_CAVIUM, CPU_PART_THUNDERX, 0, 0))
  162                 return (EINVAL);
  163 
  164         start = bus_get_resource_start(dev, SYS_RES_MEMORY, 0);
  165         *ecam = THUNDER_CFG_BASE_TO_ECAM(start);
  166 
  167         device_printf(dev, "ThunderX quirk, setting ECAM to %d\n", *ecam);
  168 
  169         return (0);
  170 }
  171 
  172 #ifdef THUNDERX_PASS_1_1_ERRATA
  173 struct resource *
  174 thunder_pcie_alloc_resource(device_t dev, device_t child, int type, int *rid,
  175     rman_res_t start, rman_res_t end, rman_res_t count, u_int flags)
  176 {
  177         pci_addr_t map, testval;
  178 
  179         /*
  180          * If Enhanced Allocation is not used, we can't allocate any random
  181          * range. All internal devices have hardcoded place where they can
  182          * be located within PCI address space. Fortunately, we can read
  183          * this value from BAR.
  184          */
  185         if (((type == SYS_RES_IOPORT) || (type == SYS_RES_MEMORY)) &&
  186             RMAN_IS_DEFAULT_RANGE(start, end)) {
  187                 /* Read BAR manually to get resource address and size */
  188                 pci_read_bar(child, *rid, &map, &testval, NULL);
  189 
  190                 /* Mask the information bits */
  191                 if (PCI_BAR_MEM(map))
  192                         map &= PCIM_BAR_MEM_BASE;
  193                 else
  194                         map &= PCIM_BAR_IO_BASE;
  195 
  196                 if (PCI_BAR_MEM(testval))
  197                         testval &= PCIM_BAR_MEM_BASE;
  198                 else
  199                         testval &= PCIM_BAR_IO_BASE;
  200 
  201                 start = map;
  202                 end = start + count - 1;
  203         }
  204 
  205         return (pci_host_generic_core_alloc_resource(dev, child, type, rid,
  206             start, end, count, flags));
  207 }
  208 #endif

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FreeBSD/Linux Kernel Cross Reference sys/arm64/cavium/thunder_pcie_common.c

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sys/arm64/cavium/thunder_pcie_common.c