intel-smc.h

Version: - FREEBSD - FREEBSD-13-STABLE - FREEBSD-13-0 - FREEBSD-12-STABLE - FREEBSD-12-0 - FREEBSD-11-STABLE - FREEBSD-11-0 - FREEBSD-10-STABLE - FREEBSD-10-0 - FREEBSD-9-STABLE - FREEBSD-9-0 - FREEBSD-8-STABLE - FREEBSD-8-0 - FREEBSD-7-STABLE - FREEBSD-7-0 - FREEBSD-6-STABLE - FREEBSD-6-0 - FREEBSD-5-STABLE - FREEBSD-5-0 - FREEBSD-4-STABLE - FREEBSD-3-STABLE - FREEBSD22 - l41 - OPENBSD - linux-2.6 - MK84 - PLAN9 - xnu-8792
SearchContext: - none - 3 - 10

    1 /*-
    2  * SPDX-License-Identifier: BSD-2-Clause
    3  *
    4  * Copyright (c) 2019 Ruslan Bukin <br@bsdpad.com>
    5  *
    6  * This software was developed by SRI International and the University of
    7  * Cambridge Computer Laboratory (Department of Computer Science and
    8  * Technology) under DARPA contract HR0011-18-C-0016 ("ECATS"), as part of the
    9  * DARPA SSITH research programme.
   10  *
   11  * Redistribution and use in source and binary forms, with or without
   12  * modification, are permitted provided that the following conditions
   13  * are met:
   14  * 1. Redistributions of source code must retain the above copyright
   15  *    notice, this list of conditions and the following disclaimer.
   16  * 2. Redistributions in binary form must reproduce the above copyright
   17  *    notice, this list of conditions and the following disclaimer in the
   18  *    documentation and/or other materials provided with the distribution.
   19  *
   20  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
   21  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
   22  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
   23  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
   24  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
   25  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
   26  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
   27  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
   28  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
   29  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
   30  * SUCH DAMAGE.
   31  *
   32  * $FreeBSD$
   33  */
   34 
   35 #ifndef _ARM64_INTEL_INTEL_SMC_H_
   36 #define _ARM64_INTEL_INTEL_SMC_H_
   37 
   38 #include <dev/psci/smccc.h>
   39 
   40 /*
   41  * Intel SiP return values.
   42  */
   43 #define INTEL_SIP_SMC_STATUS_OK                         0
   44 #define INTEL_SIP_SMC_FPGA_CONFIG_STATUS_BUSY           1
   45 #define INTEL_SIP_SMC_FPGA_CONFIG_STATUS_REJECTED       2
   46 #define INTEL_SIP_SMC_FPGA_CONFIG_STATUS_ERROR          4
   47 #define INTEL_SIP_SMC_REG_ERROR                         5
   48 #define INTEL_SIP_SMC_RSU_ERROR                         7
   49 
   50 /*
   51  * Intel SiP calls.
   52  */
   53 #define INTEL_SIP_SMC_STD_CALL(func)                            \
   54     SMCCC_FUNC_ID(SMCCC_YIELDING_CALL, SMCCC_64BIT_CALL,        \
   55         SMCCC_SIP_SERVICE_CALLS, (func))
   56 #define INTEL_SIP_SMC_FAST_CALL(func)                           \
   57     SMCCC_FUNC_ID(SMCCC_FAST_CALL, SMCCC_64BIT_CALL,            \
   58         SMCCC_SIP_SERVICE_CALLS, (func))
   59 
   60 #define INTEL_SIP_SMC_FUNCID_FPGA_CONFIG_START                  1
   61 #define INTEL_SIP_SMC_FUNCID_FPGA_CONFIG_WRITE                  2
   62 #define INTEL_SIP_SMC_FUNCID_FPGA_CONFIG_COMPLETED_WRITE        3
   63 #define INTEL_SIP_SMC_FUNCID_FPGA_CONFIG_ISDONE                 4
   64 #define INTEL_SIP_SMC_FUNCID_FPGA_CONFIG_GET_MEM                5
   65 #define INTEL_SIP_SMC_FUNCID_FPGA_CONFIG_LOOPBACK               6
   66 #define INTEL_SIP_SMC_FUNCID_REG_READ                           7
   67 #define INTEL_SIP_SMC_FUNCID_REG_WRITE                          8
   68 #define INTEL_SIP_SMC_FUNCID_REG_UPDATE                         9
   69 #define INTEL_SIP_SMC_FUNCID_RSU_STATUS                         11
   70 #define INTEL_SIP_SMC_FUNCID_RSU_UPDATE                         12
   71 
   72 #define INTEL_SIP_SMC_FPGA_CONFIG_START                 \
   73     INTEL_SIP_SMC_FAST_CALL(INTEL_SIP_SMC_FUNCID_FPGA_CONFIG_START)
   74 #define INTEL_SIP_SMC_FPGA_CONFIG_WRITE                 \
   75     INTEL_SIP_SMC_STD_CALL(INTEL_SIP_SMC_FUNCID_FPGA_CONFIG_WRITE)
   76 #define INTEL_SIP_SMC_FPGA_CONFIG_COMPLETED_WRITE       \
   77     INTEL_SIP_SMC_FAST_CALL(INTEL_SIP_SMC_FUNCID_FPGA_CONFIG_COMPLETED_WRITE)
   78 #define INTEL_SIP_SMC_FPGA_CONFIG_ISDONE                \
   79     INTEL_SIP_SMC_FAST_CALL(INTEL_SIP_SMC_FUNCID_FPGA_CONFIG_ISDONE)
   80 #define INTEL_SIP_SMC_FPGA_CONFIG_GET_MEM               \
   81     INTEL_SIP_SMC_FAST_CALL(INTEL_SIP_SMC_FUNCID_FPGA_CONFIG_GET_MEM)
   82 #define INTEL_SIP_SMC_FPGA_CONFIG_LOOPBACK              \
   83     INTEL_SIP_SMC_FAST_CALL(INTEL_SIP_SMC_FUNCID_FPGA_CONFIG_LOOPBACK)
   84 #define INTEL_SIP_SMC_REG_READ                          \
   85     INTEL_SIP_SMC_FAST_CALL(INTEL_SIP_SMC_FUNCID_REG_READ)
   86 #define INTEL_SIP_SMC_REG_WRITE                         \
   87     INTEL_SIP_SMC_FAST_CALL(INTEL_SIP_SMC_FUNCID_REG_WRITE)
   88 #define INTEL_SIP_SMC_REG_UPDATE                        \
   89     INTEL_SIP_SMC_FAST_CALL(INTEL_SIP_SMC_FUNCID_REG_UPDATE)
   90 #define INTEL_SIP_SMC_RSU_STATUS                        \
   91     INTEL_SIP_SMC_FAST_CALL(INTEL_SIP_SMC_FUNCID_RSU_STATUS)
   92 #define INTEL_SIP_SMC_RSU_UPDATE                        \
   93     INTEL_SIP_SMC_FAST_CALL(INTEL_SIP_SMC_FUNCID_RSU_UPDATE)
   94 
   95 typedef int (*intel_smc_callfn_t)(register_t, register_t, register_t,
   96     register_t, register_t, register_t, register_t, register_t,
   97     struct arm_smccc_res *res);
   98 
   99 #endif /* _ARM64_INTEL_INTEL_SMC_H_ */

Cache object: 37a84405fa31f71612c2dca521e8d953

[ source navigation ] [ diff markup ] [ identifier search ] [ freetext search ] [ file search ] [ list types ] [ track identifier ]

This page is part of the FreeBSD/Linux Linux Kernel Cross-Reference, and was automatically generated using a modified version of the LXR engine.

FreeBSD/Linux Kernel Cross Reference sys/arm64/intel/intel-smc.h

FreeBSD/Linux Kernel Cross Reference
sys/arm64/intel/intel-smc.h