1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
3 *
4 * Copyright (c) 2019-2020 Ruslan Bukin <br@bsdpad.com>
5 *
6 * This software was developed by SRI International and the University of
7 * Cambridge Computer Laboratory (Department of Computer Science and
8 * Technology) under DARPA contract HR0011-18-C-0016 ("ECATS"), as part of the
9 * DARPA SSITH research programme.
10 *
11 * Redistribution and use in source and binary forms, with or without
12 * modification, are permitted provided that the following conditions
13 * are met:
14 * 1. Redistributions of source code must retain the above copyright
15 * notice, this list of conditions and the following disclaimer.
16 * 2. Redistributions in binary form must reproduce the above copyright
17 * notice, this list of conditions and the following disclaimer in the
18 * documentation and/or other materials provided with the distribution.
19 *
20 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
21 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
22 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
23 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
24 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
25 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
26 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
27 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
28 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
29 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
30 * SUCH DAMAGE.
31 */
32
33 #include "opt_acpi.h"
34
35 #include <sys/cdefs.h>
36 __FBSDID("$FreeBSD$");
37
38 #include <sys/types.h>
39 #include <sys/systm.h>
40 #include <sys/bus.h>
41 #include <sys/bitstring.h>
42 #include <sys/kernel.h>
43 #include <sys/rman.h>
44 #include <sys/tree.h>
45 #include <sys/taskqueue.h>
46 #include <sys/malloc.h>
47 #include <sys/module.h>
48 #include <vm/vm.h>
49 #include <vm/pmap.h>
50 #include <contrib/dev/acpica/include/acpi.h>
51 #include <dev/acpica/acpivar.h>
52 #include <dev/pci/pcireg.h>
53 #include <dev/pci/pcivar.h>
54 #include <dev/iommu/iommu.h>
55
56 #include <arm64/iommu/iommu.h>
57
58 #include "smmuvar.h"
59
60 #define MEMORY_RESOURCE_SIZE 0x20000
61 #define MAX_SMMU 8
62
63 struct smmu_acpi_devinfo {
64 struct resource_list di_rl;
65 };
66
67 struct iort_table_data {
68 device_t parent;
69 device_t dev;
70 ACPI_IORT_SMMU_V3 *smmu[MAX_SMMU];
71 int count;
72 };
73
74 static void
75 iort_handler(ACPI_SUBTABLE_HEADER *entry, void *arg)
76 {
77 struct iort_table_data *iort_data;
78 ACPI_IORT_NODE *node;
79 int i;
80
81 iort_data = (struct iort_table_data *)arg;
82 i = iort_data->count;
83
84 switch(entry->Type) {
85 case ACPI_IORT_NODE_SMMU_V3:
86 if (i == MAX_SMMU) {
87 printf("SMMUv3 found, but no space available.\n");
88 break;
89 }
90
91 if (iort_data->smmu[i] != NULL) {
92 if (bootverbose)
93 device_printf(iort_data->parent,
94 "smmu: Already have an SMMU table");
95 break;
96 }
97 node = (ACPI_IORT_NODE *)entry;
98 iort_data->smmu[i] = (ACPI_IORT_SMMU_V3 *)node->NodeData;
99 iort_data->count++;
100 break;
101 default:
102 break;
103 }
104 }
105
106 static void
107 smmu_acpi_identify(driver_t *driver, device_t parent)
108 {
109 struct iort_table_data iort_data;
110 ACPI_TABLE_IORT *iort;
111 vm_paddr_t iort_pa;
112 uintptr_t priv;
113 device_t dev;
114 int i;
115
116 iort_pa = acpi_find_table(ACPI_SIG_IORT);
117 if (iort_pa == 0)
118 return;
119
120 iort = acpi_map_table(iort_pa, ACPI_SIG_IORT);
121 if (iort == NULL) {
122 device_printf(parent, "smmu: Unable to map the IORT\n");
123 return;
124 }
125
126 iort_data.parent = parent;
127 for (i = 0; i < MAX_SMMU; i++)
128 iort_data.smmu[i] = NULL;
129 iort_data.count = 0;
130
131 acpi_walk_subtables(iort + 1, (char *)iort + iort->Header.Length,
132 iort_handler, &iort_data);
133 if (iort_data.count == 0) {
134 device_printf(parent, "No SMMU found.\n");
135 goto out;
136 }
137
138 for (i = 0; i < iort_data.count; i++) {
139 dev = BUS_ADD_CHILD(parent,
140 BUS_PASS_INTERRUPT + BUS_PASS_ORDER_MIDDLE, "smmu", -1);
141 if (dev == NULL) {
142 device_printf(parent, "add smmu child failed\n");
143 goto out;
144 }
145
146 /* Add the IORT data */
147 BUS_SET_RESOURCE(parent, dev, SYS_RES_IRQ, 0,
148 iort_data.smmu[i]->EventGsiv, 1);
149 BUS_SET_RESOURCE(parent, dev, SYS_RES_IRQ, 1,
150 iort_data.smmu[i]->PriGsiv, 1);
151 BUS_SET_RESOURCE(parent, dev, SYS_RES_IRQ, 2,
152 iort_data.smmu[i]->SyncGsiv, 1);
153 BUS_SET_RESOURCE(parent, dev, SYS_RES_IRQ, 3,
154 iort_data.smmu[i]->GerrGsiv, 1);
155 BUS_SET_RESOURCE(parent, dev, SYS_RES_MEMORY, 0,
156 iort_data.smmu[i]->BaseAddress, MEMORY_RESOURCE_SIZE);
157
158 priv = iort_data.smmu[i]->Flags;
159 priv <<= 32;
160 priv |= iort_data.smmu[i]->Model;
161
162 acpi_set_private(dev, (void *)priv);
163 }
164
165 iort_data.dev = dev;
166
167 out:
168 acpi_unmap_table(iort);
169 }
170
171 static int
172 smmu_acpi_probe(device_t dev)
173 {
174
175 switch((uintptr_t)acpi_get_private(dev) & 0xffffffff) {
176 case ACPI_IORT_SMMU_V3_GENERIC:
177 /* Generic SMMUv3 */
178 break;
179 default:
180 return (ENXIO);
181 }
182
183 device_set_desc(dev, SMMU_DEVSTR);
184
185 return (BUS_PROBE_NOWILDCARD);
186 }
187
188 static int
189 smmu_acpi_attach(device_t dev)
190 {
191 struct smmu_softc *sc;
192 struct smmu_unit *unit;
193 struct iommu_unit *iommu;
194 uintptr_t priv;
195 int err;
196 int rid;
197
198 sc = device_get_softc(dev);
199 sc->dev = dev;
200
201 priv = (uintptr_t)acpi_get_private(dev);
202 if ((priv >> 32) & ACPI_IORT_SMMU_V3_COHACC_OVERRIDE)
203 sc->features |= SMMU_FEATURE_COHERENCY;
204
205 if (bootverbose)
206 device_printf(sc->dev, "%s: features %x\n",
207 __func__, sc->features);
208
209 rid = 0;
210 sc->res[0] = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid,
211 RF_ACTIVE);
212 if (sc->res[0] == NULL) {
213 device_printf(dev, "Can't allocate memory resource.\n");
214 err = ENXIO;
215 goto error;
216 }
217
218 /*
219 * Interrupt lines are "eventq", "priq", "cmdq-sync", "gerror".
220 */
221
222 rid = 0;
223 sc->res[1] = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid, RF_ACTIVE);
224 if (sc->res[1] == NULL) {
225 device_printf(dev, "Can't allocate eventq IRQ resource.\n");
226 err = ENXIO;
227 goto error;
228 }
229
230 rid = 2;
231 sc->res[3] = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid, RF_ACTIVE);
232 if (sc->res[3] == NULL) {
233 device_printf(dev, "Can't allocate cmdq-sync IRQ resource.\n");
234 err = ENXIO;
235 goto error;
236 }
237
238 rid = 3;
239 sc->res[4] = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid, RF_ACTIVE);
240 if (sc->res[4] == NULL) {
241 device_printf(dev, "Can't allocate gerror IRQ resource.\n");
242 err = ENXIO;
243 goto error;
244 }
245
246 err = smmu_attach(dev);
247 if (err != 0)
248 goto error;
249
250 unit = &sc->unit;
251 unit->dev = dev;
252
253 iommu = &unit->iommu;
254 iommu->dev = dev;
255
256 LIST_INIT(&unit->domain_list);
257
258 /* Use memory start address as an xref. */
259 sc->xref = bus_get_resource_start(dev, SYS_RES_MEMORY, 0);
260
261 err = iommu_register(iommu);
262 if (err) {
263 device_printf(dev, "Failed to register SMMU.\n");
264 return (ENXIO);
265 }
266
267 return (0);
268
269 error:
270 if (bootverbose) {
271 device_printf(dev,
272 "Failed to attach. Error %d\n", err);
273 }
274 /* Failure so free resources. */
275 smmu_detach(dev);
276
277 return (err);
278 }
279
280 static device_method_t smmu_acpi_methods[] = {
281 /* Device interface */
282 DEVMETHOD(device_identify, smmu_acpi_identify),
283 DEVMETHOD(device_probe, smmu_acpi_probe),
284 DEVMETHOD(device_attach, smmu_acpi_attach),
285
286 /* End */
287 DEVMETHOD_END
288 };
289
290 DEFINE_CLASS_1(smmu, smmu_acpi_driver, smmu_acpi_methods,
291 sizeof(struct smmu_softc), smmu_driver);
292
293 EARLY_DRIVER_MODULE(smmu, acpi, smmu_acpi_driver, 0, 0,
294 BUS_PASS_INTERRUPT + BUS_PASS_ORDER_MIDDLE);
Cache object: 69c11f14a19b90cc6fb7782c89796577
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