Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)
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FreeBSD/Linux Kernel Cross Reference
sys/cam/scsi/smp_all.h
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1 /*- 2 * Copyright (c) 2010 Spectra Logic Corporation 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions, and the following disclaimer, 10 * without modification. 11 * 2. Redistributions in binary form must reproduce at minimum a disclaimer 12 * substantially similar to the "NO WARRANTY" disclaimer below 13 * ("Disclaimer") and any redistribution must be conditioned upon 14 * including a substantially similar Disclaimer requirement for further 15 * binary redistribution. 16 * 17 * NO WARRANTY 18 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 19 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 20 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR 21 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 22 * HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 23 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 24 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 25 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, 26 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING 27 * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 28 * POSSIBILITY OF SUCH DAMAGES. 29 * 30 * $Id: //depot/users/kenm/FreeBSD-test/sys/cam/scsi/smp_all.h#4 $ 31 * $FreeBSD: releng/10.0/sys/cam/scsi/smp_all.h 216088 2010-11-30 22:39:46Z ken $ 32 */ 33 34 /* 35 * Serial Management Protocol definitions. 36 */ 37 38 #ifndef _SCSI_SMP_ALL_H 39 #define _SCSI_SMP_ALL_H 1 40 41 #define SMP_FRAME_TYPE_REQUEST 0x40 42 #define SMP_FRAME_TYPE_RESPONSE 0x41 43 #define SMP_WORD_LEN 4 44 #define SMP_CRC_LEN 4 45 46 /* 47 * SMP Functions (current as of SPL Revision 7) 48 */ 49 /* 0x00 to 0x7f: SMP input functions */ 50 /* 0x00 to 0x0f: General SMP input functions */ 51 #define SMP_FUNC_REPORT_GENERAL 0x00 52 #define SMP_FUNC_REPORT_MANUF_INFO 0x01 53 #define SMP_FUNC_REPORT_SC_STATUS 0x03 54 #define SMP_FUNC_REPORT_ZONE_PERM_TBL 0x04 55 #define SMP_FUNC_REPORT_ZONE_MAN_PWD 0x05 56 #define SMP_FUNC_REPORT_BROADCAST 0x06 57 58 /* 0x10 to 0x1f: Phy-based SMP input functions */ 59 #define SMP_FUNC_DISCOVER 0x10 60 #define SMP_FUNC_REPORT_PHY_ERR_LOG 0x11 61 #define SMP_FUNC_REPORT_PHY_SATA 0x12 62 #define SMP_FUNC_REPORT_ROUTE_INFO 0x13 63 #define SMP_FUNC_REPORT_PHY_EVENT 0x14 64 65 /* 0x20 to 0x2f: Descriptor list-based SMP input functions */ 66 #define SMP_FUNC_DISCOVER_LIST 0x20 67 #define SMP_FUNC_REPORT_PHY_EVENT_LIST 0x21 68 #define SMP_FUNC_REPORT_EXP_RTL 0x22 69 70 /* 0x30 to 0x3f: Reserved for SMP input functions */ 71 /* 0x40 to 0x7f: Vendor specific */ 72 73 /* 0x80 to 0xff: SMP output functions */ 74 /* 0x80 to 0x8f: General SMP output functions */ 75 #define SMP_FUNC_CONFIG_GENERAL 0x80 76 #define SMP_FUNC_ENABLE_DISABLE_ZONING 0x81 77 #define SMP_FUNC_ZONED_BROADCAST 0x85 78 #define SMP_FUNC_ZONE_LOCK 0x86 79 #define SMP_FUNC_ZONE_ACTIVATE 0x87 80 #define SMP_FUNC_ZONE_UNLOCK 0x88 81 #define SMP_FUNC_CONFIG_ZM_PWD 0x89 82 #define SMP_FUNC_CONFIG_ZONE_PHY_INFO 0x8a 83 #define SMP_FUNC_CONFIG_ZONE_PERM_TBL 0x8b 84 85 /* 0x90 to 0x9f: Phy-based SMP output functions */ 86 #define SMP_FUNC_CONFIG_ROUTE_INFO 0x90 87 #define SMP_FUNC_PHY_CONTROL 0x91 88 #define SMP_FUNC_PHY_TEST_FUNC 0x92 89 #define SMP_FUNC_CONFIG_PHY_EVENT 0x93 90 91 /* 0xa0 to 0xbf: Reserved for SMP output functions */ 92 /* 0xc0 to 0xff: Vendor specific */ 93 94 /* 95 * Function Results (current as of SPL Revision 7) 96 */ 97 #define SMP_FR_ACCEPTED 0x00 98 #define SMP_FR_UNKNOWN_FUNC 0x01 99 #define SMP_FR_FUNCTION_FAILED 0x02 100 #define SMP_FR_INVALID_REQ_FRAME_LEN 0x03 101 #define SMP_FR_INVALID_EXP_CHG_CNT 0x04 102 #define SMP_FR_BUSY 0x05 103 #define SMP_FR_INCOMPLETE_DESC_LIST 0x06 104 #define SMP_FR_PHY_DOES_NOT_EXIST 0x10 105 #define SMP_FR_INDEX_DOES_NOT_EXIST 0x11 106 #define SMP_FR_PHY_DOES_NOT_SUP_SATA 0x12 107 #define SMP_FR_UNKNOWN_PHY_OP 0x13 108 #define SMP_FR_UNKNOWN_PHY_TEST_FUNC 0x14 109 #define SMP_FR_PHY_TEST_FUNC_INPROG 0x15 110 #define SMP_FR_PHY_VACANT 0x16 111 #define SMP_FR_UNKNOWN_PHY_EVENT_SRC 0x17 112 #define SMP_FR_UNKNOWN_DESC_TYPE 0x18 113 #define SMP_FR_UNKNOWN_PHY_FILTER 0x19 114 #define SMP_FR_AFFILIATION_VIOLATION 0x1a 115 #define SMP_FR_SMP_ZONE_VIOLATION 0x20 116 #define SMP_FR_NO_MGMT_ACCESS_RIGHTS 0x21 117 #define SMP_FR_UNKNOWN_ED_ZONING_VAL 0x22 118 #define SMP_FR_ZONE_LOCK_VIOLATION 0x23 119 #define SMP_FR_NOT_ACTIVATED 0x24 120 #define SMP_FR_ZG_OUT_OF_RANGE 0x25 121 #define SMP_FR_NO_PHYS_PRESENCE 0x26 122 #define SMP_FR_SAVING_NOT_SUP 0x27 123 #define SMP_FR_SRC_ZONE_DNE 0x28 124 #define SMP_FR_DISABLED_PWD_NOT_SUP 0x29 125 126 /* 127 * REPORT GENERAL request and response, current as of SPL Revision 7. 128 */ 129 struct smp_report_general_request 130 { 131 uint8_t frame_type; 132 uint8_t function; 133 uint8_t response_len; 134 uint8_t request_len; 135 uint8_t crc[4]; 136 }; 137 138 struct smp_report_general_response 139 { 140 uint8_t frame_type; 141 uint8_t function; 142 uint8_t function_result; 143 uint8_t response_len; 144 #define SMP_RG_RESPONSE_LEN 0x11 145 uint8_t expander_change_count[2]; 146 uint8_t expander_route_indexes[2]; 147 uint8_t long_response; 148 #define SMP_RG_LONG_RESPONSE 0x80 149 uint8_t num_phys; 150 uint8_t config_bits0; 151 #define SMP_RG_TABLE_TO_TABLE_SUP 0x80 152 #define SMP_RG_ZONE_CONFIGURING 0x40 153 #define SMP_RG_SELF_CONFIGURING 0x20 154 #define SMP_RG_STP_CONTINUE_AWT 0x10 155 #define SMP_RG_OPEN_REJECT_RETRY_SUP 0x08 156 #define SMP_RG_CONFIGURES_OTHERS 0x04 157 #define SMP_RG_CONFIGURING 0x02 158 #define SMP_RG_EXT_CONFIG_ROUTE_TABLE 0x01 159 uint8_t reserved0; 160 uint8_t encl_logical_id[8]; 161 uint8_t reserved1[8]; 162 uint8_t reserved2[2]; 163 uint8_t stp_bus_inact_time_limit[2]; 164 uint8_t stp_max_conn_time_limit[2]; 165 uint8_t stp_smp_it_nexus_loss_time[2]; 166 uint8_t config_bits1; 167 #define SMP_RG_NUM_ZONE_GROUPS_MASK 0xc0 168 #define SMP_RG_NUM_ZONE_GROUPS_SHIFT 6 169 #define SMP_RG_ZONE_LOCKED 0x10 170 #define SMP_RG_PP_SUPPORTED 0x08 171 #define SMP_RG_PP_ASSERTED 0x04 172 #define SMP_RG_ZONING_SUPPORTED 0x02 173 #define SMP_RG_ZONING_ENABLED 0x01 174 uint8_t config_bits2; 175 #define SMP_RG_SAVING 0x10 176 #define SMP_RG_SAVING_ZM_PWD_SUP 0x08 177 #define SMP_RG_SAVING_PHY_INFO_SUP 0x04 178 #define SMP_RG_SAVING_ZPERM_TAB_SUP 0x02 179 #define SMP_RG_SAVING_ZENABLED_SUP 0x01 180 uint8_t max_num_routed_addrs[2]; 181 uint8_t active_zm_address[8]; 182 uint8_t zone_lock_inact_time_limit[2]; 183 uint8_t reserved3[2]; 184 uint8_t reserved4; 185 uint8_t first_encl_conn_el_index; 186 uint8_t num_encl_conn_el_indexes; 187 uint8_t reserved5; 188 uint8_t reduced_functionality; 189 #define SMP_RG_REDUCED_FUNCTIONALITY 0x80 190 uint8_t time_to_reduced_func; 191 uint8_t initial_time_to_reduced_func; 192 uint8_t max_reduced_func_time; 193 uint8_t last_sc_stat_desc_index[2]; 194 uint8_t max_sc_stat_descs[2]; 195 uint8_t last_phy_evl_desc_index[2]; 196 uint8_t max_stored_pel_descs[2]; 197 uint8_t stp_reject_to_open_limit[2]; 198 uint8_t reserved6[2]; 199 uint8_t crc[4]; 200 }; 201 202 /* 203 * REPORT MANUFACTURER INFORMATION request and response, current as of SPL 204 * Revision 7. 205 */ 206 struct smp_report_manuf_info_request 207 { 208 uint8_t frame_type; 209 uint8_t function; 210 uint8_t response_len; 211 uint8_t request_len; 212 #define SMP_RMI_REQUEST_LEN 0x00 213 uint8_t crc[4]; 214 }; 215 216 struct smp_report_manuf_info_response 217 { 218 uint8_t frame_type; 219 uint8_t function; 220 uint8_t function_result; 221 uint8_t response_len; 222 #define SMP_RMI_RESPONSE_LEN 0x0e 223 uint8_t expander_change_count[2]; 224 uint8_t reserved0[2]; 225 uint8_t sas_11_format; 226 #define SMP_RMI_SAS11_FORMAT 0x01 227 uint8_t reserved1[3]; 228 uint8_t vendor[8]; 229 uint8_t product[16]; 230 uint8_t revision[4]; 231 uint8_t comp_vendor[8]; 232 uint8_t comp_id[2]; 233 uint8_t comp_revision; 234 uint8_t reserved2; 235 uint8_t vendor_specific[8]; 236 uint8_t crc[4]; 237 }; 238 239 /* 240 * DISCOVER request and response, current as of SPL Revision 7. 241 */ 242 struct smp_discover_request 243 { 244 uint8_t frame_type; 245 uint8_t function; 246 uint8_t response_len; 247 uint8_t request_len; 248 #define SMP_DIS_REQUEST_LEN 0x02 249 uint8_t reserved0[4]; 250 uint8_t ignore_zone_group; 251 #define SMP_DIS_IGNORE_ZONE_GROUP 0x01 252 uint8_t phy; 253 uint8_t reserved1[2]; 254 uint8_t crc[4]; 255 }; 256 257 struct smp_discover_response 258 { 259 uint8_t frame_type; 260 uint8_t function; 261 uint8_t function_result; 262 uint8_t response_len; 263 #define SMP_DIS_RESPONSE_LEN 0x20 264 uint8_t expander_change_count[2]; 265 uint8_t reserved0[3]; 266 uint8_t phy; 267 uint8_t reserved1[2]; 268 uint8_t attached_device; 269 #define SMP_DIS_AD_TYPE_MASK 0x70 270 #define SMP_DIS_AD_TYPE_NONE 0x00 271 #define SMP_DIS_AD_TYPE_SAS_SATA 0x10 272 #define SMP_DIS_AD_TYPE_EXP 0x20 273 #define SMP_DIS_AD_TYPE_EXP_OLD 0x30 274 #define SMP_DIS_ATTACH_REASON_MASK 0x0f 275 uint8_t neg_logical_link_rate; 276 #define SMP_DIS_LR_MASK 0x0f 277 #define SMP_DIS_LR_DISABLED 0x01 278 #define SMP_DIS_LR_PHY_RES_PROB 0x02 279 #define SMP_DIS_LR_SPINUP_HOLD 0x03 280 #define SMP_DIS_LR_PORT_SEL 0x04 281 #define SMP_DIS_LR_RESET_IN_PROG 0x05 282 #define SMP_DIS_LR_UNSUP_PHY_ATTACHED 0x06 283 #define SMP_DIS_LR_G1_15GBPS 0x08 284 #define SMP_DIS_LR_G2_30GBPS 0x09 285 #define SMP_DIS_LR_G3_60GBPS 0x0a 286 uint8_t config_bits0; 287 #define SMP_DIS_ATTACHED_SSP_INIT 0x08 288 #define SMP_DIS_ATTACHED_STP_INIT 0x04 289 #define SMP_DIS_ATTACHED_SMP_INIT 0x02 290 #define SMP_DIS_ATTACHED_SATA_HOST 0x01 291 uint8_t config_bits1; 292 #define SMP_DIS_ATTACHED_SATA_PORTSEL 0x80 293 #define SMP_DIS_STP_BUFFER_TOO_SMALL 0x10 294 #define SMP_DIS_ATTACHED_SSP_TARG 0x08 295 #define SMP_DIS_ATTACHED_STP_TARG 0x04 296 #define SMP_DIS_ATTACHED_SMP_TARG 0x02 297 #define SMP_DIS_ATTACHED_SATA_DEV 0x01 298 uint8_t sas_address[8]; 299 uint8_t attached_sas_address[8]; 300 uint8_t attached_phy_id; 301 uint8_t config_bits2; 302 #define SMP_DIS_ATT_SLUMB_CAP 0x10 303 #define SMP_DIS_ATT_PAR_CAP 0x08 304 #define SMP_DIS_ATT_IN_ZPSDS_PER 0x04 305 #define SMP_DIS_ATT_REQ_IN_ZPSDS 0x02 306 #define SMP_DIS_ATT_BREAK_RPL_CAP 0x01 307 uint8_t reserved2[6]; 308 uint8_t link_rate0; 309 #define SMP_DIS_PROG_MIN_LR_MASK 0xf0 310 #define SMP_DIS_PROG_MIN_LR_SHIFT 4 311 #define SMP_DIS_HARD_MIN_LR_MASK 0x0f 312 uint8_t link_rate1; 313 #define SMP_DIS_PROG_MAX_LR_MAX 0xf0 314 #define SMP_DIS_PROG_MAX_LR_SHIFT 4 315 #define SMP_DIS_HARD_MAX_LR_MASK 0x0f 316 uint8_t phy_change_count; 317 uint8_t pp_timeout; 318 #define SMP_DIS_VIRTUAL_PHY 0x80 319 #define SMP_DIS_PP_TIMEOUT_MASK 0x0f 320 uint8_t routing_attr; 321 uint8_t conn_type; 322 uint8_t conn_el_index; 323 uint8_t conn_phys_link; 324 uint8_t config_bits3; 325 #define SMP_DIS_PHY_POW_COND_MASK 0xc0 326 #define SMP_DIS_PHY_POW_COND_SHIFT 6 327 #define SMP_DIS_SAS_SLUMB_CAP 0x08 328 #define SMP_DIS_SAS_PART_CAP 0x04 329 #define SMP_DIS_SATA_SLUMB_CAP 0x02 330 #define SMP_DIS_SATA_PART_CAP 0x01 331 uint8_t config_bits4; 332 #define SMP_DIS_SAS_SLUMB_ENB 0x08 333 #define SMP_DIS_SAS_PART_ENB 0x04 334 #define SMP_DIS_SATA_SLUMB_ENB 0x02 335 #define SMP_DIS_SATA_PART_ENB 0x01 336 uint8_t vendor_spec[2]; 337 uint8_t attached_dev_name[8]; 338 uint8_t config_bits5; 339 #define SMP_DIS_REQ_IN_ZPSDS_CHG 0x40 340 #define SMP_DIS_IN_ZPSDS_PER 0x20 341 #define SMP_DIS_REQ_IN_ZPSDS 0x10 342 #define SMP_DIS_ZG_PER 0x04 343 #define SMP_DIS_IN_ZPSDS 0x02 344 #define SMP_DIS_ZONING_ENB 0x01 345 uint8_t reserved3[2]; 346 uint8_t zone_group; 347 uint8_t self_config_status; 348 uint8_t self_config_levels_comp; 349 uint8_t reserved4[2]; 350 uint8_t self_config_sas_addr[8]; 351 uint8_t prog_phy_cap[4]; 352 uint8_t current_phy_cap[4]; 353 uint8_t attached_phy_cap[4]; 354 uint8_t reserved5[6]; 355 uint8_t neg_phys_link_rate; 356 #define SMP_DIS_REASON_MASK 0xf0 357 #define SMP_DIS_REASON_SHIFT 4 358 #define SMP_DIS_PHYS_LR_MASK 0x0f 359 uint8_t config_bits6; 360 #define SMP_DIS_OPTICAL_MODE_ENB 0x04 361 #define SMP_DIS_NEG_SSC 0x02 362 #define SMP_DIS_HW_MUX_SUP 0x01 363 uint8_t config_bits7; 364 #define SMP_DIS_DEF_IN_ZPSDS_PER 0x20 365 #define SMP_DIS_DEF_REQ_IN_ZPSDS 0x10 366 #define SMP_DIS_DEF_ZG_PER 0x04 367 #define SMP_DIS_DEF_ZONING_ENB 0x01 368 uint8_t reserved6; 369 uint8_t reserved7; 370 uint8_t default_zone_group; 371 uint8_t config_bits8; 372 #define SMP_DIS_SAVED_IN_ZPSDS_PER 0x20 373 #define SMP_DIS_SAVED_REQ_IN_SPSDS 0x10 374 #define SMP_DIS_SAVED_ZG_PER 0x04 375 #define SMP_DIS_SAVED_ZONING_ENB 0x01 376 uint8_t reserved8; 377 uint8_t reserved9; 378 uint8_t saved_zone_group; 379 uint8_t config_bits9; 380 #define SMP_DIS_SHADOW_IN_ZPSDS_PER 0x20 381 #define SMP_DIS_SHADOW_IN_REQ_IN_ZPSDS 0x10 382 #define SMP_DIS_SHADOW_ZG_PER 0x04 383 uint8_t reserved10; 384 uint8_t reserved11; 385 uint8_t shadow_zone_group; 386 uint8_t device_slot_num; 387 uint8_t device_slot_group_num; 388 uint8_t device_slot_group_out_conn[6]; 389 uint8_t stp_buffer_size[2]; 390 uint8_t reserved12; 391 uint8_t reserved13; 392 uint8_t crc[4]; 393 }; 394 395 /* 396 * PHY CONTROL request and response. Current as of SPL Revision 7. 397 */ 398 struct smp_phy_control_request 399 { 400 uint8_t frame_type; 401 uint8_t function; 402 uint8_t response_len; 403 #define SMP_PC_RESPONSE_LEN 0x00 404 uint8_t request_len; 405 #define SMP_PC_REQUEST_LEN 0x09 406 uint8_t expected_exp_chg_cnt[2]; 407 uint8_t reserved0[3]; 408 uint8_t phy; 409 uint8_t phy_operation; 410 #define SMP_PC_PHY_OP_NOP 0x00 411 #define SMP_PC_PHY_OP_LINK_RESET 0x01 412 #define SMP_PC_PHY_OP_HARD_RESET 0x02 413 #define SMP_PC_PHY_OP_DISABLE 0x03 414 #define SMP_PC_PHY_OP_CLEAR_ERR_LOG 0x05 415 #define SMP_PC_PHY_OP_CLEAR_AFFILIATON 0x06 416 #define SMP_PC_PHY_OP_TRANS_SATA_PSS 0x07 417 #define SMP_PC_PHY_OP_CLEAR_STP_ITN_LS 0x08 418 #define SMP_PC_PHY_OP_SET_ATT_DEV_NAME 0x09 419 uint8_t update_pp_timeout; 420 #define SMP_PC_UPDATE_PP_TIMEOUT 0x01 421 uint8_t reserved1[12]; 422 uint8_t attached_device_name[8]; 423 uint8_t prog_min_phys_link_rate; 424 #define SMP_PC_PROG_MIN_PL_RATE_MASK 0xf0 425 #define SMP_PC_PROG_MIN_PL_RATE_SHIFT 4 426 uint8_t prog_max_phys_link_rate; 427 #define SMP_PC_PROG_MAX_PL_RATE_MASK 0xf0 428 #define SMP_PC_PROG_MAX_PL_RATE_SHIFT 4 429 uint8_t config_bits0; 430 #define SMP_PC_SP_NC 0x00 431 #define SMP_PC_SP_DISABLE 0x02 432 #define SMP_PC_SP_ENABLE 0x01 433 #define SMP_PC_SAS_SLUMBER_NC 0x00 434 #define SMP_PC_SAS_SLUMBER_DISABLE 0x80 435 #define SMP_PC_SAS_SLUMBER_ENABLE 0x40 436 #define SMP_PC_SAS_SLUMBER_MASK 0xc0 437 #define SMP_PC_SAS_SLUMBER_SHIFT 6 438 #define SMP_PC_SAS_PARTIAL_NC 0x00 439 #define SMP_PC_SAS_PARTIAL_DISABLE 0x20 440 #define SMP_PC_SAS_PARTIAL_ENABLE 0x10 441 #define SMP_PC_SAS_PARTIAL_MASK 0x30 442 #define SMP_PC_SAS_PARTIAL_SHIFT 4 443 #define SMP_PC_SATA_SLUMBER_NC 0x00 444 #define SMP_PC_SATA_SLUMBER_DISABLE 0x08 445 #define SMP_PC_SATA_SLUMBER_ENABLE 0x04 446 #define SMP_PC_SATA_SLUMBER_MASK 0x0c 447 #define SMP_PC_SATA_SLUMBER_SHIFT 2 448 #define SMP_PC_SATA_PARTIAL_NC 0x00 449 #define SMP_PC_SATA_PARTIAL_DISABLE 0x02 450 #define SMP_PC_SATA_PARTIAL_ENABLE 0x01 451 #define SMP_PC_SATA_PARTIAL_MASK 0x03 452 #define SMP_PC_SATA_PARTIAL_SHIFT 0 453 uint8_t reserved2; 454 uint8_t pp_timeout_value; 455 #define SMP_PC_PP_TIMEOUT_MASK 0x0f 456 uint8_t reserved3[3]; 457 uint8_t crc[4]; 458 }; 459 460 struct smp_phy_control_response 461 { 462 uint8_t frame_type; 463 uint8_t function; 464 uint8_t function_result; 465 uint8_t response_len; 466 #define SMP_PC_RESPONSE_LEN 0x00 467 uint8_t crc[4]; 468 }; 469 470 __BEGIN_DECLS 471 472 const char *smp_error_desc(int function_result); 473 const char *smp_command_desc(uint8_t cmd_num); 474 void smp_command_decode(uint8_t *smp_request, int request_len, struct sbuf *sb, 475 char *line_prefix, int first_line_len, int line_len); 476 void smp_command_sbuf(struct ccb_smpio *smpio, struct sbuf *sb, 477 char *line_prefix, int first_line_len, int line_len); 478 479 #ifdef _KERNEL 480 void smp_error_sbuf(struct ccb_smpio *smpio, struct sbuf *sb); 481 #else /* !_KERNEL*/ 482 void smp_error_sbuf(struct cam_device *device, struct ccb_smpio *smpio, 483 struct sbuf *sb); 484 #endif /* _KERNEL/!_KERNEL */ 485 486 void smp_report_general_sbuf(struct smp_report_general_response *response, 487 int response_len, struct sbuf *sb); 488 489 void smp_report_manuf_info_sbuf(struct smp_report_manuf_info_response *response, 490 int response_len, struct sbuf *sb); 491 492 void smp_report_general(struct ccb_smpio *smpio, uint32_t retries, 493 void (*cbfcnp)(struct cam_periph *, union ccb *), 494 struct smp_report_general_request *request, 495 int request_len, uint8_t *response, int response_len, 496 int long_response, uint32_t timeout); 497 498 void smp_discover(struct ccb_smpio *smpio, uint32_t retries, 499 void (*cbfcnp)(struct cam_periph *, union ccb *), 500 struct smp_discover_request *request, int request_len, 501 uint8_t *response, int response_len, int long_response, 502 int ignore_zone_group, int phy, uint32_t timeout); 503 504 void smp_report_manuf_info(struct ccb_smpio *smpio, uint32_t retries, 505 void (*cbfcnp)(struct cam_periph *, union ccb *), 506 struct smp_report_manuf_info_request *request, 507 int request_len, uint8_t *response, int response_len, 508 int long_response, uint32_t timeout); 509 510 void smp_phy_control(struct ccb_smpio *smpio, uint32_t retries, 511 void (*cbfcnp)(struct cam_periph *, union ccb *), 512 struct smp_phy_control_request *request, int request_len, 513 uint8_t *response, int response_len, int long_response, 514 uint32_t expected_exp_change_count, int phy, int phy_op, 515 int update_pp_timeout_val, uint64_t attached_device_name, 516 int prog_min_prl, int prog_max_prl, int slumber_partial, 517 int pp_timeout_value, uint32_t timeout); 518 __END_DECLS 519 520 #endif /*_SCSI_SMP_ALL_H*/
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