The Design and Implementation of the FreeBSD Operating System, Second Edition
Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)


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FreeBSD/Linux Kernel Cross Reference
sys/cddl/dev/dtrace/riscv/dtrace_asm.S

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    1 /*
    2  * CDDL HEADER START
    3  *
    4  * The contents of this file are subject to the terms of the
    5  * Common Development and Distribution License, Version 1.0 only
    6  * (the "License").  You may not use this file except in compliance
    7  * with the License.
    8  *
    9  * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
   10  * or http://www.opensolaris.org/os/licensing.
   11  * See the License for the specific language governing permissions
   12  * and limitations under the License.
   13  *
   14  * When distributing Covered Code, include this CDDL HEADER in each
   15  * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
   16  * If applicable, add the following below this CDDL HEADER, with the
   17  * fields enclosed by brackets "[]" replaced with your own identifying
   18  * information: Portions Copyright [yyyy] [name of copyright owner]
   19  *
   20  * CDDL HEADER END
   21  *
   22  * Portions Copyright 2016 Ruslan Bukin <br@bsdpad.com>
   23  *
   24  * $FreeBSD$
   25  */
   26 /*
   27  * Copyright 2004 Sun Microsystems, Inc.  All rights reserved.
   28  * Use is subject to license terms.
   29  */
   30 
   31 #define _ASM
   32 #define _LOCORE
   33 
   34 #include <sys/cpuvar_defs.h>
   35 #include <sys/dtrace.h>
   36 
   37 #include <machine/riscvreg.h>
   38 #include <machine/asm.h>
   39 
   40 #include "assym.inc"
   41 
   42 /*
   43 void dtrace_membar_producer(void)
   44 */
   45 ENTRY(dtrace_membar_producer)
   46         RET
   47 END(dtrace_membar_producer)
   48 
   49 /*
   50 void dtrace_membar_consumer(void)
   51 */
   52 ENTRY(dtrace_membar_consumer)
   53         RET
   54 END(dtrace_membar_consumer)
   55 
   56 /*
   57 dtrace_icookie_t dtrace_interrupt_disable(void)
   58 */
   59 ENTRY(dtrace_interrupt_disable)
   60         csrrci  a0, sstatus, (SSTATUS_SIE)
   61         andi    a0, a0, (SSTATUS_SIE)
   62         RET
   63 END(dtrace_interrupt_disable)
   64 
   65 /*
   66 void dtrace_interrupt_enable(dtrace_icookie_t cookie)
   67 */
   68 ENTRY(dtrace_interrupt_enable)
   69         csrs    sstatus, a0
   70         RET
   71 END(dtrace_interrupt_enable)
   72 /*
   73 uint8_t
   74 dtrace_fuword8_nocheck(void *addr)
   75 */
   76 ENTRY(dtrace_fuword8_nocheck)
   77         lb      a0, 0(a0)
   78         RET
   79 END(dtrace_fuword8_nocheck)
   80 
   81 /*
   82 uint16_t
   83 dtrace_fuword16_nocheck(void *addr)
   84 */
   85 ENTRY(dtrace_fuword16_nocheck)
   86         lh      a0, 0(a0)
   87         RET
   88 END(dtrace_fuword16_nocheck)
   89 
   90 /*
   91 uint32_t
   92 dtrace_fuword32_nocheck(void *addr)
   93 */
   94 ENTRY(dtrace_fuword32_nocheck)
   95         lw      a0, 0(a0)
   96         RET
   97 END(dtrace_fuword32_nocheck)
   98 
   99 /*
  100 uint64_t
  101 dtrace_fuword64_nocheck(void *addr)
  102 */
  103 ENTRY(dtrace_fuword64_nocheck)
  104         ld      a0, 0(a0)
  105         RET
  106 END(dtrace_fuword64_nocheck)
  107 
  108 /*
  109 void
  110 dtrace_copy(uintptr_t uaddr, uintptr_t kaddr, size_t size)
  111 */
  112 ENTRY(dtrace_copy)
  113         beqz    a2, 2f          /* If len == 0 then skip loop */
  114 1:
  115         lb      a4, 0(a0)       /* Load from uaddr */
  116         addi    a0, a0, 1
  117         sb      a4, 0(a1)       /* Store in kaddr */
  118         addi    a1, a1, 1
  119         addi    a2, a2, -1      /* len-- */
  120         bnez    a2, 1b
  121 2:
  122         RET
  123 END(dtrace_copy)
  124 
  125 /*
  126 void
  127 dtrace_copystr(uintptr_t uaddr, uintptr_t kaddr, size_t size,
  128     volatile uint16_t *flags)
  129 XXX: Check for flags?
  130 */
  131 ENTRY(dtrace_copystr)
  132         beqz    a2, 2f          /* If len == 0 then skip loop */
  133         lb      a4, 0(a0)       /* Load from uaddr */
  134         addi    a0, a0, 1
  135         sb      a4, 0(a1)       /* Store in kaddr */
  136         addi    a1, a1, 1
  137         beqz    a4, 2f          /* If == 0 then break */
  138         addi    a2, a2, -1      /* len-- */
  139         bnez    a2, 1b
  140 2:
  141         RET
  142 END(dtrace_copystr)
  143 
  144 /*
  145 uintptr_t
  146 dtrace_caller(int aframes)
  147 */
  148 ENTRY(dtrace_caller)
  149         li      a0, -1
  150         RET
  151 END(dtrace_caller)
  152 
  153 /*
  154 uint32_t
  155 dtrace_cas32(uint32_t *target, uint32_t cmp, uint32_t new)
  156 */
  157 ENTRY(dtrace_cas32)
  158 1:      lr.w    a3, 0(a0)       /* Load target */
  159         bne     a3, a1, 2f      /* *target != cmp ? return */
  160         sc.w    a4, a2, 0(a0)   /* Store new to target */
  161         bnez    a4, 1b          /* Try again if store not succeed */
  162 2:      mv      a0, a3          /* Return the value loaded from target */
  163         RET
  164 END(dtrace_cas32)
  165 
  166 /*
  167 void *
  168 dtrace_casptr(volatile void *target, volatile void *cmp, volatile void *new)
  169 */
  170 ENTRY(dtrace_casptr)
  171 1:      lr.d    a3, 0(a0)       /* Load target */
  172         bne     a3, a1, 2f      /* *target != cmp ? return */
  173         sc.d    a4, a2, 0(a0)   /* Store new to target */
  174         bnez    a4, 1b          /* Try again if store not succeed */
  175 2:      mv      a0, a3          /* Return the value loaded from target */
  176         RET
  177 END(dtrace_casptr)

Cache object: 5883b80c56c0e6cf00c686f5ee161394


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