1 /*
2 * Mach Operating System
3 * Copyright (c) 1992 Carnegie Mellon University
4 * All Rights Reserved.
5 *
6 * Permission to use, copy, modify and distribute this software and its
7 * documentation is hereby granted, provided that both the copyright
8 * notice and this permission notice appear in all copies of the
9 * software, derivative works or modified versions, and any portions
10 * thereof, and that both notices appear in supporting documentation.
11 *
12 * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
13 * CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND FOR
14 * ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
15 *
16 * Carnegie Mellon requests users of this software to return to
17 *
18 * Software Distribution Coordinator or Software.Distribution@CS.CMU.EDU
19 * School of Computer Science
20 * Carnegie Mellon University
21 * Pittsburgh PA 15213-3890
22 *
23 * any improvements or extensions that they make and grant Carnegie Mellon
24 * the rights to redistribute these changes.
25 */
26 /*
27 * HISTORY
28 * $Log: audio_config.h,v $
29 * Revision 2.3 93/03/26 17:59:52 mrt
30 * Don't define by default the register map.
31 *
32 *
33 * Revision 2.2 93/03/18 10:37:01 mrt
34 * Created.
35 * [93/03/17 21:38:48 af]
36 *
37 */
38
39 /*
40 * Here platform specific code to define sample_t & co
41 * [to cope with weird DMA engines], and other customs
42 */
43 #ifdef FLAMINGO
44 #define splaudio splbio
45 #define sample_t unsigned char /* later */
46 #define samples_to_chars bcopy
47 #define chars_to_samples bcopy
48 /* Sparse space ! */
49 typedef struct {
50 volatile unsigned long cr; /* command register (wo) */
51 /*#define ir cr /* interrupt register (ro) */
52 volatile unsigned long dr; /* data register (rw) */
53 volatile unsigned long dsr1; /* D-channel status register 1 (ro) */
54 volatile unsigned long der; /* D-channel error register (ro) */
55 volatile unsigned long dctb; /* D-channel transmit register (wo) */
56 /*#define dcrb dctb /* D-channel receive register (ro) */
57 volatile unsigned long bbtb; /* Bb-channel transmit register (wo) */
58 /*#define bbrb bbtb /* Bb-channel receive register (ro) */
59 volatile unsigned long bctb; /* Bc-channel transmit register (wo)*/
60 /*#define bcrb bctb /* Bc-channel receive register (ro) */
61 volatile unsigned long dsr2; /* D-channel status register 2 (ro) */
62 } amd79c30_padded_regs_t;
63
64 /* give the chip 400ns in between accesses */
65 #define read_reg(r,v) \
66 { (v) = ((r) >> 8) & 0xff; delay(1); }
67
68 #define write_reg(r,v) \
69 { (r) = (((v) & 0xff) << 8) | \
70 0x200000000L; /*bytemask*/ \
71 delay(1); wbflush(); \
72 }
73
74 /* Write 16 bits of data from variable v to the data port of the audio chip */
75 #define WAMD16(regs, v) \
76 { write_reg((regs)->dr,v); \
77 write_reg((regs)->dr,v>>8); }
78
79 #define mb() wbflush()
80
81 #endif /* FLAMINGO */
82
83
84 #ifdef MAXINE
85 #define splaudio splhigh
86 typedef struct {
87 volatile unsigned char cr; /* command register (wo) */
88 /*#define ir cr /* interrupt register (ro) */
89 char pad0[63];
90 volatile unsigned char dr; /* data register (rw) */
91 char pad1[63];
92 volatile unsigned char dsr1; /* D-channel status register 1 (ro) */
93 char pad2[63];
94 volatile unsigned char der; /* D-channel error register (ro) */
95 char pad3[63];
96 volatile unsigned char dctb; /* D-channel transmit register (wo) */
97 /*#define dcrb dctb /* D-channel receive register (ro) */
98 char pad4[63];
99 volatile unsigned char bbtb; /* Bb-channel transmit register (wo) */
100 /*#define bbrb bbtb /* Bb-channel receive register (ro) */
101 char pad5[63];
102 volatile unsigned char bctb; /* Bc-channel transmit register (wo)*/
103 /*#define bcrb bctb /* Bc-channel receive register (ro) */
104 char pad6[63];
105 volatile unsigned char dsr2; /* D-channel status register 2 (ro) */
106 char pad7[63];
107 } amd79c30_padded_regs_t;
108
109 /* give the chip 400ns in between accesses */
110 #define read_reg(r,v) \
111 { (v) = (r); delay(1); }
112
113 #define write_reg(r,v) \
114 { (r) = (v); delay(1); wbflush(); }
115
116 /* Write 16 bits of data from variable v to the data port of the audio chip */
117 #define WAMD16(regs, v) \
118 { write_reg((regs)->dr,v); \
119 write_reg((regs)->dr,v>>8); }
120
121 #define mb()
122
123 #endif /* MAXINE */
124
125
126 #ifndef sample_t
127 #define sample_t unsigned char
128 #define samples_to_chars bcopy
129 #define chars_to_samples bcopy
130 #endif
131
132 /*
133 * More architecture-specific customizations
134 */
135 #ifdef alpha
136 #define sample_rpt_int(x) (((x)<<24)|((x)<<16)|((x)<<8)|((x)<<0))
137 #define sample_rpt_long(x) ((sample_rpt_int(x)<<32)|sample_rpt_int(x))
138 #endif
139
140 #ifndef sample_rpt_long
141 #define sample_rpt_long(x) (((x)<<24)|((x)<<16)|((x)<<8)|((x)<<0))
142 #endif
143
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