The Design and Implementation of the FreeBSD Operating System, Second Edition
Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)


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FreeBSD/Linux Kernel Cross Reference
sys/compat/freebsd32/freebsd32_ioctl.h

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    1 /*-
    2  * Copyright (c) 2008 David E. O'Brien
    3  * All rights reserved.
    4  *
    5  * Redistribution and use in source and binary forms, with or without
    6  * modification, are permitted provided that the following conditions
    7  * are met:
    8  * 1. Redistributions of source code must retain the above copyright
    9  *    notice, this list of conditions and the following disclaimer.
   10  * 2. Redistributions in binary form must reproduce the above copyright
   11  *    notice, this list of conditions and the following disclaimer in the
   12  *    documentation and/or other materials provided with the distribution.
   13  * 3. Neither the name of the author nor the names of its contributors
   14  *    may be used to endorse or promote products derived from this software
   15  *    without specific prior written permission.
   16  *
   17  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
   18  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
   19  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
   20  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
   21  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
   22  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
   23  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
   24  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
   25  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
   26  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
   27  * SUCH DAMAGE.
   28  *
   29  * $FreeBSD: releng/11.2/sys/compat/freebsd32/freebsd32_ioctl.h 331722 2018-03-29 02:50:57Z eadler $
   30  */
   31 
   32 #ifndef _COMPAT_FREEBSD32_IOCTL_H_
   33 #define _COMPAT_FREEBSD32_IOCTL_H_
   34 
   35 #include <cam/scsi/scsi_sg.h>
   36 
   37 typedef __uint32_t caddr_t32;
   38 
   39 struct ioc_toc_header32 {
   40         u_short len;
   41         u_char  starting_track;
   42         u_char  ending_track;
   43 };
   44 
   45 struct ioc_read_toc_entry32 {
   46         u_char  address_format;
   47         u_char  starting_track;
   48         u_short data_len;
   49         uint32_t data;          /* struct cd_toc_entry* */
   50 };
   51 
   52 #define MDNPAD32        MDNPAD - 1
   53 struct md_ioctl32 {
   54         unsigned        md_version;     /* Structure layout version */
   55         unsigned        md_unit;        /* unit number */
   56         enum md_types   md_type;        /* type of disk */
   57         caddr_t32       md_file;        /* pathname of file to mount */
   58         off_t           md_mediasize;   /* size of disk in bytes */
   59         unsigned        md_sectorsize;  /* sectorsize */
   60         unsigned        md_options;     /* options */
   61         u_int64_t       md_base;        /* base address */
   62         int             md_fwheads;     /* firmware heads */
   63         int             md_fwsectors;   /* firmware sectors */
   64         int             md_pad[MDNPAD32]; /* padding for future ideas */
   65 };
   66 
   67 struct fiodgname_arg32 {
   68         int             len;
   69         caddr_t32       buf;
   70 };
   71 
   72 struct mem_range_op32
   73 {
   74         caddr_t32       mo_desc;
   75         int             mo_arg[2];
   76 };
   77 
   78 struct pci_conf32 {
   79         struct pcisel   pc_sel;         /* domain+bus+slot+function */
   80         u_int8_t        pc_hdr;         /* PCI header type */
   81         u_int16_t       pc_subvendor;   /* card vendor ID */
   82         u_int16_t       pc_subdevice;   /* card device ID, assigned by
   83                                            card vendor */
   84         u_int16_t       pc_vendor;      /* chip vendor ID */
   85         u_int16_t       pc_device;      /* chip device ID, assigned by
   86                                            chip vendor */
   87         u_int8_t        pc_class;       /* chip PCI class */
   88         u_int8_t        pc_subclass;    /* chip PCI subclass */
   89         u_int8_t        pc_progif;      /* chip PCI programming interface */
   90         u_int8_t        pc_revid;       /* chip revision ID */
   91         char            pd_name[PCI_MAXNAMELEN + 1];  /* device name */
   92         u_int32_t       pd_unit;        /* device unit number */
   93 };
   94 
   95 struct pci_match_conf32 {
   96         struct pcisel           pc_sel;         /* domain+bus+slot+function */
   97         char                    pd_name[PCI_MAXNAMELEN + 1];  /* device name */
   98         u_int32_t               pd_unit;        /* Unit number */
   99         u_int16_t               pc_vendor;      /* PCI Vendor ID */
  100         u_int16_t               pc_device;      /* PCI Device ID */
  101         u_int8_t                pc_class;       /* PCI class */
  102         u_int32_t               flags;          /* Matching expression */
  103 };
  104 
  105 struct pci_conf_io32 {
  106         u_int32_t               pat_buf_len;    /* pattern buffer length */
  107         u_int32_t               num_patterns;   /* number of patterns */
  108         caddr_t32               patterns;       /* struct pci_match_conf ptr */
  109         u_int32_t               match_buf_len;  /* match buffer length */
  110         u_int32_t               num_matches;    /* number of matches returned */
  111         caddr_t32               matches;        /* struct pci_conf ptr */
  112         u_int32_t               offset;         /* offset into device list */
  113         u_int32_t               generation;     /* device list generation */
  114         u_int32_t               status;         /* request status */
  115 };
  116 
  117 #define CDIOREADTOCENTRYS_32 _IOWR('c', 5, struct ioc_read_toc_entry32)
  118 #define CDIOREADTOCHEADER_32 _IOR('c', 4, struct ioc_toc_header32)
  119 #define MDIOCATTACH_32  _IOC(IOC_INOUT, 'm', 0, sizeof(struct md_ioctl32) + 4)
  120 #define MDIOCDETACH_32  _IOC(IOC_INOUT, 'm', 1, sizeof(struct md_ioctl32) + 4)
  121 #define MDIOCQUERY_32   _IOC(IOC_INOUT, 'm', 2, sizeof(struct md_ioctl32) + 4)
  122 #define MDIOCLIST_32    _IOC(IOC_INOUT, 'm', 3, sizeof(struct md_ioctl32) + 4)
  123 #define FIODGNAME_32    _IOW('f', 120, struct fiodgname_arg32)
  124 #define MEMRANGE_GET32  _IOWR('m', 50, struct mem_range_op32)
  125 #define MEMRANGE_SET32  _IOW('m', 51, struct mem_range_op32)
  126 #define PCIOCGETCONF_32 _IOWR('p', 5, struct pci_conf_io32)
  127 #define SG_IO_32        _IOWR(SGIOC, 0x85, struct sg_io_hdr32)
  128 
  129 #endif  /* _COMPAT_FREEBSD32_IOCTL_H_ */

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