fxr.watson.org: sys/contrib/dev/acpica/include/actbl2.h

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sys/contrib/dev/acpica/include/actbl2.h

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1 /****************************************************************************** 2 * 3 * Name: actbl2.h - ACPI Table Definitions (tables not in ACPI spec) 4 * 5 *****************************************************************************/ 6 7 /****************************************************************************** 8 * 9 * 1. Copyright Notice 10 * 11 * Some or all of this work - Copyright (c) 1999 - 2022, Intel Corp. 12 * All rights reserved. 13 * 14 * 2. License 15 * 16 * 2.1. This is your license from Intel Corp. under its intellectual property 17 * rights. You may have additional license terms from the party that provided 18 * you this software, covering your right to use that party's intellectual 19 * property rights. 20 * 21 * 2.2. Intel grants, free of charge, to any person ("Licensee") obtaining a 22 * copy of the source code appearing in this file ("Covered Code") an 23 * irrevocable, perpetual, worldwide license under Intel's copyrights in the 24 * base code distributed originally by Intel ("Original Intel Code") to copy, 25 * make derivatives, distribute, use and display any portion of the Covered 26 * Code in any form, with the right to sublicense such rights; and 27 * 28 * 2.3. Intel grants Licensee a non-exclusive and non-transferable patent 29 * license (with the right to sublicense), under only those claims of Intel 30 * patents that are infringed by the Original Intel Code, to make, use, sell, 31 * offer to sell, and import the Covered Code and derivative works thereof 32 * solely to the minimum extent necessary to exercise the above copyright 33 * license, and in no event shall the patent license extend to any additions 34 * to or modifications of the Original Intel Code. No other license or right 35 * is granted directly or by implication, estoppel or otherwise; 36 * 37 * The above copyright and patent license is granted only if the following 38 * conditions are met: 39 * 40 * 3. Conditions 41 * 42 * 3.1. Redistribution of Source with Rights to Further Distribute Source. 43 * Redistribution of source code of any substantial portion of the Covered 44 * Code or modification with rights to further distribute source must include 45 * the above Copyright Notice, the above License, this list of Conditions, 46 * and the following Disclaimer and Export Compliance provision. In addition, 47 * Licensee must cause all Covered Code to which Licensee contributes to 48 * contain a file documenting the changes Licensee made to create that Covered 49 * Code and the date of any change. Licensee must include in that file the 50 * documentation of any changes made by any predecessor Licensee. Licensee 51 * must include a prominent statement that the modification is derived, 52 * directly or indirectly, from Original Intel Code. 53 * 54 * 3.2. Redistribution of Source with no Rights to Further Distribute Source. 55 * Redistribution of source code of any substantial portion of the Covered 56 * Code or modification without rights to further distribute source must 57 * include the following Disclaimer and Export Compliance provision in the 58 * documentation and/or other materials provided with distribution. In 59 * addition, Licensee may not authorize further sublicense of source of any 60 * portion of the Covered Code, and must include terms to the effect that the 61 * license from Licensee to its licensee is limited to the intellectual 62 * property embodied in the software Licensee provides to its licensee, and 63 * not to intellectual property embodied in modifications its licensee may 64 * make. 65 * 66 * 3.3. Redistribution of Executable. Redistribution in executable form of any 67 * substantial portion of the Covered Code or modification must reproduce the 68 * above Copyright Notice, and the following Disclaimer and Export Compliance 69 * provision in the documentation and/or other materials provided with the 70 * distribution. 71 * 72 * 3.4. Intel retains all right, title, and interest in and to the Original 73 * Intel Code. 74 * 75 * 3.5. Neither the name Intel nor any other trademark owned or controlled by 76 * Intel shall be used in advertising or otherwise to promote the sale, use or 77 * other dealings in products derived from or relating to the Covered Code 78 * without prior written authorization from Intel. 79 * 80 * 4. Disclaimer and Export Compliance 81 * 82 * 4.1. INTEL MAKES NO WARRANTY OF ANY KIND REGARDING ANY SOFTWARE PROVIDED 83 * HERE. ANY SOFTWARE ORIGINATING FROM INTEL OR DERIVED FROM INTEL SOFTWARE 84 * IS PROVIDED "AS IS," AND INTEL WILL NOT PROVIDE ANY SUPPORT, ASSISTANCE, 85 * INSTALLATION, TRAINING OR OTHER SERVICES. INTEL WILL NOT PROVIDE ANY 86 * UPDATES, ENHANCEMENTS OR EXTENSIONS. INTEL SPECIFICALLY DISCLAIMS ANY 87 * IMPLIED WARRANTIES OF MERCHANTABILITY, NONINFRINGEMENT AND FITNESS FOR A 88 * PARTICULAR PURPOSE. 89 * 90 * 4.2. IN NO EVENT SHALL INTEL HAVE ANY LIABILITY TO LICENSEE, ITS LICENSEES 91 * OR ANY OTHER THIRD PARTY, FOR ANY LOST PROFITS, LOST DATA, LOSS OF USE OR 92 * COSTS OF PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES, OR FOR ANY INDIRECT, 93 * SPECIAL OR CONSEQUENTIAL DAMAGES ARISING OUT OF THIS AGREEMENT, UNDER ANY 94 * CAUSE OF ACTION OR THEORY OF LIABILITY, AND IRRESPECTIVE OF WHETHER INTEL 95 * HAS ADVANCE NOTICE OF THE POSSIBILITY OF SUCH DAMAGES. THESE LIMITATIONS 96 * SHALL APPLY NOTWITHSTANDING THE FAILURE OF THE ESSENTIAL PURPOSE OF ANY 97 * LIMITED REMEDY. 98 * 99 * 4.3. Licensee shall not export, either directly or indirectly, any of this 100 * software or system incorporating such software without first obtaining any 101 * required license or other approval from the U. S. Department of Commerce or 102 * any other agency or department of the United States Government. In the 103 * event Licensee exports any such software from the United States or 104 * re-exports any such software from a foreign destination, Licensee shall 105 * ensure that the distribution and export/re-export of the software is in 106 * compliance with all laws, regulations, orders, or other restrictions of the 107 * U.S. Export Administration Regulations. Licensee agrees that neither it nor 108 * any of its subsidiaries will export/re-export any technical data, process, 109 * software, or service, directly or indirectly, to any country for which the 110 * United States government or any agency thereof requires an export license, 111 * other governmental approval, or letter of assurance, without first obtaining 112 * such license, approval or letter. 113 * 114 ***************************************************************************** 115 * 116 * Alternatively, you may choose to be licensed under the terms of the 117 * following license: 118 * 119 * Redistribution and use in source and binary forms, with or without 120 * modification, are permitted provided that the following conditions 121 * are met: 122 * 1. Redistributions of source code must retain the above copyright 123 * notice, this list of conditions, and the following disclaimer, 124 * without modification. 125 * 2. Redistributions in binary form must reproduce at minimum a disclaimer 126 * substantially similar to the "NO WARRANTY" disclaimer below 127 * ("Disclaimer") and any redistribution must be conditioned upon 128 * including a substantially similar Disclaimer requirement for further 129 * binary redistribution. 130 * 3. Neither the names of the above-listed copyright holders nor the names 131 * of any contributors may be used to endorse or promote products derived 132 * from this software without specific prior written permission. 133 * 134 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 135 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 136 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 137 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 138 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 139 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 140 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 141 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 142 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 143 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 144 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 145 * 146 * Alternatively, you may choose to be licensed under the terms of the 147 * GNU General Public License ("GPL") version 2 as published by the Free 148 * Software Foundation. 149 * 150 *****************************************************************************/ 151 152 #ifndef __ACTBL2_H__ 153 #define __ACTBL2_H__ 154 155 156 /******************************************************************************* 157 * 158 * Additional ACPI Tables (2) 159 * 160 * These tables are not consumed directly by the ACPICA subsystem, but are 161 * included here to support device drivers and the AML disassembler. 162 * 163 ******************************************************************************/ 164 165 166 /* 167 * Values for description table header signatures for tables defined in this 168 * file. Useful because they make it more difficult to inadvertently type in 169 * the wrong signature. 170 */ 171 #define ACPI_SIG_AGDI "AGDI" /* Arm Generic Diagnostic Dump and Reset Device Interface */ 172 #define ACPI_SIG_APMT "APMT" /* Arm Performance Monitoring Unit table */ 173 #define ACPI_SIG_BDAT "BDAT" /* BIOS Data ACPI Table */ 174 #define ACPI_SIG_CCEL "CCEL" /* CC Event Log Table */ 175 #define ACPI_SIG_CDAT "CDAT" /* Coherent Device Attribute Table */ 176 #define ACPI_SIG_IORT "IORT" /* IO Remapping Table */ 177 #define ACPI_SIG_IVRS "IVRS" /* I/O Virtualization Reporting Structure */ 178 #define ACPI_SIG_LPIT "LPIT" /* Low Power Idle Table */ 179 #define ACPI_SIG_MADT "APIC" /* Multiple APIC Description Table */ 180 #define ACPI_SIG_MCFG "MCFG" /* PCI Memory Mapped Configuration table */ 181 #define ACPI_SIG_MCHI "MCHI" /* Management Controller Host Interface table */ 182 #define ACPI_SIG_MPST "MPST" /* Memory Power State Table */ 183 #define ACPI_SIG_MSDM "MSDM" /* Microsoft Data Management Table */ 184 #define ACPI_SIG_NFIT "NFIT" /* NVDIMM Firmware Interface Table */ 185 #define ACPI_SIG_NHLT "NHLT" /* Non HD Audio Link Table */ 186 #define ACPI_SIG_PCCT "PCCT" /* Platform Communications Channel Table */ 187 #define ACPI_SIG_PDTT "PDTT" /* Platform Debug Trigger Table */ 188 #define ACPI_SIG_PHAT "PHAT" /* Platform Health Assessment Table */ 189 #define ACPI_SIG_PMTT "PMTT" /* Platform Memory Topology Table */ 190 #define ACPI_SIG_PPTT "PPTT" /* Processor Properties Topology Table */ 191 #define ACPI_SIG_PRMT "PRMT" /* Platform Runtime Mechanism Table */ 192 #define ACPI_SIG_RASF "RASF" /* RAS Feature table */ 193 #define ACPI_SIG_RGRT "RGRT" /* Regulatory Graphics Resource Table */ 194 #define ACPI_SIG_SBST "SBST" /* Smart Battery Specification Table */ 195 #define ACPI_SIG_SDEI "SDEI" /* Software Delegated Exception Interface Table */ 196 #define ACPI_SIG_SDEV "SDEV" /* Secure Devices table */ 197 #define ACPI_SIG_SVKL "SVKL" /* Storage Volume Key Location Table */ 198 #define ACPI_SIG_TDEL "TDEL" /* TD Event Log Table */ 199 200 201 /* 202 * All tables must be byte-packed to match the ACPI specification, since 203 * the tables are provided by the system BIOS. 204 */ 205 #pragma pack(1) 206 207 /* 208 * Note: C bitfields are not used for this reason: 209 * 210 * "Bitfields are great and easy to read, but unfortunately the C language 211 * does not specify the layout of bitfields in memory, which means they are 212 * essentially useless for dealing with packed data in on-disk formats or 213 * binary wire protocols." (Or ACPI tables and buffers.) "If you ask me, 214 * this decision was a design error in C. Ritchie could have picked an order 215 * and stuck with it." Norman Ramsey. 216 * See http://stackoverflow.com/a/1053662/41661 217 */ 218 219 220 /******************************************************************************* 221 * 222 * AEST - Arm Error Source Table 223 * 224 * Conforms to: ACPI for the Armv8 RAS Extensions 1.1 Platform Design Document 225 * September 2020. 226 * 227 ******************************************************************************/ 228 229 typedef struct acpi_table_aest 230 { 231 ACPI_TABLE_HEADER Header; 232 void *NodeArray[]; 233 234 } ACPI_TABLE_AEST; 235 236 /* Common Subtable header - one per Node Structure (Subtable) */ 237 238 typedef struct acpi_aest_hdr 239 { 240 UINT8 Type; 241 UINT16 Length; 242 UINT8 Reserved; 243 UINT32 NodeSpecificOffset; 244 UINT32 NodeInterfaceOffset; 245 UINT32 NodeInterruptOffset; 246 UINT32 NodeInterruptCount; 247 UINT64 TimestampRate; 248 UINT64 Reserved1; 249 UINT64 ErrorInjectionRate; 250 251 } ACPI_AEST_HEADER; 252 253 /* Values for Type above */ 254 255 #define ACPI_AEST_PROCESSOR_ERROR_NODE 0 256 #define ACPI_AEST_MEMORY_ERROR_NODE 1 257 #define ACPI_AEST_SMMU_ERROR_NODE 2 258 #define ACPI_AEST_VENDOR_ERROR_NODE 3 259 #define ACPI_AEST_GIC_ERROR_NODE 4 260 #define ACPI_AEST_NODE_TYPE_RESERVED 5 /* 5 and above are reserved */ 261 262 263 /* 264 * AEST subtables (Error nodes) 265 */ 266 267 /* 0: Processor Error */ 268 269 typedef struct acpi_aest_processor 270 { 271 UINT32 ProcessorId; 272 UINT8 ResourceType; 273 UINT8 Reserved; 274 UINT8 Flags; 275 UINT8 Revision; 276 UINT64 ProcessorAffinity; 277 278 } ACPI_AEST_PROCESSOR; 279 280 /* Values for ResourceType above, related structs below */ 281 282 #define ACPI_AEST_CACHE_RESOURCE 0 283 #define ACPI_AEST_TLB_RESOURCE 1 284 #define ACPI_AEST_GENERIC_RESOURCE 2 285 #define ACPI_AEST_RESOURCE_RESERVED 3 /* 3 and above are reserved */ 286 287 /* 0R: Processor Cache Resource Substructure */ 288 289 typedef struct acpi_aest_processor_cache 290 { 291 UINT32 CacheReference; 292 UINT32 Reserved; 293 294 } ACPI_AEST_PROCESSOR_CACHE; 295 296 /* Values for CacheType above */ 297 298 #define ACPI_AEST_CACHE_DATA 0 299 #define ACPI_AEST_CACHE_INSTRUCTION 1 300 #define ACPI_AEST_CACHE_UNIFIED 2 301 #define ACPI_AEST_CACHE_RESERVED 3 /* 3 and above are reserved */ 302 303 /* 1R: Processor TLB Resource Substructure */ 304 305 typedef struct acpi_aest_processor_tlb 306 { 307 UINT32 TlbLevel; 308 UINT32 Reserved; 309 310 } ACPI_AEST_PROCESSOR_TLB; 311 312 /* 2R: Processor Generic Resource Substructure */ 313 314 typedef struct acpi_aest_processor_generic 315 { 316 UINT32 Resource; 317 318 } ACPI_AEST_PROCESSOR_GENERIC; 319 320 /* 1: Memory Error */ 321 322 typedef struct acpi_aest_memory 323 { 324 UINT32 SratProximityDomain; 325 326 } ACPI_AEST_MEMORY; 327 328 /* 2: Smmu Error */ 329 330 typedef struct acpi_aest_smmu 331 { 332 UINT32 IortNodeReference; 333 UINT32 SubcomponentReference; 334 335 } ACPI_AEST_SMMU; 336 337 /* 3: Vendor Defined */ 338 339 typedef struct acpi_aest_vendor 340 { 341 UINT32 AcpiHid; 342 UINT32 AcpiUid; 343 UINT8 VendorSpecificData[16]; 344 345 } ACPI_AEST_VENDOR; 346 347 /* 4: Gic Error */ 348 349 typedef struct acpi_aest_gic 350 { 351 UINT32 InterfaceType; 352 UINT32 InstanceId; 353 354 } ACPI_AEST_GIC; 355 356 /* Values for InterfaceType above */ 357 358 #define ACPI_AEST_GIC_CPU 0 359 #define ACPI_AEST_GIC_DISTRIBUTOR 1 360 #define ACPI_AEST_GIC_REDISTRIBUTOR 2 361 #define ACPI_AEST_GIC_ITS 3 362 #define ACPI_AEST_GIC_RESERVED 4 /* 4 and above are reserved */ 363 364 365 /* Node Interface Structure */ 366 367 typedef struct acpi_aest_node_interface 368 { 369 UINT8 Type; 370 UINT8 Reserved[3]; 371 UINT32 Flags; 372 UINT64 Address; 373 UINT32 ErrorRecordIndex; 374 UINT32 ErrorRecordCount; 375 UINT64 ErrorRecordImplemented; 376 UINT64 ErrorStatusReporting; 377 UINT64 AddressingMode; 378 379 } ACPI_AEST_NODE_INTERFACE; 380 381 /* Values for Type field above */ 382 383 #define ACPI_AEST_NODE_SYSTEM_REGISTER 0 384 #define ACPI_AEST_NODE_MEMORY_MAPPED 1 385 #define ACPI_AEST_XFACE_RESERVED 2 /* 2 and above are reserved */ 386 387 /* Node Interrupt Structure */ 388 389 typedef struct acpi_aest_node_interrupt 390 { 391 UINT8 Type; 392 UINT8 Reserved[2]; 393 UINT8 Flags; 394 UINT32 Gsiv; 395 UINT8 IortId; 396 UINT8 Reserved1[3]; 397 398 } ACPI_AEST_NODE_INTERRUPT; 399 400 /* Values for Type field above */ 401 402 #define ACPI_AEST_NODE_FAULT_HANDLING 0 403 #define ACPI_AEST_NODE_ERROR_RECOVERY 1 404 #define ACPI_AEST_XRUPT_RESERVED 2 /* 2 and above are reserved */ 405 406 407 /******************************************************************************* 408 * AGDI - Arm Generic Diagnostic Dump and Reset Device Interface 409 * 410 * Conforms to "ACPI for Arm Components 1.1, Platform Design Document" 411 * ARM DEN0093 v1.1 412 * 413 ******************************************************************************/ 414 typedef struct acpi_table_agdi 415 { 416 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 417 UINT8 Flags; 418 UINT8 Reserved[3]; 419 UINT32 SdeiEvent; 420 UINT32 Gsiv; 421 422 } ACPI_TABLE_AGDI; 423 424 /* Mask for Flags field above */ 425 426 #define ACPI_AGDI_SIGNALING_MODE (1) 427 428 429 /******************************************************************************* 430 * 431 * APMT - ARM Performance Monitoring Unit Table 432 * 433 * Conforms to: 434 * ARM Performance Monitoring Unit Architecture 1.0 Platform Design Document 435 * ARM DEN0117 v1.0 November 25, 2021 436 * 437 ******************************************************************************/ 438 439 typedef struct acpi_table_apmt { 440 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 441 } ACPI_TABLE_APMT; 442 443 #define ACPI_APMT_NODE_ID_LENGTH 4 444 445 /* 446 * APMT subtables 447 */ 448 typedef struct acpi_apmt_node { 449 UINT16 Length; 450 UINT8 Flags; 451 UINT8 Type; 452 UINT32 Id; 453 UINT64 InstPrimary; 454 UINT32 InstSecondary; 455 UINT64 BaseAddress0; 456 UINT64 BaseAddress1; 457 UINT32 OvflwIrq; 458 UINT32 Reserved; 459 UINT32 OvflwIrqFlags; 460 UINT32 ProcAffinity; 461 UINT32 ImplId; 462 } ACPI_APMT_NODE; 463 464 /* Masks for Flags field above */ 465 466 #define ACPI_APMT_FLAGS_DUAL_PAGE (1<<0) 467 #define ACPI_APMT_FLAGS_AFFINITY (1<<1) 468 #define ACPI_APMT_FLAGS_ATOMIC (1<<2) 469 470 /* Values for Flags dual page field above */ 471 472 #define ACPI_APMT_FLAGS_DUAL_PAGE_NSUPP (0<<0) 473 #define ACPI_APMT_FLAGS_DUAL_PAGE_SUPP (1<<0) 474 475 /* Values for Flags processor affinity field above */ 476 #define ACPI_APMT_FLAGS_AFFINITY_PROC (0<<1) 477 #define ACPI_APMT_FLAGS_AFFINITY_PROC_CONTAINER (1<<1) 478 479 /* Values for Flags 64-bit atomic field above */ 480 #define ACPI_APMT_FLAGS_ATOMIC_NSUPP (0<<2) 481 #define ACPI_APMT_FLAGS_ATOMIC_SUPP (1<<2) 482 483 /* Values for Type field above */ 484 485 enum acpi_apmt_node_type { 486 ACPI_APMT_NODE_TYPE_MC = 0x00, 487 ACPI_APMT_NODE_TYPE_SMMU = 0x01, 488 ACPI_APMT_NODE_TYPE_PCIE_ROOT = 0x02, 489 ACPI_APMT_NODE_TYPE_ACPI = 0x03, 490 ACPI_APMT_NODE_TYPE_CACHE = 0x04, 491 ACPI_APMT_NODE_TYPE_COUNT 492 }; 493 494 /* Masks for ovflw_irq_flags field above */ 495 496 #define ACPI_APMT_OVFLW_IRQ_FLAGS_MODE (1<<0) 497 #define ACPI_APMT_OVFLW_IRQ_FLAGS_TYPE (1<<1) 498 499 /* Values for ovflw_irq_flags mode field above */ 500 501 #define ACPI_APMT_OVFLW_IRQ_FLAGS_MODE_LEVEL (0<<0) 502 #define ACPI_APMT_OVFLW_IRQ_FLAGS_MODE_EDGE (1<<0) 503 504 /* Values for ovflw_irq_flags type field above */ 505 506 #define ACPI_APMT_OVFLW_IRQ_FLAGS_TYPE_WIRED (0<<1) 507 508 509 /******************************************************************************* 510 * 511 * BDAT - BIOS Data ACPI Table 512 * 513 * Conforms to "BIOS Data ACPI Table", Interface Specification v4.0 Draft 5 514 * Nov 2020 515 * 516 ******************************************************************************/ 517 518 typedef struct acpi_table_bdat 519 { 520 ACPI_TABLE_HEADER Header; 521 ACPI_GENERIC_ADDRESS Gas; 522 523 } ACPI_TABLE_BDAT; 524 525 /******************************************************************************* 526 * 527 * CCEL - CC-Event Log 528 * From: "Guest-Host-Communication Interface (GHCI) for Intel 529 * Trust Domain Extensions (Intel TDX)". Feb 2022 530 * 531 ******************************************************************************/ 532 533 typedef struct acpi_table_ccel 534 { 535 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 536 UINT8 CCType; 537 UINT8 CCSubType; 538 UINT16 Reserved; 539 UINT64 LogAreaMinimumLength; 540 UINT64 LogAreaStartAddress; 541 542 } ACPI_TABLE_CCEL; 543 544 /******************************************************************************* 545 * 546 * IORT - IO Remapping Table 547 * 548 * Conforms to "IO Remapping Table System Software on ARM Platforms", 549 * Document number: ARM DEN 0049E.e, Sep 2022 550 * 551 ******************************************************************************/ 552 553 typedef struct acpi_table_iort 554 { 555 ACPI_TABLE_HEADER Header; 556 UINT32 NodeCount; 557 UINT32 NodeOffset; 558 UINT32 Reserved; 559 560 } ACPI_TABLE_IORT; 561 562 563 /* 564 * IORT subtables 565 */ 566 typedef struct acpi_iort_node 567 { 568 UINT8 Type; 569 UINT16 Length; 570 UINT8 Revision; 571 UINT32 Identifier; 572 UINT32 MappingCount; 573 UINT32 MappingOffset; 574 char NodeData[1]; 575 576 } ACPI_IORT_NODE; 577 578 /* Values for subtable Type above */ 579 580 enum AcpiIortNodeType 581 { 582 ACPI_IORT_NODE_ITS_GROUP = 0x00, 583 ACPI_IORT_NODE_NAMED_COMPONENT = 0x01, 584 ACPI_IORT_NODE_PCI_ROOT_COMPLEX = 0x02, 585 ACPI_IORT_NODE_SMMU = 0x03, 586 ACPI_IORT_NODE_SMMU_V3 = 0x04, 587 ACPI_IORT_NODE_PMCG = 0x05, 588 ACPI_IORT_NODE_RMR = 0x06, 589 }; 590 591 592 typedef struct acpi_iort_id_mapping 593 { 594 UINT32 InputBase; /* Lowest value in input range */ 595 UINT32 IdCount; /* Number of IDs */ 596 UINT32 OutputBase; /* Lowest value in output range */ 597 UINT32 OutputReference; /* A reference to the output node */ 598 UINT32 Flags; 599 600 } ACPI_IORT_ID_MAPPING; 601 602 /* Masks for Flags field above for IORT subtable */ 603 604 #define ACPI_IORT_ID_SINGLE_MAPPING (1) 605 606 607 typedef struct acpi_iort_memory_access 608 { 609 UINT32 CacheCoherency; 610 UINT8 Hints; 611 UINT16 Reserved; 612 UINT8 MemoryFlags; 613 614 } ACPI_IORT_MEMORY_ACCESS; 615 616 /* Values for CacheCoherency field above */ 617 618 #define ACPI_IORT_NODE_COHERENT 0x00000001 /* The device node is fully coherent */ 619 #define ACPI_IORT_NODE_NOT_COHERENT 0x00000000 /* The device node is not coherent */ 620 621 /* Masks for Hints field above */ 622 623 #define ACPI_IORT_HT_TRANSIENT (1) 624 #define ACPI_IORT_HT_WRITE (1<<1) 625 #define ACPI_IORT_HT_READ (1<<2) 626 #define ACPI_IORT_HT_OVERRIDE (1<<3) 627 628 /* Masks for MemoryFlags field above */ 629 630 #define ACPI_IORT_MF_COHERENCY (1) 631 #define ACPI_IORT_MF_ATTRIBUTES (1<<1) 632 633 634 /* 635 * IORT node specific subtables 636 */ 637 typedef struct acpi_iort_its_group 638 { 639 UINT32 ItsCount; 640 UINT32 Identifiers[1]; /* GIC ITS identifier array */ 641 642 } ACPI_IORT_ITS_GROUP; 643 644 645 typedef struct acpi_iort_named_component 646 { 647 UINT32 NodeFlags; 648 UINT64 MemoryProperties; /* Memory access properties */ 649 UINT8 MemoryAddressLimit; /* Memory address size limit */ 650 char DeviceName[1]; /* Path of namespace object */ 651 652 } ACPI_IORT_NAMED_COMPONENT; 653 654 /* Masks for Flags field above */ 655 656 #define ACPI_IORT_NC_STALL_SUPPORTED (1) 657 #define ACPI_IORT_NC_PASID_BITS (31<<1) 658 659 typedef struct acpi_iort_root_complex 660 { 661 UINT64 MemoryProperties; /* Memory access properties */ 662 UINT32 AtsAttribute; 663 UINT32 PciSegmentNumber; 664 UINT8 MemoryAddressLimit; /* Memory address size limit */ 665 UINT16 PasidCapabilities; /* PASID Capabilities */ 666 UINT8 Reserved[1]; /* Reserved, must be zero */ 667 668 } ACPI_IORT_ROOT_COMPLEX; 669 670 /* Masks for AtsAttribute field above */ 671 672 #define ACPI_IORT_ATS_SUPPORTED (1) /* The root complex ATS support */ 673 #define ACPI_IORT_PRI_SUPPORTED (1<<1) /* The root complex PRI support */ 674 #define ACPI_IORT_PASID_FWD_SUPPORTED (1<<2) /* The root complex PASID forward support */ 675 676 /* Masks for PasidCapabilities field above */ 677 #define ACPI_IORT_PASID_MAX_WIDTH (0x1F) /* Bits 0-4 */ 678 679 typedef struct acpi_iort_smmu 680 { 681 UINT64 BaseAddress; /* SMMU base address */ 682 UINT64 Span; /* Length of memory range */ 683 UINT32 Model; 684 UINT32 Flags; 685 UINT32 GlobalInterruptOffset; 686 UINT32 ContextInterruptCount; 687 UINT32 ContextInterruptOffset; 688 UINT32 PmuInterruptCount; 689 UINT32 PmuInterruptOffset; 690 UINT64 Interrupts[1]; /* Interrupt array */ 691 692 } ACPI_IORT_SMMU; 693 694 /* Values for Model field above */ 695 696 #define ACPI_IORT_SMMU_V1 0x00000000 /* Generic SMMUv1 */ 697 #define ACPI_IORT_SMMU_V2 0x00000001 /* Generic SMMUv2 */ 698 #define ACPI_IORT_SMMU_CORELINK_MMU400 0x00000002 /* ARM Corelink MMU-400 */ 699 #define ACPI_IORT_SMMU_CORELINK_MMU500 0x00000003 /* ARM Corelink MMU-500 */ 700 #define ACPI_IORT_SMMU_CORELINK_MMU401 0x00000004 /* ARM Corelink MMU-401 */ 701 #define ACPI_IORT_SMMU_CAVIUM_THUNDERX 0x00000005 /* Cavium ThunderX SMMUv2 */ 702 703 /* Masks for Flags field above */ 704 705 #define ACPI_IORT_SMMU_DVM_SUPPORTED (1) 706 #define ACPI_IORT_SMMU_COHERENT_WALK (1<<1) 707 708 /* Global interrupt format */ 709 710 typedef struct acpi_iort_smmu_gsi 711 { 712 UINT32 NSgIrpt; 713 UINT32 NSgIrptFlags; 714 UINT32 NSgCfgIrpt; 715 UINT32 NSgCfgIrptFlags; 716 717 } ACPI_IORT_SMMU_GSI; 718 719 720 typedef struct acpi_iort_smmu_v3 721 { 722 UINT64 BaseAddress; /* SMMUv3 base address */ 723 UINT32 Flags; 724 UINT32 Reserved; 725 UINT64 VatosAddress; 726 UINT32 Model; 727 UINT32 EventGsiv; 728 UINT32 PriGsiv; 729 UINT32 GerrGsiv; 730 UINT32 SyncGsiv; 731 UINT32 Pxm; 732 UINT32 IdMappingIndex; 733 734 } ACPI_IORT_SMMU_V3; 735 736 /* Values for Model field above */ 737 738 #define ACPI_IORT_SMMU_V3_GENERIC 0x00000000 /* Generic SMMUv3 */ 739 #define ACPI_IORT_SMMU_V3_HISILICON_HI161X 0x00000001 /* HiSilicon Hi161x SMMUv3 */ 740 #define ACPI_IORT_SMMU_V3_CAVIUM_CN99XX 0x00000002 /* Cavium CN99xx SMMUv3 */ 741 742 /* Masks for Flags field above */ 743 744 #define ACPI_IORT_SMMU_V3_COHACC_OVERRIDE (1) 745 #define ACPI_IORT_SMMU_V3_HTTU_OVERRIDE (3<<1) 746 #define ACPI_IORT_SMMU_V3_PXM_VALID (1<<3) 747 #define ACPI_IORT_SMMU_V3_DEVICEID_VALID (1<<4) 748 749 typedef struct acpi_iort_pmcg 750 { 751 UINT64 Page0BaseAddress; 752 UINT32 OverflowGsiv; 753 UINT32 NodeReference; 754 UINT64 Page1BaseAddress; 755 756 } ACPI_IORT_PMCG; 757 758 typedef struct acpi_iort_rmr { 759 UINT32 Flags; 760 UINT32 RmrCount; 761 UINT32 RmrOffset; 762 763 } ACPI_IORT_RMR; 764 765 /* Masks for Flags field above */ 766 #define ACPI_IORT_RMR_REMAP_PERMITTED (1) 767 #define ACPI_IORT_RMR_ACCESS_PRIVILEGE (1<<1) 768 769 /* 770 * Macro to access the Access Attributes in flags field above: 771 * Access Attributes is encoded in bits 9:2 772 */ 773 #define ACPI_IORT_RMR_ACCESS_ATTRIBUTES(flags) (((flags) >> 2) & 0xFF) 774 775 /* Values for above Access Attributes */ 776 777 #define ACPI_IORT_RMR_ATTR_DEVICE_NGNRNE 0x00 778 #define ACPI_IORT_RMR_ATTR_DEVICE_NGNRE 0x01 779 #define ACPI_IORT_RMR_ATTR_DEVICE_NGRE 0x02 780 #define ACPI_IORT_RMR_ATTR_DEVICE_GRE 0x03 781 #define ACPI_IORT_RMR_ATTR_NORMAL_NC 0x04 782 #define ACPI_IORT_RMR_ATTR_NORMAL_IWB_OWB 0x05 783 784 typedef struct acpi_iort_rmr_desc { 785 UINT64 BaseAddress; 786 UINT64 Length; 787 UINT32 Reserved; 788 789 } ACPI_IORT_RMR_DESC; 790 791 /******************************************************************************* 792 * 793 * IVRS - I/O Virtualization Reporting Structure 794 * Version 1 795 * 796 * Conforms to "AMD I/O Virtualization Technology (IOMMU) Specification", 797 * Revision 1.26, February 2009. 798 * 799 ******************************************************************************/ 800 801 typedef struct acpi_table_ivrs 802 { 803 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 804 UINT32 Info; /* Common virtualization info */ 805 UINT64 Reserved; 806 807 } ACPI_TABLE_IVRS; 808 809 /* Values for Info field above */ 810 811 #define ACPI_IVRS_PHYSICAL_SIZE 0x00007F00 /* 7 bits, physical address size */ 812 #define ACPI_IVRS_VIRTUAL_SIZE 0x003F8000 /* 7 bits, virtual address size */ 813 #define ACPI_IVRS_ATS_RESERVED 0x00400000 /* ATS address translation range reserved */ 814 815 816 /* IVRS subtable header */ 817 818 typedef struct acpi_ivrs_header 819 { 820 UINT8 Type; /* Subtable type */ 821 UINT8 Flags; 822 UINT16 Length; /* Subtable length */ 823 UINT16 DeviceId; /* ID of IOMMU */ 824 825 } ACPI_IVRS_HEADER; 826 827 /* Values for subtable Type above */ 828 829 enum AcpiIvrsType 830 { 831 ACPI_IVRS_TYPE_HARDWARE1 = 0x10, 832 ACPI_IVRS_TYPE_HARDWARE2 = 0x11, 833 ACPI_IVRS_TYPE_HARDWARE3 = 0x40, 834 ACPI_IVRS_TYPE_MEMORY1 = 0x20, 835 ACPI_IVRS_TYPE_MEMORY2 = 0x21, 836 ACPI_IVRS_TYPE_MEMORY3 = 0x22 837 }; 838 839 /* Masks for Flags field above for IVHD subtable */ 840 841 #define ACPI_IVHD_TT_ENABLE (1) 842 #define ACPI_IVHD_PASS_PW (1<<1) 843 #define ACPI_IVHD_RES_PASS_PW (1<<2) 844 #define ACPI_IVHD_ISOC (1<<3) 845 #define ACPI_IVHD_IOTLB (1<<4) 846 847 /* Masks for Flags field above for IVMD subtable */ 848 849 #define ACPI_IVMD_UNITY (1) 850 #define ACPI_IVMD_READ (1<<1) 851 #define ACPI_IVMD_WRITE (1<<2) 852 #define ACPI_IVMD_EXCLUSION_RANGE (1<<3) 853 854 855 /* 856 * IVRS subtables, correspond to Type in ACPI_IVRS_HEADER 857 */ 858 859 /* 0x10: I/O Virtualization Hardware Definition Block (IVHD) */ 860 861 typedef struct acpi_ivrs_hardware_10 862 { 863 ACPI_IVRS_HEADER Header; 864 UINT16 CapabilityOffset; /* Offset for IOMMU control fields */ 865 UINT64 BaseAddress; /* IOMMU control registers */ 866 UINT16 PciSegmentGroup; 867 UINT16 Info; /* MSI number and unit ID */ 868 UINT32 FeatureReporting; 869 870 } ACPI_IVRS_HARDWARE1; 871 872 /* 0x11: I/O Virtualization Hardware Definition Block (IVHD) */ 873 874 typedef struct acpi_ivrs_hardware_11 875 { 876 ACPI_IVRS_HEADER Header; 877 UINT16 CapabilityOffset; /* Offset for IOMMU control fields */ 878 UINT64 BaseAddress; /* IOMMU control registers */ 879 UINT16 PciSegmentGroup; 880 UINT16 Info; /* MSI number and unit ID */ 881 UINT32 Attributes; 882 UINT64 EfrRegisterImage; 883 UINT64 Reserved; 884 } ACPI_IVRS_HARDWARE2; 885 886 /* Masks for Info field above */ 887 888 #define ACPI_IVHD_MSI_NUMBER_MASK 0x001F /* 5 bits, MSI message number */ 889 #define ACPI_IVHD_UNIT_ID_MASK 0x1F00 /* 5 bits, UnitID */ 890 891 892 /* 893 * Device Entries for IVHD subtable, appear after ACPI_IVRS_HARDWARE structure. 894 * Upper two bits of the Type field are the (encoded) length of the structure. 895 * Currently, only 4 and 8 byte entries are defined. 16 and 32 byte entries 896 * are reserved for future use but not defined. 897 */ 898 typedef struct acpi_ivrs_de_header 899 { 900 UINT8 Type; 901 UINT16 Id; 902 UINT8 DataSetting; 903 904 } ACPI_IVRS_DE_HEADER; 905 906 /* Length of device entry is in the top two bits of Type field above */ 907 908 #define ACPI_IVHD_ENTRY_LENGTH 0xC0 909 910 /* Values for device entry Type field above */ 911 912 enum AcpiIvrsDeviceEntryType 913 { 914 /* 4-byte device entries, all use ACPI_IVRS_DEVICE4 */ 915 916 ACPI_IVRS_TYPE_PAD4 = 0, 917 ACPI_IVRS_TYPE_ALL = 1, 918 ACPI_IVRS_TYPE_SELECT = 2, 919 ACPI_IVRS_TYPE_START = 3, 920 ACPI_IVRS_TYPE_END = 4, 921 922 /* 8-byte device entries */ 923 924 ACPI_IVRS_TYPE_PAD8 = 64, 925 ACPI_IVRS_TYPE_NOT_USED = 65, 926 ACPI_IVRS_TYPE_ALIAS_SELECT = 66, /* Uses ACPI_IVRS_DEVICE8A */ 927 ACPI_IVRS_TYPE_ALIAS_START = 67, /* Uses ACPI_IVRS_DEVICE8A */ 928 ACPI_IVRS_TYPE_EXT_SELECT = 70, /* Uses ACPI_IVRS_DEVICE8B */ 929 ACPI_IVRS_TYPE_EXT_START = 71, /* Uses ACPI_IVRS_DEVICE8B */ 930 ACPI_IVRS_TYPE_SPECIAL = 72, /* Uses ACPI_IVRS_DEVICE8C */ 931 932 /* Variable-length device entries */ 933 934 ACPI_IVRS_TYPE_HID = 240 /* Uses ACPI_IVRS_DEVICE_HID */ 935 }; 936 937 /* Values for Data field above */ 938 939 #define ACPI_IVHD_INIT_PASS (1) 940 #define ACPI_IVHD_EINT_PASS (1<<1) 941 #define ACPI_IVHD_NMI_PASS (1<<2) 942 #define ACPI_IVHD_SYSTEM_MGMT (3<<4) 943 #define ACPI_IVHD_LINT0_PASS (1<<6) 944 #define ACPI_IVHD_LINT1_PASS (1<<7) 945 946 947 /* Types 0-4: 4-byte device entry */ 948 949 typedef struct acpi_ivrs_device4 950 { 951 ACPI_IVRS_DE_HEADER Header; 952 953 } ACPI_IVRS_DEVICE4; 954 955 /* Types 66-67: 8-byte device entry */ 956 957 typedef struct acpi_ivrs_device8a 958 { 959 ACPI_IVRS_DE_HEADER Header; 960 UINT8 Reserved1; 961 UINT16 UsedId; 962 UINT8 Reserved2; 963 964 } ACPI_IVRS_DEVICE8A; 965 966 /* Types 70-71: 8-byte device entry */ 967 968 typedef struct acpi_ivrs_device8b 969 { 970 ACPI_IVRS_DE_HEADER Header; 971 UINT32 ExtendedData; 972 973 } ACPI_IVRS_DEVICE8B; 974 975 /* Values for ExtendedData above */ 976 977 #define ACPI_IVHD_ATS_DISABLED (1<<31) 978 979 /* Type 72: 8-byte device entry */ 980 981 typedef struct acpi_ivrs_device8c 982 { 983 ACPI_IVRS_DE_HEADER Header; 984 UINT8 Handle; 985 UINT16 UsedId; 986 UINT8 Variety; 987 988 } ACPI_IVRS_DEVICE8C; 989 990 /* Values for Variety field above */ 991 992 #define ACPI_IVHD_IOAPIC 1 993 #define ACPI_IVHD_HPET 2 994 995 /* Type 240: variable-length device entry */ 996 997 typedef struct acpi_ivrs_device_hid 998 { 999 ACPI_IVRS_DE_HEADER Header; 1000 UINT64 AcpiHid; 1001 UINT64 AcpiCid; 1002 UINT8 UidType; 1003 UINT8 UidLength; 1004 1005 } ACPI_IVRS_DEVICE_HID; 1006 1007 /* Values for UidType above */ 1008 1009 #define ACPI_IVRS_UID_NOT_PRESENT 0 1010 #define ACPI_IVRS_UID_IS_INTEGER 1 1011 #define ACPI_IVRS_UID_IS_STRING 2 1012 1013 /* 0x20, 0x21, 0x22: I/O Virtualization Memory Definition Block (IVMD) */ 1014 1015 typedef struct acpi_ivrs_memory 1016 { 1017 ACPI_IVRS_HEADER Header; 1018 UINT16 AuxData; 1019 UINT64 Reserved; 1020 UINT64 StartAddress; 1021 UINT64 MemoryLength; 1022 1023 } ACPI_IVRS_MEMORY; 1024 1025 1026 /******************************************************************************* 1027 * 1028 * LPIT - Low Power Idle Table 1029 * 1030 * Conforms to "ACPI Low Power Idle Table (LPIT)" July 2014. 1031 * 1032 ******************************************************************************/ 1033 1034 typedef struct acpi_table_lpit 1035 { 1036 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 1037 1038 } ACPI_TABLE_LPIT; 1039 1040 1041 /* LPIT subtable header */ 1042 1043 typedef struct acpi_lpit_header 1044 { 1045 UINT32 Type; /* Subtable type */ 1046 UINT32 Length; /* Subtable length */ 1047 UINT16 UniqueId; 1048 UINT16 Reserved; 1049 UINT32 Flags; 1050 1051 } ACPI_LPIT_HEADER; 1052 1053 /* Values for subtable Type above */ 1054 1055 enum AcpiLpitType 1056 { 1057 ACPI_LPIT_TYPE_NATIVE_CSTATE = 0x00, 1058 ACPI_LPIT_TYPE_RESERVED = 0x01 /* 1 and above are reserved */ 1059 }; 1060 1061 /* Masks for Flags field above */ 1062 1063 #define ACPI_LPIT_STATE_DISABLED (1) 1064 #define ACPI_LPIT_NO_COUNTER (1<<1) 1065 1066 /* 1067 * LPIT subtables, correspond to Type in ACPI_LPIT_HEADER 1068 */ 1069 1070 /* 0x00: Native C-state instruction based LPI structure */ 1071 1072 typedef struct acpi_lpit_native 1073 { 1074 ACPI_LPIT_HEADER Header; 1075 ACPI_GENERIC_ADDRESS EntryTrigger; 1076 UINT32 Residency; 1077 UINT32 Latency; 1078 ACPI_GENERIC_ADDRESS ResidencyCounter; 1079 UINT64 CounterFrequency; 1080 1081 } ACPI_LPIT_NATIVE; 1082 1083 1084 /******************************************************************************* 1085 * 1086 * MADT - Multiple APIC Description Table 1087 * Version 3 1088 * 1089 ******************************************************************************/ 1090 1091 typedef struct acpi_table_madt 1092 { 1093 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 1094 UINT32 Address; /* Physical address of local APIC */ 1095 UINT32 Flags; 1096 1097 } ACPI_TABLE_MADT; 1098 1099 /* Masks for Flags field above */ 1100 1101 #define ACPI_MADT_PCAT_COMPAT (1) /* 00: System also has dual 8259s */ 1102 1103 /* Values for PCATCompat flag */ 1104 1105 #define ACPI_MADT_DUAL_PIC 1 1106 #define ACPI_MADT_MULTIPLE_APIC 0 1107 1108 1109 /* Values for MADT subtable type in ACPI_SUBTABLE_HEADER */ 1110 1111 enum AcpiMadtType 1112 { 1113 ACPI_MADT_TYPE_LOCAL_APIC = 0, 1114 ACPI_MADT_TYPE_IO_APIC = 1, 1115 ACPI_MADT_TYPE_INTERRUPT_OVERRIDE = 2, 1116 ACPI_MADT_TYPE_NMI_SOURCE = 3, 1117 ACPI_MADT_TYPE_LOCAL_APIC_NMI = 4, 1118 ACPI_MADT_TYPE_LOCAL_APIC_OVERRIDE = 5, 1119 ACPI_MADT_TYPE_IO_SAPIC = 6, 1120 ACPI_MADT_TYPE_LOCAL_SAPIC = 7, 1121 ACPI_MADT_TYPE_INTERRUPT_SOURCE = 8, 1122 ACPI_MADT_TYPE_LOCAL_X2APIC = 9, 1123 ACPI_MADT_TYPE_LOCAL_X2APIC_NMI = 10, 1124 ACPI_MADT_TYPE_GENERIC_INTERRUPT = 11, 1125 ACPI_MADT_TYPE_GENERIC_DISTRIBUTOR = 12, 1126 ACPI_MADT_TYPE_GENERIC_MSI_FRAME = 13, 1127 ACPI_MADT_TYPE_GENERIC_REDISTRIBUTOR = 14, 1128 ACPI_MADT_TYPE_GENERIC_TRANSLATOR = 15, 1129 ACPI_MADT_TYPE_MULTIPROC_WAKEUP = 16, 1130 ACPI_MADT_TYPE_CORE_PIC = 17, 1131 ACPI_MADT_TYPE_LIO_PIC = 18, 1132 ACPI_MADT_TYPE_HT_PIC = 19, 1133 ACPI_MADT_TYPE_EIO_PIC = 20, 1134 ACPI_MADT_TYPE_MSI_PIC = 21, 1135 ACPI_MADT_TYPE_BIO_PIC = 22, 1136 ACPI_MADT_TYPE_LPC_PIC = 23, 1137 ACPI_MADT_TYPE_RESERVED = 24, /* 24 to 0x7F are reserved */ 1138 ACPI_MADT_TYPE_OEM_RESERVED = 0x80 /* 0x80 to 0xFF are reserved for OEM use */ 1139 }; 1140 1141 1142 /* 1143 * MADT Subtables, correspond to Type in ACPI_SUBTABLE_HEADER 1144 */ 1145 1146 /* 0: Processor Local APIC */ 1147 1148 typedef struct acpi_madt_local_apic 1149 { 1150 ACPI_SUBTABLE_HEADER Header; 1151 UINT8 ProcessorId; /* ACPI processor id */ 1152 UINT8 Id; /* Processor's local APIC id */ 1153 UINT32 LapicFlags; 1154 1155 } ACPI_MADT_LOCAL_APIC; 1156 1157 1158 /* 1: IO APIC */ 1159 1160 typedef struct acpi_madt_io_apic 1161 { 1162 ACPI_SUBTABLE_HEADER Header; 1163 UINT8 Id; /* I/O APIC ID */ 1164 UINT8 Reserved; /* Reserved - must be zero */ 1165 UINT32 Address; /* APIC physical address */ 1166 UINT32 GlobalIrqBase; /* Global system interrupt where INTI lines start */ 1167 1168 } ACPI_MADT_IO_APIC; 1169 1170 1171 /* 2: Interrupt Override */ 1172 1173 typedef struct acpi_madt_interrupt_override 1174 { 1175 ACPI_SUBTABLE_HEADER Header; 1176 UINT8 Bus; /* 0 - ISA */ 1177 UINT8 SourceIrq; /* Interrupt source (IRQ) */ 1178 UINT32 GlobalIrq; /* Global system interrupt */ 1179 UINT16 IntiFlags; 1180 1181 } ACPI_MADT_INTERRUPT_OVERRIDE; 1182 1183 1184 /* 3: NMI Source */ 1185 1186 typedef struct acpi_madt_nmi_source 1187 { 1188 ACPI_SUBTABLE_HEADER Header; 1189 UINT16 IntiFlags; 1190 UINT32 GlobalIrq; /* Global system interrupt */ 1191 1192 } ACPI_MADT_NMI_SOURCE; 1193 1194 1195 /* 4: Local APIC NMI */ 1196 1197 typedef struct acpi_madt_local_apic_nmi 1198 { 1199 ACPI_SUBTABLE_HEADER Header; 1200 UINT8 ProcessorId; /* ACPI processor id */ 1201 UINT16 IntiFlags; 1202 UINT8 Lint; /* LINTn to which NMI is connected */ 1203 1204 } ACPI_MADT_LOCAL_APIC_NMI; 1205 1206 1207 /* 5: Address Override */ 1208 1209 typedef struct acpi_madt_local_apic_override 1210 { 1211 ACPI_SUBTABLE_HEADER Header; 1212 UINT16 Reserved; /* Reserved, must be zero */ 1213 UINT64 Address; /* APIC physical address */ 1214 1215 } ACPI_MADT_LOCAL_APIC_OVERRIDE; 1216 1217 1218 /* 6: I/O Sapic */ 1219 1220 typedef struct acpi_madt_io_sapic 1221 { 1222 ACPI_SUBTABLE_HEADER Header; 1223 UINT8 Id; /* I/O SAPIC ID */ 1224 UINT8 Reserved; /* Reserved, must be zero */ 1225 UINT32 GlobalIrqBase; /* Global interrupt for SAPIC start */ 1226 UINT64 Address; /* SAPIC physical address */ 1227 1228 } ACPI_MADT_IO_SAPIC; 1229 1230 1231 /* 7: Local Sapic */ 1232 1233 typedef struct acpi_madt_local_sapic 1234 { 1235 ACPI_SUBTABLE_HEADER Header; 1236 UINT8 ProcessorId; /* ACPI processor id */ 1237 UINT8 Id; /* SAPIC ID */ 1238 UINT8 Eid; /* SAPIC EID */ 1239 UINT8 Reserved[3]; /* Reserved, must be zero */ 1240 UINT32 LapicFlags; 1241 UINT32 Uid; /* Numeric UID - ACPI 3.0 */ 1242 char UidString[1]; /* String UID - ACPI 3.0 */ 1243 1244 } ACPI_MADT_LOCAL_SAPIC; 1245 1246 1247 /* 8: Platform Interrupt Source */ 1248 1249 typedef struct acpi_madt_interrupt_source 1250 { 1251 ACPI_SUBTABLE_HEADER Header; 1252 UINT16 IntiFlags; 1253 UINT8 Type; /* 1=PMI, 2=INIT, 3=corrected */ 1254 UINT8 Id; /* Processor ID */ 1255 UINT8 Eid; /* Processor EID */ 1256 UINT8 IoSapicVector; /* Vector value for PMI interrupts */ 1257 UINT32 GlobalIrq; /* Global system interrupt */ 1258 UINT32 Flags; /* Interrupt Source Flags */ 1259 1260 } ACPI_MADT_INTERRUPT_SOURCE; 1261 1262 /* Masks for Flags field above */ 1263 1264 #define ACPI_MADT_CPEI_OVERRIDE (1) 1265 1266 1267 /* 9: Processor Local X2APIC (ACPI 4.0) */ 1268 1269 typedef struct acpi_madt_local_x2apic 1270 { 1271 ACPI_SUBTABLE_HEADER Header; 1272 UINT16 Reserved; /* Reserved - must be zero */ 1273 UINT32 LocalApicId; /* Processor x2APIC ID */ 1274 UINT32 LapicFlags; 1275 UINT32 Uid; /* ACPI processor UID */ 1276 1277 } ACPI_MADT_LOCAL_X2APIC; 1278 1279 1280 /* 10: Local X2APIC NMI (ACPI 4.0) */ 1281 1282 typedef struct acpi_madt_local_x2apic_nmi 1283 { 1284 ACPI_SUBTABLE_HEADER Header; 1285 UINT16 IntiFlags; 1286 UINT32 Uid; /* ACPI processor UID */ 1287 UINT8 Lint; /* LINTn to which NMI is connected */ 1288 UINT8 Reserved[3]; /* Reserved - must be zero */ 1289 1290 } ACPI_MADT_LOCAL_X2APIC_NMI; 1291 1292 1293 /* 11: Generic Interrupt - GICC (ACPI 5.0 + ACPI 6.0 + ACPI 6.3 changes) */ 1294 1295 typedef struct acpi_madt_generic_interrupt 1296 { 1297 ACPI_SUBTABLE_HEADER Header; 1298 UINT16 Reserved; /* Reserved - must be zero */ 1299 UINT32 CpuInterfaceNumber; 1300 UINT32 Uid; 1301 UINT32 Flags; 1302 UINT32 ParkingVersion; 1303 UINT32 PerformanceInterrupt; 1304 UINT64 ParkedAddress; 1305 UINT64 BaseAddress; 1306 UINT64 GicvBaseAddress; 1307 UINT64 GichBaseAddress; 1308 UINT32 VgicInterrupt; 1309 UINT64 GicrBaseAddress; 1310 UINT64 ArmMpidr; 1311 UINT8 EfficiencyClass; 1312 UINT8 Reserved2[1]; 1313 UINT16 SpeInterrupt; /* ACPI 6.3 */ 1314 1315 } ACPI_MADT_GENERIC_INTERRUPT; 1316 1317 /* Masks for Flags field above */ 1318 1319 /* ACPI_MADT_ENABLED (1) Processor is usable if set */ 1320 #define ACPI_MADT_PERFORMANCE_IRQ_MODE (1<<1) /* 01: Performance Interrupt Mode */ 1321 #define ACPI_MADT_VGIC_IRQ_MODE (1<<2) /* 02: VGIC Maintenance Interrupt mode */ 1322 1323 1324 /* 12: Generic Distributor (ACPI 5.0 + ACPI 6.0 changes) */ 1325 1326 typedef struct acpi_madt_generic_distributor 1327 { 1328 ACPI_SUBTABLE_HEADER Header; 1329 UINT16 Reserved; /* Reserved - must be zero */ 1330 UINT32 GicId; 1331 UINT64 BaseAddress; 1332 UINT32 GlobalIrqBase; 1333 UINT8 Version; 1334 UINT8 Reserved2[3]; /* Reserved - must be zero */ 1335 1336 } ACPI_MADT_GENERIC_DISTRIBUTOR; 1337 1338 /* Values for Version field above */ 1339 1340 enum AcpiMadtGicVersion 1341 { 1342 ACPI_MADT_GIC_VERSION_NONE = 0, 1343 ACPI_MADT_GIC_VERSION_V1 = 1, 1344 ACPI_MADT_GIC_VERSION_V2 = 2, 1345 ACPI_MADT_GIC_VERSION_V3 = 3, 1346 ACPI_MADT_GIC_VERSION_V4 = 4, 1347 ACPI_MADT_GIC_VERSION_RESERVED = 5 /* 5 and greater are reserved */ 1348 }; 1349 1350 1351 /* 13: Generic MSI Frame (ACPI 5.1) */ 1352 1353 typedef struct acpi_madt_generic_msi_frame 1354 { 1355 ACPI_SUBTABLE_HEADER Header; 1356 UINT16 Reserved; /* Reserved - must be zero */ 1357 UINT32 MsiFrameId; 1358 UINT64 BaseAddress; 1359 UINT32 Flags; 1360 UINT16 SpiCount; 1361 UINT16 SpiBase; 1362 1363 } ACPI_MADT_GENERIC_MSI_FRAME; 1364 1365 /* Masks for Flags field above */ 1366 1367 #define ACPI_MADT_OVERRIDE_SPI_VALUES (1) 1368 1369 1370 /* 14: Generic Redistributor (ACPI 5.1) */ 1371 1372 typedef struct acpi_madt_generic_redistributor 1373 { 1374 ACPI_SUBTABLE_HEADER Header; 1375 UINT16 Reserved; /* reserved - must be zero */ 1376 UINT64 BaseAddress; 1377 UINT32 Length; 1378 1379 } ACPI_MADT_GENERIC_REDISTRIBUTOR; 1380 1381 1382 /* 15: Generic Translator (ACPI 6.0) */ 1383 1384 typedef struct acpi_madt_generic_translator 1385 { 1386 ACPI_SUBTABLE_HEADER Header; 1387 UINT16 Reserved; /* reserved - must be zero */ 1388 UINT32 TranslationId; 1389 UINT64 BaseAddress; 1390 UINT32 Reserved2; 1391 1392 } ACPI_MADT_GENERIC_TRANSLATOR; 1393 1394 /* 16: Multiprocessor wakeup (ACPI 6.4) */ 1395 1396 typedef struct acpi_madt_multiproc_wakeup 1397 { 1398 ACPI_SUBTABLE_HEADER Header; 1399 UINT16 MailboxVersion; 1400 UINT32 Reserved; /* reserved - must be zero */ 1401 UINT64 BaseAddress; 1402 1403 } ACPI_MADT_MULTIPROC_WAKEUP; 1404 1405 #define ACPI_MULTIPROC_WAKEUP_MB_OS_SIZE 2032 1406 #define ACPI_MULTIPROC_WAKEUP_MB_FIRMWARE_SIZE 2048 1407 1408 typedef struct acpi_madt_multiproc_wakeup_mailbox 1409 { 1410 UINT16 Command; 1411 UINT16 Reserved; /* reserved - must be zero */ 1412 UINT32 ApicId; 1413 UINT64 WakeupVector; 1414 UINT8 ReservedOs[ACPI_MULTIPROC_WAKEUP_MB_OS_SIZE]; /* reserved for OS use */ 1415 UINT8 ReservedFirmware[ACPI_MULTIPROC_WAKEUP_MB_FIRMWARE_SIZE]; /* reserved for firmware use */ 1416 1417 } ACPI_MADT_MULTIPROC_WAKEUP_MAILBOX; 1418 1419 #define ACPI_MP_WAKE_COMMAND_WAKEUP 1 1420 1421 /* 17: CPU Core Interrupt Controller (ACPI 6.5) */ 1422 1423 typedef struct acpi_madt_core_pic { 1424 ACPI_SUBTABLE_HEADER Header; 1425 UINT8 Version; 1426 UINT32 ProcessorId; 1427 UINT32 CoreId; 1428 UINT32 Flags; 1429 } ACPI_MADT_CORE_PIC; 1430 1431 /* Values for Version field above */ 1432 1433 enum AcpiMadtCorePicVersion { 1434 ACPI_MADT_CORE_PIC_VERSION_NONE = 0, 1435 ACPI_MADT_CORE_PIC_VERSION_V1 = 1, 1436 ACPI_MADT_CORE_PIC_VERSION_RESERVED = 2 /* 2 and greater are reserved */ 1437 }; 1438 1439 /* 18: Legacy I/O Interrupt Controller (ACPI 6.5) */ 1440 1441 typedef struct acpi_madt_lio_pic { 1442 ACPI_SUBTABLE_HEADER Header; 1443 UINT8 Version; 1444 UINT64 Address; 1445 UINT16 Size; 1446 UINT8 Cascade[2]; 1447 UINT32 CascadeMap[2]; 1448 } ACPI_MADT_LIO_PIC; 1449 1450 /* Values for Version field above */ 1451 1452 enum AcpiMadtLioPicVersion { 1453 ACPI_MADT_LIO_PIC_VERSION_NONE = 0, 1454 ACPI_MADT_LIO_PIC_VERSION_V1 = 1, 1455 ACPI_MADT_LIO_PIC_VERSION_RESERVED = 2 /* 2 and greater are reserved */ 1456 }; 1457 1458 /* 19: HT Interrupt Controller (ACPI 6.5) */ 1459 1460 typedef struct acpi_madt_ht_pic { 1461 ACPI_SUBTABLE_HEADER Header; 1462 UINT8 Version; 1463 UINT64 Address; 1464 UINT16 Size; 1465 UINT8 Cascade[8]; 1466 } ACPI_MADT_HT_PIC; 1467 1468 /* Values for Version field above */ 1469 1470 enum AcpiMadtHtPicVersion { 1471 ACPI_MADT_HT_PIC_VERSION_NONE = 0, 1472 ACPI_MADT_HT_PIC_VERSION_V1 = 1, 1473 ACPI_MADT_HT_PIC_VERSION_RESERVED = 2 /* 2 and greater are reserved */ 1474 }; 1475 1476 /* 20: Extend I/O Interrupt Controller (ACPI 6.5) */ 1477 1478 typedef struct acpi_madt_eio_pic { 1479 ACPI_SUBTABLE_HEADER Header; 1480 UINT8 Version; 1481 UINT8 Cascade; 1482 UINT8 Node; 1483 UINT64 NodeMap; 1484 } ACPI_MADT_EIO_PIC; 1485 1486 /* Values for Version field above */ 1487 1488 enum AcpiMadtEioPicVersion { 1489 ACPI_MADT_EIO_PIC_VERSION_NONE = 0, 1490 ACPI_MADT_EIO_PIC_VERSION_V1 = 1, 1491 ACPI_MADT_EIO_PIC_VERSION_RESERVED = 2 /* 2 and greater are reserved */ 1492 }; 1493 1494 /* 21: MSI Interrupt Controller (ACPI 6.5) */ 1495 1496 typedef struct acpi_madt_msi_pic { 1497 ACPI_SUBTABLE_HEADER Header; 1498 UINT8 Version; 1499 UINT64 MsgAddress; 1500 UINT32 Start; 1501 UINT32 Count; 1502 } ACPI_MADT_MSI_PIC; 1503 1504 /* Values for Version field above */ 1505 1506 enum AcpiMadtMsiPicVersion { 1507 ACPI_MADT_MSI_PIC_VERSION_NONE = 0, 1508 ACPI_MADT_MSI_PIC_VERSION_V1 = 1, 1509 ACPI_MADT_MSI_PIC_VERSION_RESERVED = 2 /* 2 and greater are reserved */ 1510 }; 1511 1512 /* 22: Bridge I/O Interrupt Controller (ACPI 6.5) */ 1513 1514 typedef struct acpi_madt_bio_pic { 1515 ACPI_SUBTABLE_HEADER Header; 1516 UINT8 Version; 1517 UINT64 Address; 1518 UINT16 Size; 1519 UINT16 Id; 1520 UINT16 GsiBase; 1521 } ACPI_MADT_BIO_PIC; 1522 1523 /* Values for Version field above */ 1524 1525 enum AcpiMadtBioPicVersion { 1526 ACPI_MADT_BIO_PIC_VERSION_NONE = 0, 1527 ACPI_MADT_BIO_PIC_VERSION_V1 = 1, 1528 ACPI_MADT_BIO_PIC_VERSION_RESERVED = 2 /* 2 and greater are reserved */ 1529 }; 1530 1531 /* 23: LPC Interrupt Controller (ACPI 6.5) */ 1532 1533 typedef struct acpi_madt_lpc_pic { 1534 ACPI_SUBTABLE_HEADER Header; 1535 UINT8 Version; 1536 UINT64 Address; 1537 UINT16 Size; 1538 UINT8 Cascade; 1539 } ACPI_MADT_LPC_PIC; 1540 1541 /* Values for Version field above */ 1542 1543 enum AcpiMadtLpcPicVersion { 1544 ACPI_MADT_LPC_PIC_VERSION_NONE = 0, 1545 ACPI_MADT_LPC_PIC_VERSION_V1 = 1, 1546 ACPI_MADT_LPC_PIC_VERSION_RESERVED = 2 /* 2 and greater are reserved */ 1547 }; 1548 1549 /* 80: OEM data */ 1550 1551 typedef struct acpi_madt_oem_data 1552 { 1553 UINT8 OemData[0]; 1554 } ACPI_MADT_OEM_DATA; 1555 1556 1557 /* 1558 * Common flags fields for MADT subtables 1559 */ 1560 1561 /* MADT Local APIC flags */ 1562 1563 #define ACPI_MADT_ENABLED (1) /* 00: Processor is usable if set */ 1564 #define ACPI_MADT_ONLINE_CAPABLE (2) /* 01: System HW supports enabling processor at runtime */ 1565 1566 /* MADT MPS INTI flags (IntiFlags) */ 1567 1568 #define ACPI_MADT_POLARITY_MASK (3) /* 00-01: Polarity of APIC I/O input signals */ 1569 #define ACPI_MADT_TRIGGER_MASK (3<<2) /* 02-03: Trigger mode of APIC input signals */ 1570 1571 /* Values for MPS INTI flags */ 1572 1573 #define ACPI_MADT_POLARITY_CONFORMS 0 1574 #define ACPI_MADT_POLARITY_ACTIVE_HIGH 1 1575 #define ACPI_MADT_POLARITY_RESERVED 2 1576 #define ACPI_MADT_POLARITY_ACTIVE_LOW 3 1577 1578 #define ACPI_MADT_TRIGGER_CONFORMS (0) 1579 #define ACPI_MADT_TRIGGER_EDGE (1<<2) 1580 #define ACPI_MADT_TRIGGER_RESERVED (2<<2) 1581 #define ACPI_MADT_TRIGGER_LEVEL (3<<2) 1582 1583 1584 /******************************************************************************* 1585 * 1586 * MCFG - PCI Memory Mapped Configuration table and subtable 1587 * Version 1 1588 * 1589 * Conforms to "PCI Firmware Specification", Revision 3.0, June 20, 2005 1590 * 1591 ******************************************************************************/ 1592 1593 typedef struct acpi_table_mcfg 1594 { 1595 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 1596 UINT8 Reserved[8]; 1597 1598 } ACPI_TABLE_MCFG; 1599 1600 1601 /* Subtable */ 1602 1603 typedef struct acpi_mcfg_allocation 1604 { 1605 UINT64 Address; /* Base address, processor-relative */ 1606 UINT16 PciSegment; /* PCI segment group number */ 1607 UINT8 StartBusNumber; /* Starting PCI Bus number */ 1608 UINT8 EndBusNumber; /* Final PCI Bus number */ 1609 UINT32 Reserved; 1610 1611 } ACPI_MCFG_ALLOCATION; 1612 1613 1614 /******************************************************************************* 1615 * 1616 * MCHI - Management Controller Host Interface Table 1617 * Version 1 1618 * 1619 * Conforms to "Management Component Transport Protocol (MCTP) Host 1620 * Interface Specification", Revision 1.0.0a, October 13, 2009 1621 * 1622 ******************************************************************************/ 1623 1624 typedef struct acpi_table_mchi 1625 { 1626 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 1627 UINT8 InterfaceType; 1628 UINT8 Protocol; 1629 UINT64 ProtocolData; 1630 UINT8 InterruptType; 1631 UINT8 Gpe; 1632 UINT8 PciDeviceFlag; 1633 UINT32 GlobalInterrupt; 1634 ACPI_GENERIC_ADDRESS ControlRegister; 1635 UINT8 PciSegment; 1636 UINT8 PciBus; 1637 UINT8 PciDevice; 1638 UINT8 PciFunction; 1639 1640 } ACPI_TABLE_MCHI; 1641 1642 1643 /******************************************************************************* 1644 * 1645 * MPST - Memory Power State Table (ACPI 5.0) 1646 * Version 1 1647 * 1648 ******************************************************************************/ 1649 1650 #define ACPI_MPST_CHANNEL_INFO \ 1651 UINT8 ChannelId; \ 1652 UINT8 Reserved1[3]; \ 1653 UINT16 PowerNodeCount; \ 1654 UINT16 Reserved2; 1655 1656 /* Main table */ 1657 1658 typedef struct acpi_table_mpst 1659 { 1660 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 1661 ACPI_MPST_CHANNEL_INFO /* Platform Communication Channel */ 1662 1663 } ACPI_TABLE_MPST; 1664 1665 1666 /* Memory Platform Communication Channel Info */ 1667 1668 typedef struct acpi_mpst_channel 1669 { 1670 ACPI_MPST_CHANNEL_INFO /* Platform Communication Channel */ 1671 1672 } ACPI_MPST_CHANNEL; 1673 1674 1675 /* Memory Power Node Structure */ 1676 1677 typedef struct acpi_mpst_power_node 1678 { 1679 UINT8 Flags; 1680 UINT8 Reserved1; 1681 UINT16 NodeId; 1682 UINT32 Length; 1683 UINT64 RangeAddress; 1684 UINT64 RangeLength; 1685 UINT32 NumPowerStates; 1686 UINT32 NumPhysicalComponents; 1687 1688 } ACPI_MPST_POWER_NODE; 1689 1690 /* Values for Flags field above */ 1691 1692 #define ACPI_MPST_ENABLED 1 1693 #define ACPI_MPST_POWER_MANAGED 2 1694 #define ACPI_MPST_HOT_PLUG_CAPABLE 4 1695 1696 1697 /* Memory Power State Structure (follows POWER_NODE above) */ 1698 1699 typedef struct acpi_mpst_power_state 1700 { 1701 UINT8 PowerState; 1702 UINT8 InfoIndex; 1703 1704 } ACPI_MPST_POWER_STATE; 1705 1706 1707 /* Physical Component ID Structure (follows POWER_STATE above) */ 1708 1709 typedef struct acpi_mpst_component 1710 { 1711 UINT16 ComponentId; 1712 1713 } ACPI_MPST_COMPONENT; 1714 1715 1716 /* Memory Power State Characteristics Structure (follows all POWER_NODEs) */ 1717 1718 typedef struct acpi_mpst_data_hdr 1719 { 1720 UINT16 CharacteristicsCount; 1721 UINT16 Reserved; 1722 1723 } ACPI_MPST_DATA_HDR; 1724 1725 typedef struct acpi_mpst_power_data 1726 { 1727 UINT8 StructureId; 1728 UINT8 Flags; 1729 UINT16 Reserved1; 1730 UINT32 AveragePower; 1731 UINT32 PowerSaving; 1732 UINT64 ExitLatency; 1733 UINT64 Reserved2; 1734 1735 } ACPI_MPST_POWER_DATA; 1736 1737 /* Values for Flags field above */ 1738 1739 #define ACPI_MPST_PRESERVE 1 1740 #define ACPI_MPST_AUTOENTRY 2 1741 #define ACPI_MPST_AUTOEXIT 4 1742 1743 1744 /* Shared Memory Region (not part of an ACPI table) */ 1745 1746 typedef struct acpi_mpst_shared 1747 { 1748 UINT32 Signature; 1749 UINT16 PccCommand; 1750 UINT16 PccStatus; 1751 UINT32 CommandRegister; 1752 UINT32 StatusRegister; 1753 UINT32 PowerStateId; 1754 UINT32 PowerNodeId; 1755 UINT64 EnergyConsumed; 1756 UINT64 AveragePower; 1757 1758 } ACPI_MPST_SHARED; 1759 1760 1761 /******************************************************************************* 1762 * 1763 * MSCT - Maximum System Characteristics Table (ACPI 4.0) 1764 * Version 1 1765 * 1766 ******************************************************************************/ 1767 1768 typedef struct acpi_table_msct 1769 { 1770 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 1771 UINT32 ProximityOffset; /* Location of proximity info struct(s) */ 1772 UINT32 MaxProximityDomains;/* Max number of proximity domains */ 1773 UINT32 MaxClockDomains; /* Max number of clock domains */ 1774 UINT64 MaxAddress; /* Max physical address in system */ 1775 1776 } ACPI_TABLE_MSCT; 1777 1778 1779 /* Subtable - Maximum Proximity Domain Information. Version 1 */ 1780 1781 typedef struct acpi_msct_proximity 1782 { 1783 UINT8 Revision; 1784 UINT8 Length; 1785 UINT32 RangeStart; /* Start of domain range */ 1786 UINT32 RangeEnd; /* End of domain range */ 1787 UINT32 ProcessorCapacity; 1788 UINT64 MemoryCapacity; /* In bytes */ 1789 1790 } ACPI_MSCT_PROXIMITY; 1791 1792 1793 /******************************************************************************* 1794 * 1795 * MSDM - Microsoft Data Management table 1796 * 1797 * Conforms to "Microsoft Software Licensing Tables (SLIC and MSDM)", 1798 * November 29, 2011. Copyright 2011 Microsoft 1799 * 1800 ******************************************************************************/ 1801 1802 /* Basic MSDM table is only the common ACPI header */ 1803 1804 typedef struct acpi_table_msdm 1805 { 1806 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 1807 1808 } ACPI_TABLE_MSDM; 1809 1810 1811 /******************************************************************************* 1812 * 1813 * NFIT - NVDIMM Interface Table (ACPI 6.0+) 1814 * Version 1 1815 * 1816 ******************************************************************************/ 1817 1818 typedef struct acpi_table_nfit 1819 { 1820 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 1821 UINT32 Reserved; /* Reserved, must be zero */ 1822 1823 } ACPI_TABLE_NFIT; 1824 1825 /* Subtable header for NFIT */ 1826 1827 typedef struct acpi_nfit_header 1828 { 1829 UINT16 Type; 1830 UINT16 Length; 1831 1832 } ACPI_NFIT_HEADER; 1833 1834 1835 /* Values for subtable type in ACPI_NFIT_HEADER */ 1836 1837 enum AcpiNfitType 1838 { 1839 ACPI_NFIT_TYPE_SYSTEM_ADDRESS = 0, 1840 ACPI_NFIT_TYPE_MEMORY_MAP = 1, 1841 ACPI_NFIT_TYPE_INTERLEAVE = 2, 1842 ACPI_NFIT_TYPE_SMBIOS = 3, 1843 ACPI_NFIT_TYPE_CONTROL_REGION = 4, 1844 ACPI_NFIT_TYPE_DATA_REGION = 5, 1845 ACPI_NFIT_TYPE_FLUSH_ADDRESS = 6, 1846 ACPI_NFIT_TYPE_CAPABILITIES = 7, 1847 ACPI_NFIT_TYPE_RESERVED = 8 /* 8 and greater are reserved */ 1848 }; 1849 1850 /* 1851 * NFIT Subtables 1852 */ 1853 1854 /* 0: System Physical Address Range Structure */ 1855 1856 typedef struct acpi_nfit_system_address 1857 { 1858 ACPI_NFIT_HEADER Header; 1859 UINT16 RangeIndex; 1860 UINT16 Flags; 1861 UINT32 Reserved; /* Reserved, must be zero */ 1862 UINT32 ProximityDomain; 1863 UINT8 RangeGuid[16]; 1864 UINT64 Address; 1865 UINT64 Length; 1866 UINT64 MemoryMapping; 1867 UINT64 LocationCookie; /* ACPI 6.4 */ 1868 1869 } ACPI_NFIT_SYSTEM_ADDRESS; 1870 1871 /* Flags */ 1872 1873 #define ACPI_NFIT_ADD_ONLINE_ONLY (1) /* 00: Add/Online Operation Only */ 1874 #define ACPI_NFIT_PROXIMITY_VALID (1<<1) /* 01: Proximity Domain Valid */ 1875 #define ACPI_NFIT_LOCATION_COOKIE_VALID (1<<2) /* 02: SPA location cookie valid (ACPI 6.4) */ 1876 1877 /* Range Type GUIDs appear in the include/acuuid.h file */ 1878 1879 1880 /* 1: Memory Device to System Address Range Map Structure */ 1881 1882 typedef struct acpi_nfit_memory_map 1883 { 1884 ACPI_NFIT_HEADER Header; 1885 UINT32 DeviceHandle; 1886 UINT16 PhysicalId; 1887 UINT16 RegionId; 1888 UINT16 RangeIndex; 1889 UINT16 RegionIndex; 1890 UINT64 RegionSize; 1891 UINT64 RegionOffset; 1892 UINT64 Address; 1893 UINT16 InterleaveIndex; 1894 UINT16 InterleaveWays; 1895 UINT16 Flags; 1896 UINT16 Reserved; /* Reserved, must be zero */ 1897 1898 } ACPI_NFIT_MEMORY_MAP; 1899 1900 /* Flags */ 1901 1902 #define ACPI_NFIT_MEM_SAVE_FAILED (1) /* 00: Last SAVE to Memory Device failed */ 1903 #define ACPI_NFIT_MEM_RESTORE_FAILED (1<<1) /* 01: Last RESTORE from Memory Device failed */ 1904 #define ACPI_NFIT_MEM_FLUSH_FAILED (1<<2) /* 02: Platform flush failed */ 1905 #define ACPI_NFIT_MEM_NOT_ARMED (1<<3) /* 03: Memory Device is not armed */ 1906 #define ACPI_NFIT_MEM_HEALTH_OBSERVED (1<<4) /* 04: Memory Device observed SMART/health events */ 1907 #define ACPI_NFIT_MEM_HEALTH_ENABLED (1<<5) /* 05: SMART/health events enabled */ 1908 #define ACPI_NFIT_MEM_MAP_FAILED (1<<6) /* 06: Mapping to SPA failed */ 1909 1910 1911 /* 2: Interleave Structure */ 1912 1913 typedef struct acpi_nfit_interleave 1914 { 1915 ACPI_NFIT_HEADER Header; 1916 UINT16 InterleaveIndex; 1917 UINT16 Reserved; /* Reserved, must be zero */ 1918 UINT32 LineCount; 1919 UINT32 LineSize; 1920 UINT32 LineOffset[1]; /* Variable length */ 1921 1922 } ACPI_NFIT_INTERLEAVE; 1923 1924 1925 /* 3: SMBIOS Management Information Structure */ 1926 1927 typedef struct acpi_nfit_smbios 1928 { 1929 ACPI_NFIT_HEADER Header; 1930 UINT32 Reserved; /* Reserved, must be zero */ 1931 UINT8 Data[1]; /* Variable length */ 1932 1933 } ACPI_NFIT_SMBIOS; 1934 1935 1936 /* 4: NVDIMM Control Region Structure */ 1937 1938 typedef struct acpi_nfit_control_region 1939 { 1940 ACPI_NFIT_HEADER Header; 1941 UINT16 RegionIndex; 1942 UINT16 VendorId; 1943 UINT16 DeviceId; 1944 UINT16 RevisionId; 1945 UINT16 SubsystemVendorId; 1946 UINT16 SubsystemDeviceId; 1947 UINT16 SubsystemRevisionId; 1948 UINT8 ValidFields; 1949 UINT8 ManufacturingLocation; 1950 UINT16 ManufacturingDate; 1951 UINT8 Reserved[2]; /* Reserved, must be zero */ 1952 UINT32 SerialNumber; 1953 UINT16 Code; 1954 UINT16 Windows; 1955 UINT64 WindowSize; 1956 UINT64 CommandOffset; 1957 UINT64 CommandSize; 1958 UINT64 StatusOffset; 1959 UINT64 StatusSize; 1960 UINT16 Flags; 1961 UINT8 Reserved1[6]; /* Reserved, must be zero */ 1962 1963 } ACPI_NFIT_CONTROL_REGION; 1964 1965 /* Flags */ 1966 1967 #define ACPI_NFIT_CONTROL_BUFFERED (1) /* Block Data Windows implementation is buffered */ 1968 1969 /* ValidFields bits */ 1970 1971 #define ACPI_NFIT_CONTROL_MFG_INFO_VALID (1) /* Manufacturing fields are valid */ 1972 1973 1974 /* 5: NVDIMM Block Data Window Region Structure */ 1975 1976 typedef struct acpi_nfit_data_region 1977 { 1978 ACPI_NFIT_HEADER Header; 1979 UINT16 RegionIndex; 1980 UINT16 Windows; 1981 UINT64 Offset; 1982 UINT64 Size; 1983 UINT64 Capacity; 1984 UINT64 StartAddress; 1985 1986 } ACPI_NFIT_DATA_REGION; 1987 1988 1989 /* 6: Flush Hint Address Structure */ 1990 1991 typedef struct acpi_nfit_flush_address 1992 { 1993 ACPI_NFIT_HEADER Header; 1994 UINT32 DeviceHandle; 1995 UINT16 HintCount; 1996 UINT8 Reserved[6]; /* Reserved, must be zero */ 1997 UINT64 HintAddress[1]; /* Variable length */ 1998 1999 } ACPI_NFIT_FLUSH_ADDRESS; 2000 2001 2002 /* 7: Platform Capabilities Structure */ 2003 2004 typedef struct acpi_nfit_capabilities 2005 { 2006 ACPI_NFIT_HEADER Header; 2007 UINT8 HighestCapability; 2008 UINT8 Reserved[3]; /* Reserved, must be zero */ 2009 UINT32 Capabilities; 2010 UINT32 Reserved2; 2011 2012 } ACPI_NFIT_CAPABILITIES; 2013 2014 /* Capabilities Flags */ 2015 2016 #define ACPI_NFIT_CAPABILITY_CACHE_FLUSH (1) /* 00: Cache Flush to NVDIMM capable */ 2017 #define ACPI_NFIT_CAPABILITY_MEM_FLUSH (1<<1) /* 01: Memory Flush to NVDIMM capable */ 2018 #define ACPI_NFIT_CAPABILITY_MEM_MIRRORING (1<<2) /* 02: Memory Mirroring capable */ 2019 2020 2021 /* 2022 * NFIT/DVDIMM device handle support - used as the _ADR for each NVDIMM 2023 */ 2024 typedef struct nfit_device_handle 2025 { 2026 UINT32 Handle; 2027 2028 } NFIT_DEVICE_HANDLE; 2029 2030 /* Device handle construction and extraction macros */ 2031 2032 #define ACPI_NFIT_DIMM_NUMBER_MASK 0x0000000F 2033 #define ACPI_NFIT_CHANNEL_NUMBER_MASK 0x000000F0 2034 #define ACPI_NFIT_MEMORY_ID_MASK 0x00000F00 2035 #define ACPI_NFIT_SOCKET_ID_MASK 0x0000F000 2036 #define ACPI_NFIT_NODE_ID_MASK 0x0FFF0000 2037 2038 #define ACPI_NFIT_DIMM_NUMBER_OFFSET 0 2039 #define ACPI_NFIT_CHANNEL_NUMBER_OFFSET 4 2040 #define ACPI_NFIT_MEMORY_ID_OFFSET 8 2041 #define ACPI_NFIT_SOCKET_ID_OFFSET 12 2042 #define ACPI_NFIT_NODE_ID_OFFSET 16 2043 2044 /* Macro to construct a NFIT/NVDIMM device handle */ 2045 2046 #define ACPI_NFIT_BUILD_DEVICE_HANDLE(dimm, channel, memory, socket, node) \ 2047 ((dimm) | \ 2048 ((channel) << ACPI_NFIT_CHANNEL_NUMBER_OFFSET) | \ 2049 ((memory) << ACPI_NFIT_MEMORY_ID_OFFSET) | \ 2050 ((socket) << ACPI_NFIT_SOCKET_ID_OFFSET) | \ 2051 ((node) << ACPI_NFIT_NODE_ID_OFFSET)) 2052 2053 /* Macros to extract individual fields from a NFIT/NVDIMM device handle */ 2054 2055 #define ACPI_NFIT_GET_DIMM_NUMBER(handle) \ 2056 ((handle) & ACPI_NFIT_DIMM_NUMBER_MASK) 2057 2058 #define ACPI_NFIT_GET_CHANNEL_NUMBER(handle) \ 2059 (((handle) & ACPI_NFIT_CHANNEL_NUMBER_MASK) >> ACPI_NFIT_CHANNEL_NUMBER_OFFSET) 2060 2061 #define ACPI_NFIT_GET_MEMORY_ID(handle) \ 2062 (((handle) & ACPI_NFIT_MEMORY_ID_MASK) >> ACPI_NFIT_MEMORY_ID_OFFSET) 2063 2064 #define ACPI_NFIT_GET_SOCKET_ID(handle) \ 2065 (((handle) & ACPI_NFIT_SOCKET_ID_MASK) >> ACPI_NFIT_SOCKET_ID_OFFSET) 2066 2067 #define ACPI_NFIT_GET_NODE_ID(handle) \ 2068 (((handle) & ACPI_NFIT_NODE_ID_MASK) >> ACPI_NFIT_NODE_ID_OFFSET) 2069 2070 2071 /******************************************************************************* 2072 * 2073 * NHLT - Non HD Audio Link Table 2074 * 2075 * Conforms to: Intel Smart Sound Technology NHLT Specification 2076 * Version 0.8.1, January 2020. 2077 * 2078 ******************************************************************************/ 2079 2080 /* Main table */ 2081 2082 typedef struct acpi_table_nhlt 2083 { 2084 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 2085 UINT8 EndpointCount; 2086 2087 } ACPI_TABLE_NHLT; 2088 2089 typedef struct acpi_table_nhlt_endpoint_count 2090 { 2091 UINT8 EndpointCount; 2092 2093 } ACPI_TABLE_NHLT_ENDPOINT_COUNT; 2094 2095 typedef struct acpi_nhlt_endpoint 2096 { 2097 UINT32 DescriptorLength; 2098 UINT8 LinkType; 2099 UINT8 InstanceId; 2100 UINT16 VendorId; 2101 UINT16 DeviceId; 2102 UINT16 RevisionId; 2103 UINT32 SubsystemId; 2104 UINT8 DeviceType; 2105 UINT8 Direction; 2106 UINT8 VirtualBusId; 2107 2108 } ACPI_NHLT_ENDPOINT; 2109 2110 /* Types for LinkType field above */ 2111 2112 #define ACPI_NHLT_RESERVED_HD_AUDIO 0 2113 #define ACPI_NHLT_RESERVED_DSP 1 2114 #define ACPI_NHLT_PDM 2 2115 #define ACPI_NHLT_SSP 3 2116 #define ACPI_NHLT_RESERVED_SLIMBUS 4 2117 #define ACPI_NHLT_RESERVED_SOUNDWIRE 5 2118 #define ACPI_NHLT_TYPE_RESERVED 6 /* 6 and above are reserved */ 2119 2120 /* All other values above are reserved */ 2121 2122 /* Values for DeviceId field above */ 2123 2124 #define ACPI_NHLT_PDM_DMIC 0xAE20 2125 #define ACPI_NHLT_BT_SIDEBAND 0xAE30 2126 #define ACPI_NHLT_I2S_TDM_CODECS 0xAE23 2127 2128 /* Values for DeviceType field above */ 2129 2130 /* SSP Link */ 2131 2132 #define ACPI_NHLT_LINK_BT_SIDEBAND 0 2133 #define ACPI_NHLT_LINK_FM 1 2134 #define ACPI_NHLT_LINK_MODEM 2 2135 /* 3 is reserved */ 2136 #define ACPI_NHLT_LINK_SSP_ANALOG_CODEC 4 2137 2138 /* PDM Link */ 2139 2140 #define ACPI_NHLT_PDM_ON_CAVS_1P8 0 2141 #define ACPI_NHLT_PDM_ON_CAVS_1P5 1 2142 2143 /* Values for Direction field above */ 2144 2145 #define ACPI_NHLT_DIR_RENDER 0 2146 #define ACPI_NHLT_DIR_CAPTURE 1 2147 #define ACPI_NHLT_DIR_RENDER_LOOPBACK 2 2148 #define ACPI_NHLT_DIR_RENDER_FEEDBACK 3 2149 #define ACPI_NHLT_DIR_RESERVED 4 /* 4 and above are reserved */ 2150 2151 /* Capabilities = 2 */ 2152 2153 typedef struct acpi_nhlt_device_specific_config 2154 { 2155 UINT32 CapabilitiesSize; 2156 UINT8 VirtualSlot; 2157 UINT8 ConfigType; 2158 2159 } ACPI_NHLT_DEVICE_SPECIFIC_CONFIG; 2160 2161 /* Capabilities = 3 */ 2162 2163 typedef struct acpi_nhlt_device_specific_config_a 2164 { 2165 UINT32 CapabilitiesSize; 2166 UINT8 VirtualSlot; 2167 UINT8 ConfigType; 2168 UINT8 ArrayType; 2169 2170 } ACPI_NHLT_DEVICE_SPECIFIC_CONFIG_A; 2171 2172 /* Capabilities = 3 */ 2173 2174 typedef struct acpi_nhlt_device_specific_config_d 2175 { 2176 UINT8 VirtualSlot; 2177 UINT8 ConfigType; 2178 UINT8 ArrayType; 2179 2180 } ACPI_NHLT_DEVICE_SPECIFIC_CONFIG_D; 2181 2182 /* Values for Config Type above */ 2183 2184 #define ACPI_NHLT_CONFIG_TYPE_GENERIC 0x00 2185 #define ACPI_NHLT_CONFIG_TYPE_MIC_ARRAY 0x01 2186 #define ACPI_NHLT_CONFIG_TYPE_RENDER_FEEDBACK 0x03 2187 #define ACPI_NHLT_CONFIG_TYPE_RESERVED 0x04 /* 4 and above are reserved */ 2188 2189 /* Capabilities = 0 */ 2190 2191 typedef struct acpi_nhlt_device_specific_config_b 2192 { 2193 UINT32 CapabilitiesSize; 2194 2195 } ACPI_NHLT_DEVICE_SPECIFIC_CONFIG_B; 2196 2197 /* Capabilities = 1 */ 2198 2199 typedef struct acpi_nhlt_device_specific_config_c 2200 { 2201 UINT32 CapabilitiesSize; 2202 UINT8 VirtualSlot; 2203 2204 } ACPI_NHLT_DEVICE_SPECIFIC_CONFIG_C; 2205 2206 typedef struct acpi_nhlt_render_device_specific_config 2207 { 2208 UINT32 CapabilitiesSize; 2209 UINT8 VirtualSlot; 2210 2211 } ACPI_NHLT_RENDER_DEVICE_SPECIFIC_CONFIG; 2212 2213 typedef struct acpi_nhlt_wave_extensible 2214 { 2215 UINT16 FormatTag; 2216 UINT16 ChannelCount; 2217 UINT32 SamplesPerSec; 2218 UINT32 AvgBytesPerSec; 2219 UINT16 BlockAlign; 2220 UINT16 BitsPerSample; 2221 UINT16 ExtraFormatSize; 2222 UINT16 ValidBitsPerSample; 2223 UINT32 ChannelMask; 2224 UINT8 SubFormatGuid[16]; 2225 2226 } ACPI_NHLT_WAVE_EXTENSIBLE; 2227 2228 /* Values for ChannelMask above */ 2229 2230 #define ACPI_NHLT_SPKR_FRONT_LEFT 0x1 2231 #define ACPI_NHLT_SPKR_FRONT_RIGHT 0x2 2232 #define ACPI_NHLT_SPKR_FRONT_CENTER 0x4 2233 #define ACPI_NHLT_SPKR_LOW_FREQ 0x8 2234 #define ACPI_NHLT_SPKR_BACK_LEFT 0x10 2235 #define ACPI_NHLT_SPKR_BACK_RIGHT 0x20 2236 #define ACPI_NHLT_SPKR_FRONT_LEFT_OF_CENTER 0x40 2237 #define ACPI_NHLT_SPKR_FRONT_RIGHT_OF_CENTER 0x80 2238 #define ACPI_NHLT_SPKR_BACK_CENTER 0x100 2239 #define ACPI_NHLT_SPKR_SIDE_LEFT 0x200 2240 #define ACPI_NHLT_SPKR_SIDE_RIGHT 0x400 2241 #define ACPI_NHLT_SPKR_TOP_CENTER 0x800 2242 #define ACPI_NHLT_SPKR_TOP_FRONT_LEFT 0x1000 2243 #define ACPI_NHLT_SPKR_TOP_FRONT_CENTER 0x2000 2244 #define ACPI_NHLT_SPKR_TOP_FRONT_RIGHT 0x4000 2245 #define ACPI_NHLT_SPKR_TOP_BACK_LEFT 0x8000 2246 #define ACPI_NHLT_SPKR_TOP_BACK_CENTER 0x10000 2247 #define ACPI_NHLT_SPKR_TOP_BACK_RIGHT 0x20000 2248 2249 typedef struct acpi_nhlt_format_config 2250 { 2251 ACPI_NHLT_WAVE_EXTENSIBLE Format; 2252 UINT32 CapabilitySize; 2253 UINT8 Capabilities[]; 2254 2255 } ACPI_NHLT_FORMAT_CONFIG; 2256 2257 typedef struct acpi_nhlt_formats_config 2258 { 2259 UINT8 FormatsCount; 2260 2261 } ACPI_NHLT_FORMATS_CONFIG; 2262 2263 typedef struct acpi_nhlt_device_specific_hdr 2264 { 2265 UINT8 VirtualSlot; 2266 UINT8 ConfigType; 2267 2268 } ACPI_NHLT_DEVICE_SPECIFIC_HDR; 2269 2270 /* Types for ConfigType above */ 2271 2272 #define ACPI_NHLT_GENERIC 0 2273 #define ACPI_NHLT_MIC 1 2274 #define ACPI_NHLT_RENDER 3 2275 2276 typedef struct acpi_nhlt_mic_device_specific_config 2277 { 2278 ACPI_NHLT_DEVICE_SPECIFIC_HDR DeviceConfig; 2279 UINT8 ArrayTypeExt; 2280 2281 } ACPI_NHLT_MIC_DEVICE_SPECIFIC_CONFIG; 2282 2283 /* Values for ArrayTypeExt above */ 2284 2285 #define ACPI_NHLT_ARRAY_TYPE_RESERVED 0x09 /* 9 and below are reserved */ 2286 #define ACPI_NHLT_SMALL_LINEAR_2ELEMENT 0x0A 2287 #define ACPI_NHLT_BIG_LINEAR_2ELEMENT 0x0B 2288 #define ACPI_NHLT_FIRST_GEOMETRY_LINEAR_4ELEMENT 0x0C 2289 #define ACPI_NHLT_PLANAR_LSHAPED_4ELEMENT 0x0D 2290 #define ACPI_NHLT_SECOND_GEOMETRY_LINEAR_4ELEMENT 0x0E 2291 #define ACPI_NHLT_VENDOR_DEFINED 0x0F 2292 #define ACPI_NHLT_ARRAY_TYPE_MASK 0x0F 2293 #define ACPI_NHLT_ARRAY_TYPE_EXT_MASK 0x10 2294 2295 #define ACPI_NHLT_NO_EXTENSION 0x0 2296 #define ACPI_NHLT_MIC_SNR_SENSITIVITY_EXT (1<<4) 2297 2298 typedef struct acpi_nhlt_vendor_mic_count 2299 { 2300 UINT8 MicrophoneCount; 2301 2302 } ACPI_NHLT_VENDOR_MIC_COUNT; 2303 2304 typedef struct acpi_nhlt_vendor_mic_config 2305 { 2306 UINT8 Type; 2307 UINT8 Panel; 2308 UINT16 SpeakerPositionDistance; /* mm */ 2309 UINT16 HorizontalOffset; /* mm */ 2310 UINT16 VerticalOffset; /* mm */ 2311 UINT8 FrequencyLowBand; /* 5*Hz */ 2312 UINT8 FrequencyHighBand; /* 500*Hz */ 2313 UINT16 DirectionAngle; /* -180 - + 180 */ 2314 UINT16 ElevationAngle; /* -180 - + 180 */ 2315 UINT16 WorkVerticalAngleBegin; /* -180 - + 180 with 2 deg step */ 2316 UINT16 WorkVerticalAngleEnd; /* -180 - + 180 with 2 deg step */ 2317 UINT16 WorkHorizontalAngleBegin; /* -180 - + 180 with 2 deg step */ 2318 UINT16 WorkHorizontalAngleEnd; /* -180 - + 180 with 2 deg step */ 2319 2320 } ACPI_NHLT_VENDOR_MIC_CONFIG; 2321 2322 /* Values for Type field above */ 2323 2324 #define ACPI_NHLT_MIC_OMNIDIRECTIONAL 0 2325 #define ACPI_NHLT_MIC_SUBCARDIOID 1 2326 #define ACPI_NHLT_MIC_CARDIOID 2 2327 #define ACPI_NHLT_MIC_SUPER_CARDIOID 3 2328 #define ACPI_NHLT_MIC_HYPER_CARDIOID 4 2329 #define ACPI_NHLT_MIC_8_SHAPED 5 2330 #define ACPI_NHLT_MIC_RESERVED6 6 /* 6 is reserved */ 2331 #define ACPI_NHLT_MIC_VENDOR_DEFINED 7 2332 #define ACPI_NHLT_MIC_RESERVED 8 /* 8 and above are reserved */ 2333 2334 /* Values for Panel field above */ 2335 2336 #define ACPI_NHLT_MIC_POSITION_TOP 0 2337 #define ACPI_NHLT_MIC_POSITION_BOTTOM 1 2338 #define ACPI_NHLT_MIC_POSITION_LEFT 2 2339 #define ACPI_NHLT_MIC_POSITION_RIGHT 3 2340 #define ACPI_NHLT_MIC_POSITION_FRONT 4 2341 #define ACPI_NHLT_MIC_POSITION_BACK 5 2342 #define ACPI_NHLT_MIC_POSITION_RESERVED 6 /* 6 and above are reserved */ 2343 2344 typedef struct acpi_nhlt_vendor_mic_device_specific_config 2345 { 2346 ACPI_NHLT_MIC_DEVICE_SPECIFIC_CONFIG MicArrayDeviceConfig; 2347 UINT8 NumberOfMicrophones; 2348 ACPI_NHLT_VENDOR_MIC_CONFIG MicConfig[]; /* Indexed by NumberOfMicrophones */ 2349 2350 } ACPI_NHLT_VENDOR_MIC_DEVICE_SPECIFIC_CONFIG; 2351 2352 /* Microphone SNR and Sensitivity extension */ 2353 2354 typedef struct acpi_nhlt_mic_snr_sensitivity_extension 2355 { 2356 UINT32 SNR; 2357 UINT32 Sensitivity; 2358 2359 } ACPI_NHLT_MIC_SNR_SENSITIVITY_EXTENSION; 2360 2361 /* Render device with feedback */ 2362 2363 typedef struct acpi_nhlt_render_feedback_device_specific_config 2364 { 2365 UINT8 FeedbackVirtualSlot; /* Render slot in case of capture */ 2366 UINT16 FeedbackChannels; /* Informative only */ 2367 UINT16 FeedbackValidBitsPerSample; 2368 2369 } ACPI_NHLT_RENDER_FEEDBACK_DEVICE_SPECIFIC_CONFIG; 2370 2371 /* Non documented structures */ 2372 2373 typedef struct acpi_nhlt_device_info_count 2374 { 2375 UINT8 StructureCount; 2376 2377 } ACPI_NHLT_DEVICE_INFO_COUNT; 2378 2379 typedef struct acpi_nhlt_device_info 2380 { 2381 UINT8 DeviceId[16]; 2382 UINT8 DeviceInstanceId; 2383 UINT8 DevicePortId; 2384 2385 } ACPI_NHLT_DEVICE_INFO; 2386 2387 2388 /******************************************************************************* 2389 * 2390 * PCCT - Platform Communications Channel Table (ACPI 5.0) 2391 * Version 2 (ACPI 6.2) 2392 * 2393 ******************************************************************************/ 2394 2395 typedef struct acpi_table_pcct 2396 { 2397 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 2398 UINT32 Flags; 2399 UINT64 Reserved; 2400 2401 } ACPI_TABLE_PCCT; 2402 2403 /* Values for Flags field above */ 2404 2405 #define ACPI_PCCT_DOORBELL 1 2406 2407 /* Values for subtable type in ACPI_SUBTABLE_HEADER */ 2408 2409 enum AcpiPcctType 2410 { 2411 ACPI_PCCT_TYPE_GENERIC_SUBSPACE = 0, 2412 ACPI_PCCT_TYPE_HW_REDUCED_SUBSPACE = 1, 2413 ACPI_PCCT_TYPE_HW_REDUCED_SUBSPACE_TYPE2 = 2, /* ACPI 6.1 */ 2414 ACPI_PCCT_TYPE_EXT_PCC_MASTER_SUBSPACE = 3, /* ACPI 6.2 */ 2415 ACPI_PCCT_TYPE_EXT_PCC_SLAVE_SUBSPACE = 4, /* ACPI 6.2 */ 2416 ACPI_PCCT_TYPE_HW_REG_COMM_SUBSPACE = 5, /* ACPI 6.4 */ 2417 ACPI_PCCT_TYPE_RESERVED = 6 /* 6 and greater are reserved */ 2418 }; 2419 2420 /* 2421 * PCCT Subtables, correspond to Type in ACPI_SUBTABLE_HEADER 2422 */ 2423 2424 /* 0: Generic Communications Subspace */ 2425 2426 typedef struct acpi_pcct_subspace 2427 { 2428 ACPI_SUBTABLE_HEADER Header; 2429 UINT8 Reserved[6]; 2430 UINT64 BaseAddress; 2431 UINT64 Length; 2432 ACPI_GENERIC_ADDRESS DoorbellRegister; 2433 UINT64 PreserveMask; 2434 UINT64 WriteMask; 2435 UINT32 Latency; 2436 UINT32 MaxAccessRate; 2437 UINT16 MinTurnaroundTime; 2438 2439 } ACPI_PCCT_SUBSPACE; 2440 2441 2442 /* 1: HW-reduced Communications Subspace (ACPI 5.1) */ 2443 2444 typedef struct acpi_pcct_hw_reduced 2445 { 2446 ACPI_SUBTABLE_HEADER Header; 2447 UINT32 PlatformInterrupt; 2448 UINT8 Flags; 2449 UINT8 Reserved; 2450 UINT64 BaseAddress; 2451 UINT64 Length; 2452 ACPI_GENERIC_ADDRESS DoorbellRegister; 2453 UINT64 PreserveMask; 2454 UINT64 WriteMask; 2455 UINT32 Latency; 2456 UINT32 MaxAccessRate; 2457 UINT16 MinTurnaroundTime; 2458 2459 } ACPI_PCCT_HW_REDUCED; 2460 2461 2462 /* 2: HW-reduced Communications Subspace Type 2 (ACPI 6.1) */ 2463 2464 typedef struct acpi_pcct_hw_reduced_type2 2465 { 2466 ACPI_SUBTABLE_HEADER Header; 2467 UINT32 PlatformInterrupt; 2468 UINT8 Flags; 2469 UINT8 Reserved; 2470 UINT64 BaseAddress; 2471 UINT64 Length; 2472 ACPI_GENERIC_ADDRESS DoorbellRegister; 2473 UINT64 PreserveMask; 2474 UINT64 WriteMask; 2475 UINT32 Latency; 2476 UINT32 MaxAccessRate; 2477 UINT16 MinTurnaroundTime; 2478 ACPI_GENERIC_ADDRESS PlatformAckRegister; 2479 UINT64 AckPreserveMask; 2480 UINT64 AckWriteMask; 2481 2482 } ACPI_PCCT_HW_REDUCED_TYPE2; 2483 2484 2485 /* 3: Extended PCC Master Subspace Type 3 (ACPI 6.2) */ 2486 2487 typedef struct acpi_pcct_ext_pcc_master 2488 { 2489 ACPI_SUBTABLE_HEADER Header; 2490 UINT32 PlatformInterrupt; 2491 UINT8 Flags; 2492 UINT8 Reserved1; 2493 UINT64 BaseAddress; 2494 UINT32 Length; 2495 ACPI_GENERIC_ADDRESS DoorbellRegister; 2496 UINT64 PreserveMask; 2497 UINT64 WriteMask; 2498 UINT32 Latency; 2499 UINT32 MaxAccessRate; 2500 UINT32 MinTurnaroundTime; 2501 ACPI_GENERIC_ADDRESS PlatformAckRegister; 2502 UINT64 AckPreserveMask; 2503 UINT64 AckSetMask; 2504 UINT64 Reserved2; 2505 ACPI_GENERIC_ADDRESS CmdCompleteRegister; 2506 UINT64 CmdCompleteMask; 2507 ACPI_GENERIC_ADDRESS CmdUpdateRegister; 2508 UINT64 CmdUpdatePreserveMask; 2509 UINT64 CmdUpdateSetMask; 2510 ACPI_GENERIC_ADDRESS ErrorStatusRegister; 2511 UINT64 ErrorStatusMask; 2512 2513 } ACPI_PCCT_EXT_PCC_MASTER; 2514 2515 2516 /* 4: Extended PCC Slave Subspace Type 4 (ACPI 6.2) */ 2517 2518 typedef struct acpi_pcct_ext_pcc_slave 2519 { 2520 ACPI_SUBTABLE_HEADER Header; 2521 UINT32 PlatformInterrupt; 2522 UINT8 Flags; 2523 UINT8 Reserved1; 2524 UINT64 BaseAddress; 2525 UINT32 Length; 2526 ACPI_GENERIC_ADDRESS DoorbellRegister; 2527 UINT64 PreserveMask; 2528 UINT64 WriteMask; 2529 UINT32 Latency; 2530 UINT32 MaxAccessRate; 2531 UINT32 MinTurnaroundTime; 2532 ACPI_GENERIC_ADDRESS PlatformAckRegister; 2533 UINT64 AckPreserveMask; 2534 UINT64 AckSetMask; 2535 UINT64 Reserved2; 2536 ACPI_GENERIC_ADDRESS CmdCompleteRegister; 2537 UINT64 CmdCompleteMask; 2538 ACPI_GENERIC_ADDRESS CmdUpdateRegister; 2539 UINT64 CmdUpdatePreserveMask; 2540 UINT64 CmdUpdateSetMask; 2541 ACPI_GENERIC_ADDRESS ErrorStatusRegister; 2542 UINT64 ErrorStatusMask; 2543 2544 } ACPI_PCCT_EXT_PCC_SLAVE; 2545 2546 /* 5: HW Registers based Communications Subspace */ 2547 2548 typedef struct acpi_pcct_hw_reg 2549 { 2550 ACPI_SUBTABLE_HEADER Header; 2551 UINT16 Version; 2552 UINT64 BaseAddress; 2553 UINT64 Length; 2554 ACPI_GENERIC_ADDRESS DoorbellRegister; 2555 UINT64 DoorbellPreserve; 2556 UINT64 DoorbellWrite; 2557 ACPI_GENERIC_ADDRESS CmdCompleteRegister; 2558 UINT64 CmdCompleteMask; 2559 ACPI_GENERIC_ADDRESS ErrorStatusRegister; 2560 UINT64 ErrorStatusMask; 2561 UINT32 NominalLatency; 2562 UINT32 MinTurnaroundTime; 2563 2564 } ACPI_PCCT_HW_REG; 2565 2566 2567 /* Values for doorbell flags above */ 2568 2569 #define ACPI_PCCT_INTERRUPT_POLARITY (1) 2570 #define ACPI_PCCT_INTERRUPT_MODE (1<<1) 2571 2572 2573 /* 2574 * PCC memory structures (not part of the ACPI table) 2575 */ 2576 2577 /* Shared Memory Region */ 2578 2579 typedef struct acpi_pcct_shared_memory 2580 { 2581 UINT32 Signature; 2582 UINT16 Command; 2583 UINT16 Status; 2584 2585 } ACPI_PCCT_SHARED_MEMORY; 2586 2587 2588 /* Extended PCC Subspace Shared Memory Region (ACPI 6.2) */ 2589 2590 typedef struct acpi_pcct_ext_pcc_shared_memory 2591 { 2592 UINT32 Signature; 2593 UINT32 Flags; 2594 UINT32 Length; 2595 UINT32 Command; 2596 2597 } ACPI_PCCT_EXT_PCC_SHARED_MEMORY; 2598 2599 2600 /******************************************************************************* 2601 * 2602 * PDTT - Platform Debug Trigger Table (ACPI 6.2) 2603 * Version 0 2604 * 2605 ******************************************************************************/ 2606 2607 typedef struct acpi_table_pdtt 2608 { 2609 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 2610 UINT8 TriggerCount; 2611 UINT8 Reserved[3]; 2612 UINT32 ArrayOffset; 2613 2614 } ACPI_TABLE_PDTT; 2615 2616 2617 /* 2618 * PDTT Communication Channel Identifier Structure. 2619 * The number of these structures is defined by TriggerCount above, 2620 * starting at ArrayOffset. 2621 */ 2622 typedef struct acpi_pdtt_channel 2623 { 2624 UINT8 SubchannelId; 2625 UINT8 Flags; 2626 2627 } ACPI_PDTT_CHANNEL; 2628 2629 /* Flags for above */ 2630 2631 #define ACPI_PDTT_RUNTIME_TRIGGER (1) 2632 #define ACPI_PDTT_WAIT_COMPLETION (1<<1) 2633 #define ACPI_PDTT_TRIGGER_ORDER (1<<2) 2634 2635 2636 /******************************************************************************* 2637 * 2638 * PHAT - Platform Health Assessment Table (ACPI 6.4) 2639 * Version 1 2640 * 2641 ******************************************************************************/ 2642 2643 typedef struct acpi_table_phat 2644 { 2645 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 2646 2647 } ACPI_TABLE_PHAT; 2648 2649 /* Common header for PHAT subtables that follow main table */ 2650 2651 typedef struct acpi_phat_header 2652 { 2653 UINT16 Type; 2654 UINT16 Length; 2655 UINT8 Revision; 2656 2657 } ACPI_PHAT_HEADER; 2658 2659 2660 /* Values for Type field above */ 2661 2662 #define ACPI_PHAT_TYPE_FW_VERSION_DATA 0 2663 #define ACPI_PHAT_TYPE_FW_HEALTH_DATA 1 2664 #define ACPI_PHAT_TYPE_RESERVED 2 /* 0x02-0xFFFF are reserved */ 2665 2666 /* 2667 * PHAT subtables, correspond to Type in ACPI_PHAT_HEADER 2668 */ 2669 2670 /* 0: Firmware Version Data Record */ 2671 2672 typedef struct acpi_phat_version_data 2673 { 2674 ACPI_PHAT_HEADER Header; 2675 UINT8 Reserved[3]; 2676 UINT32 ElementCount; 2677 2678 } ACPI_PHAT_VERSION_DATA; 2679 2680 typedef struct acpi_phat_version_element 2681 { 2682 UINT8 Guid[16]; 2683 UINT64 VersionValue; 2684 UINT32 ProducerId; 2685 2686 } ACPI_PHAT_VERSION_ELEMENT; 2687 2688 2689 /* 1: Firmware Health Data Record */ 2690 2691 typedef struct acpi_phat_health_data 2692 { 2693 ACPI_PHAT_HEADER Header; 2694 UINT8 Reserved[2]; 2695 UINT8 Health; 2696 UINT8 DeviceGuid[16]; 2697 UINT32 DeviceSpecificOffset; /* Zero if no Device-specific data */ 2698 2699 } ACPI_PHAT_HEALTH_DATA; 2700 2701 /* Values for Health field above */ 2702 2703 #define ACPI_PHAT_ERRORS_FOUND 0 2704 #define ACPI_PHAT_NO_ERRORS 1 2705 #define ACPI_PHAT_UNKNOWN_ERRORS 2 2706 #define ACPI_PHAT_ADVISORY 3 2707 2708 2709 /******************************************************************************* 2710 * 2711 * PMTT - Platform Memory Topology Table (ACPI 5.0) 2712 * Version 1 2713 * 2714 ******************************************************************************/ 2715 2716 typedef struct acpi_table_pmtt 2717 { 2718 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 2719 UINT32 MemoryDeviceCount; 2720 /* 2721 * Immediately followed by: 2722 * MEMORY_DEVICE MemoryDeviceStruct[MemoryDeviceCount]; 2723 */ 2724 2725 } ACPI_TABLE_PMTT; 2726 2727 2728 /* Common header for PMTT subtables that follow main table */ 2729 2730 typedef struct acpi_pmtt_header 2731 { 2732 UINT8 Type; 2733 UINT8 Reserved1; 2734 UINT16 Length; 2735 UINT16 Flags; 2736 UINT16 Reserved2; 2737 UINT32 MemoryDeviceCount; /* Zero means no memory device structs follow */ 2738 /* 2739 * Immediately followed by: 2740 * UINT8 TypeSpecificData[] 2741 * MEMORY_DEVICE MemoryDeviceStruct[MemoryDeviceCount]; 2742 */ 2743 2744 } ACPI_PMTT_HEADER; 2745 2746 /* Values for Type field above */ 2747 2748 #define ACPI_PMTT_TYPE_SOCKET 0 2749 #define ACPI_PMTT_TYPE_CONTROLLER 1 2750 #define ACPI_PMTT_TYPE_DIMM 2 2751 #define ACPI_PMTT_TYPE_RESERVED 3 /* 0x03-0xFE are reserved */ 2752 #define ACPI_PMTT_TYPE_VENDOR 0xFF 2753 2754 /* Values for Flags field above */ 2755 2756 #define ACPI_PMTT_TOP_LEVEL 0x0001 2757 #define ACPI_PMTT_PHYSICAL 0x0002 2758 #define ACPI_PMTT_MEMORY_TYPE 0x000C 2759 2760 2761 /* 2762 * PMTT subtables, correspond to Type in acpi_pmtt_header 2763 */ 2764 2765 2766 /* 0: Socket Structure */ 2767 2768 typedef struct acpi_pmtt_socket 2769 { 2770 ACPI_PMTT_HEADER Header; 2771 UINT16 SocketId; 2772 UINT16 Reserved; 2773 2774 } ACPI_PMTT_SOCKET; 2775 /* 2776 * Immediately followed by: 2777 * MEMORY_DEVICE MemoryDeviceStruct[MemoryDeviceCount]; 2778 */ 2779 2780 2781 /* 1: Memory Controller subtable */ 2782 2783 typedef struct acpi_pmtt_controller 2784 { 2785 ACPI_PMTT_HEADER Header; 2786 UINT16 ControllerId; 2787 UINT16 Reserved; 2788 2789 } ACPI_PMTT_CONTROLLER; 2790 /* 2791 * Immediately followed by: 2792 * MEMORY_DEVICE MemoryDeviceStruct[MemoryDeviceCount]; 2793 */ 2794 2795 2796 /* 2: Physical Component Identifier (DIMM) */ 2797 2798 typedef struct acpi_pmtt_physical_component 2799 { 2800 ACPI_PMTT_HEADER Header; 2801 UINT32 BiosHandle; 2802 2803 } ACPI_PMTT_PHYSICAL_COMPONENT; 2804 2805 2806 /* 0xFF: Vendor Specific Data */ 2807 2808 typedef struct acpi_pmtt_vendor_specific 2809 { 2810 ACPI_PMTT_HEADER Header; 2811 UINT8 TypeUuid[16]; 2812 UINT8 Specific[]; 2813 /* 2814 * Immediately followed by: 2815 * UINT8 VendorSpecificData[]; 2816 * MEMORY_DEVICE MemoryDeviceStruct[MemoryDeviceCount]; 2817 */ 2818 2819 } ACPI_PMTT_VENDOR_SPECIFIC; 2820 2821 2822 /******************************************************************************* 2823 * 2824 * PPTT - Processor Properties Topology Table (ACPI 6.2) 2825 * Version 1 2826 * 2827 ******************************************************************************/ 2828 2829 typedef struct acpi_table_pptt 2830 { 2831 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 2832 2833 } ACPI_TABLE_PPTT; 2834 2835 /* Values for Type field above */ 2836 2837 enum AcpiPpttType 2838 { 2839 ACPI_PPTT_TYPE_PROCESSOR = 0, 2840 ACPI_PPTT_TYPE_CACHE = 1, 2841 ACPI_PPTT_TYPE_ID = 2, 2842 ACPI_PPTT_TYPE_RESERVED = 3 2843 }; 2844 2845 2846 /* 0: Processor Hierarchy Node Structure */ 2847 2848 typedef struct acpi_pptt_processor 2849 { 2850 ACPI_SUBTABLE_HEADER Header; 2851 UINT16 Reserved; 2852 UINT32 Flags; 2853 UINT32 Parent; 2854 UINT32 AcpiProcessorId; 2855 UINT32 NumberOfPrivResources; 2856 2857 } ACPI_PPTT_PROCESSOR; 2858 2859 /* Flags */ 2860 2861 #define ACPI_PPTT_PHYSICAL_PACKAGE (1) 2862 #define ACPI_PPTT_ACPI_PROCESSOR_ID_VALID (1<<1) 2863 #define ACPI_PPTT_ACPI_PROCESSOR_IS_THREAD (1<<2) /* ACPI 6.3 */ 2864 #define ACPI_PPTT_ACPI_LEAF_NODE (1<<3) /* ACPI 6.3 */ 2865 #define ACPI_PPTT_ACPI_IDENTICAL (1<<4) /* ACPI 6.3 */ 2866 2867 2868 /* 1: Cache Type Structure */ 2869 2870 typedef struct acpi_pptt_cache 2871 { 2872 ACPI_SUBTABLE_HEADER Header; 2873 UINT16 Reserved; 2874 UINT32 Flags; 2875 UINT32 NextLevelOfCache; 2876 UINT32 Size; 2877 UINT32 NumberOfSets; 2878 UINT8 Associativity; 2879 UINT8 Attributes; 2880 UINT16 LineSize; 2881 2882 } ACPI_PPTT_CACHE; 2883 2884 /* 1: Cache Type Structure for PPTT version 3 */ 2885 2886 typedef struct acpi_pptt_cache_v1 2887 { 2888 UINT32 CacheId; 2889 2890 } ACPI_PPTT_CACHE_V1; 2891 2892 2893 /* Flags */ 2894 2895 #define ACPI_PPTT_SIZE_PROPERTY_VALID (1) /* Physical property valid */ 2896 #define ACPI_PPTT_NUMBER_OF_SETS_VALID (1<<1) /* Number of sets valid */ 2897 #define ACPI_PPTT_ASSOCIATIVITY_VALID (1<<2) /* Associativity valid */ 2898 #define ACPI_PPTT_ALLOCATION_TYPE_VALID (1<<3) /* Allocation type valid */ 2899 #define ACPI_PPTT_CACHE_TYPE_VALID (1<<4) /* Cache type valid */ 2900 #define ACPI_PPTT_WRITE_POLICY_VALID (1<<5) /* Write policy valid */ 2901 #define ACPI_PPTT_LINE_SIZE_VALID (1<<6) /* Line size valid */ 2902 #define ACPI_PPTT_CACHE_ID_VALID (1<<7) /* Cache ID valid */ 2903 2904 /* Masks for Attributes */ 2905 2906 #define ACPI_PPTT_MASK_ALLOCATION_TYPE (0x03) /* Allocation type */ 2907 #define ACPI_PPTT_MASK_CACHE_TYPE (0x0C) /* Cache type */ 2908 #define ACPI_PPTT_MASK_WRITE_POLICY (0x10) /* Write policy */ 2909 2910 /* Attributes describing cache */ 2911 #define ACPI_PPTT_CACHE_READ_ALLOCATE (0x0) /* Cache line is allocated on read */ 2912 #define ACPI_PPTT_CACHE_WRITE_ALLOCATE (0x01) /* Cache line is allocated on write */ 2913 #define ACPI_PPTT_CACHE_RW_ALLOCATE (0x02) /* Cache line is allocated on read and write */ 2914 #define ACPI_PPTT_CACHE_RW_ALLOCATE_ALT (0x03) /* Alternate representation of above */ 2915 2916 #define ACPI_PPTT_CACHE_TYPE_DATA (0x0) /* Data cache */ 2917 #define ACPI_PPTT_CACHE_TYPE_INSTR (1<<2) /* Instruction cache */ 2918 #define ACPI_PPTT_CACHE_TYPE_UNIFIED (2<<2) /* Unified I & D cache */ 2919 #define ACPI_PPTT_CACHE_TYPE_UNIFIED_ALT (3<<2) /* Alternate representation of above */ 2920 2921 #define ACPI_PPTT_CACHE_POLICY_WB (0x0) /* Cache is write back */ 2922 #define ACPI_PPTT_CACHE_POLICY_WT (1<<4) /* Cache is write through */ 2923 2924 /* 2: ID Structure */ 2925 2926 typedef struct acpi_pptt_id 2927 { 2928 ACPI_SUBTABLE_HEADER Header; 2929 UINT16 Reserved; 2930 UINT32 VendorId; 2931 UINT64 Level1Id; 2932 UINT64 Level2Id; 2933 UINT16 MajorRev; 2934 UINT16 MinorRev; 2935 UINT16 SpinRev; 2936 2937 } ACPI_PPTT_ID; 2938 2939 2940 /******************************************************************************* 2941 * 2942 * PRMT - Platform Runtime Mechanism Table 2943 * Version 1 2944 * 2945 ******************************************************************************/ 2946 2947 typedef struct acpi_table_prmt 2948 { 2949 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 2950 2951 } ACPI_TABLE_PRMT; 2952 2953 typedef struct acpi_table_prmt_header 2954 { 2955 UINT8 PlatformGuid[16]; 2956 UINT32 ModuleInfoOffset; 2957 UINT32 ModuleInfoCount; 2958 2959 } ACPI_TABLE_PRMT_HEADER; 2960 2961 typedef struct acpi_prmt_module_header 2962 { 2963 UINT16 Revision; 2964 UINT16 Length; 2965 2966 } ACPI_PRMT_MODULE_HEADER; 2967 2968 typedef struct acpi_prmt_module_info 2969 { 2970 UINT16 Revision; 2971 UINT16 Length; 2972 UINT8 ModuleGuid[16]; 2973 UINT16 MajorRev; 2974 UINT16 MinorRev; 2975 UINT16 HandlerInfoCount; 2976 UINT32 HandlerInfoOffset; 2977 UINT64 MmioListPointer; 2978 2979 } ACPI_PRMT_MODULE_INFO; 2980 2981 typedef struct acpi_prmt_handler_info 2982 { 2983 UINT16 Revision; 2984 UINT16 Length; 2985 UINT8 HandlerGuid[16]; 2986 UINT64 HandlerAddress; 2987 UINT64 StaticDataBufferAddress; 2988 UINT64 AcpiParamBufferAddress; 2989 2990 } ACPI_PRMT_HANDLER_INFO; 2991 2992 2993 /******************************************************************************* 2994 * 2995 * RASF - RAS Feature Table (ACPI 5.0) 2996 * Version 1 2997 * 2998 ******************************************************************************/ 2999 3000 typedef struct acpi_table_rasf 3001 { 3002 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 3003 UINT8 ChannelId[12]; 3004 3005 } ACPI_TABLE_RASF; 3006 3007 /* RASF Platform Communication Channel Shared Memory Region */ 3008 3009 typedef struct acpi_rasf_shared_memory 3010 { 3011 UINT32 Signature; 3012 UINT16 Command; 3013 UINT16 Status; 3014 UINT16 Version; 3015 UINT8 Capabilities[16]; 3016 UINT8 SetCapabilities[16]; 3017 UINT16 NumParameterBlocks; 3018 UINT32 SetCapabilitiesStatus; 3019 3020 } ACPI_RASF_SHARED_MEMORY; 3021 3022 /* RASF Parameter Block Structure Header */ 3023 3024 typedef struct acpi_rasf_parameter_block 3025 { 3026 UINT16 Type; 3027 UINT16 Version; 3028 UINT16 Length; 3029 3030 } ACPI_RASF_PARAMETER_BLOCK; 3031 3032 /* RASF Parameter Block Structure for PATROL_SCRUB */ 3033 3034 typedef struct acpi_rasf_patrol_scrub_parameter 3035 { 3036 ACPI_RASF_PARAMETER_BLOCK Header; 3037 UINT16 PatrolScrubCommand; 3038 UINT64 RequestedAddressRange[2]; 3039 UINT64 ActualAddressRange[2]; 3040 UINT16 Flags; 3041 UINT8 RequestedSpeed; 3042 3043 } ACPI_RASF_PATROL_SCRUB_PARAMETER; 3044 3045 /* Masks for Flags and Speed fields above */ 3046 3047 #define ACPI_RASF_SCRUBBER_RUNNING 1 3048 #define ACPI_RASF_SPEED (7<<1) 3049 #define ACPI_RASF_SPEED_SLOW (0<<1) 3050 #define ACPI_RASF_SPEED_MEDIUM (4<<1) 3051 #define ACPI_RASF_SPEED_FAST (7<<1) 3052 3053 /* Channel Commands */ 3054 3055 enum AcpiRasfCommands 3056 { 3057 ACPI_RASF_EXECUTE_RASF_COMMAND = 1 3058 }; 3059 3060 /* Platform RAS Capabilities */ 3061 3062 enum AcpiRasfCapabiliities 3063 { 3064 ACPI_HW_PATROL_SCRUB_SUPPORTED = 0, 3065 ACPI_SW_PATROL_SCRUB_EXPOSED = 1 3066 }; 3067 3068 /* Patrol Scrub Commands */ 3069 3070 enum AcpiRasfPatrolScrubCommands 3071 { 3072 ACPI_RASF_GET_PATROL_PARAMETERS = 1, 3073 ACPI_RASF_START_PATROL_SCRUBBER = 2, 3074 ACPI_RASF_STOP_PATROL_SCRUBBER = 3 3075 }; 3076 3077 /* Channel Command flags */ 3078 3079 #define ACPI_RASF_GENERATE_SCI (1<<15) 3080 3081 /* Status values */ 3082 3083 enum AcpiRasfStatus 3084 { 3085 ACPI_RASF_SUCCESS = 0, 3086 ACPI_RASF_NOT_VALID = 1, 3087 ACPI_RASF_NOT_SUPPORTED = 2, 3088 ACPI_RASF_BUSY = 3, 3089 ACPI_RASF_FAILED = 4, 3090 ACPI_RASF_ABORTED = 5, 3091 ACPI_RASF_INVALID_DATA = 6 3092 }; 3093 3094 /* Status flags */ 3095 3096 #define ACPI_RASF_COMMAND_COMPLETE (1) 3097 #define ACPI_RASF_SCI_DOORBELL (1<<1) 3098 #define ACPI_RASF_ERROR (1<<2) 3099 #define ACPI_RASF_STATUS (0x1F<<3) 3100 3101 3102 /******************************************************************************* 3103 * 3104 * RGRT - Regulatory Graphics Resource Table 3105 * Version 1 3106 * 3107 * Conforms to "ACPI RGRT" available at: 3108 * https://microsoft.github.io/mu/dyn/mu_plus/MsCorePkg/AcpiRGRT/feature_acpi_rgrt/ 3109 * 3110 ******************************************************************************/ 3111 3112 typedef struct acpi_table_rgrt 3113 { 3114 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 3115 UINT16 Version; 3116 UINT8 ImageType; 3117 UINT8 Reserved; 3118 UINT8 Image[]; 3119 3120 } ACPI_TABLE_RGRT; 3121 3122 /* ImageType values */ 3123 3124 enum AcpiRgrtImageType 3125 { 3126 ACPI_RGRT_TYPE_RESERVED0 = 0, 3127 ACPI_RGRT_IMAGE_TYPE_PNG = 1, 3128 ACPI_RGRT_TYPE_RESERVED = 2 /* 2 and greater are reserved */ 3129 }; 3130 3131 3132 /******************************************************************************* 3133 * 3134 * SBST - Smart Battery Specification Table 3135 * Version 1 3136 * 3137 ******************************************************************************/ 3138 3139 typedef struct acpi_table_sbst 3140 { 3141 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 3142 UINT32 WarningLevel; 3143 UINT32 LowLevel; 3144 UINT32 CriticalLevel; 3145 3146 } ACPI_TABLE_SBST; 3147 3148 3149 /******************************************************************************* 3150 * 3151 * SDEI - Software Delegated Exception Interface Descriptor Table 3152 * 3153 * Conforms to "Software Delegated Exception Interface (SDEI)" ARM DEN0054A, 3154 * May 8th, 2017. Copyright 2017 ARM Ltd. 3155 * 3156 ******************************************************************************/ 3157 3158 typedef struct acpi_table_sdei 3159 { 3160 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 3161 3162 } ACPI_TABLE_SDEI; 3163 3164 3165 /******************************************************************************* 3166 * 3167 * SDEV - Secure Devices Table (ACPI 6.2) 3168 * Version 1 3169 * 3170 ******************************************************************************/ 3171 3172 typedef struct acpi_table_sdev 3173 { 3174 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 3175 3176 } ACPI_TABLE_SDEV; 3177 3178 3179 typedef struct acpi_sdev_header 3180 { 3181 UINT8 Type; 3182 UINT8 Flags; 3183 UINT16 Length; 3184 3185 } ACPI_SDEV_HEADER; 3186 3187 3188 /* Values for subtable type above */ 3189 3190 enum AcpiSdevType 3191 { 3192 ACPI_SDEV_TYPE_NAMESPACE_DEVICE = 0, 3193 ACPI_SDEV_TYPE_PCIE_ENDPOINT_DEVICE = 1, 3194 ACPI_SDEV_TYPE_RESERVED = 2 /* 2 and greater are reserved */ 3195 }; 3196 3197 /* Values for flags above */ 3198 3199 #define ACPI_SDEV_HANDOFF_TO_UNSECURE_OS (1) 3200 #define ACPI_SDEV_SECURE_COMPONENTS_PRESENT (1<<1) 3201 3202 /* 3203 * SDEV subtables 3204 */ 3205 3206 /* 0: Namespace Device Based Secure Device Structure */ 3207 3208 typedef struct acpi_sdev_namespace 3209 { 3210 ACPI_SDEV_HEADER Header; 3211 UINT16 DeviceIdOffset; 3212 UINT16 DeviceIdLength; 3213 UINT16 VendorDataOffset; 3214 UINT16 VendorDataLength; 3215 3216 } ACPI_SDEV_NAMESPACE; 3217 3218 typedef struct acpi_sdev_secure_component 3219 { 3220 UINT16 SecureComponentOffset; 3221 UINT16 SecureComponentLength; 3222 3223 } ACPI_SDEV_SECURE_COMPONENT; 3224 3225 3226 /* 3227 * SDEV sub-subtables ("Components") for above 3228 */ 3229 typedef struct acpi_sdev_component 3230 { 3231 ACPI_SDEV_HEADER Header; 3232 3233 } ACPI_SDEV_COMPONENT; 3234 3235 3236 /* Values for sub-subtable type above */ 3237 3238 enum AcpiSacType 3239 { 3240 ACPI_SDEV_TYPE_ID_COMPONENT = 0, 3241 ACPI_SDEV_TYPE_MEM_COMPONENT = 1 3242 }; 3243 3244 typedef struct acpi_sdev_id_component 3245 { 3246 ACPI_SDEV_HEADER Header; 3247 UINT16 HardwareIdOffset; 3248 UINT16 HardwareIdLength; 3249 UINT16 SubsystemIdOffset; 3250 UINT16 SubsystemIdLength; 3251 UINT16 HardwareRevision; 3252 UINT8 HardwareRevPresent; 3253 UINT8 ClassCodePresent; 3254 UINT8 PciBaseClass; 3255 UINT8 PciSubClass; 3256 UINT8 PciProgrammingXface; 3257 3258 } ACPI_SDEV_ID_COMPONENT; 3259 3260 typedef struct acpi_sdev_mem_component 3261 { 3262 ACPI_SDEV_HEADER Header; 3263 UINT32 Reserved; 3264 UINT64 MemoryBaseAddress; 3265 UINT64 MemoryLength; 3266 3267 } ACPI_SDEV_MEM_COMPONENT; 3268 3269 3270 /* 1: PCIe Endpoint Device Based Device Structure */ 3271 3272 typedef struct acpi_sdev_pcie 3273 { 3274 ACPI_SDEV_HEADER Header; 3275 UINT16 Segment; 3276 UINT16 StartBus; 3277 UINT16 PathOffset; 3278 UINT16 PathLength; 3279 UINT16 VendorDataOffset; 3280 UINT16 VendorDataLength; 3281 3282 } ACPI_SDEV_PCIE; 3283 3284 /* 1a: PCIe Endpoint path entry */ 3285 3286 typedef struct acpi_sdev_pcie_path 3287 { 3288 UINT8 Device; 3289 UINT8 Function; 3290 3291 } ACPI_SDEV_PCIE_PATH; 3292 3293 3294 /******************************************************************************* 3295 * 3296 * SVKL - Storage Volume Key Location Table (ACPI 6.4) 3297 * From: "Guest-Host-Communication Interface (GHCI) for Intel 3298 * Trust Domain Extensions (Intel TDX)". 3299 * Version 1 3300 * 3301 ******************************************************************************/ 3302 3303 typedef struct acpi_table_svkl 3304 { 3305 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 3306 UINT32 Count; 3307 3308 } ACPI_TABLE_SVKL; 3309 3310 typedef struct acpi_svkl_key 3311 { 3312 UINT16 Type; 3313 UINT16 Format; 3314 UINT32 Size; 3315 UINT64 Address; 3316 3317 } ACPI_SVKL_KEY; 3318 3319 enum acpi_svkl_type 3320 { 3321 ACPI_SVKL_TYPE_MAIN_STORAGE = 0, 3322 ACPI_SVKL_TYPE_RESERVED = 1 /* 1 and greater are reserved */ 3323 }; 3324 3325 enum acpi_svkl_format 3326 { 3327 ACPI_SVKL_FORMAT_RAW_BINARY = 0, 3328 ACPI_SVKL_FORMAT_RESERVED = 1 /* 1 and greater are reserved */ 3329 }; 3330 3331 3332 /******************************************************************************* 3333 * 3334 * TDEL - TD-Event Log 3335 * From: "Guest-Host-Communication Interface (GHCI) for Intel 3336 * Trust Domain Extensions (Intel TDX)". 3337 * September 2020 3338 * 3339 ******************************************************************************/ 3340 3341 typedef struct acpi_table_tdel 3342 { 3343 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 3344 UINT32 Reserved; 3345 UINT64 LogAreaMinimumLength; 3346 UINT64 LogAreaStartAddress; 3347 3348 } ACPI_TABLE_TDEL; 3349 3350 /* Reset to default packing */ 3351 3352 #pragma pack() 3353 3354 #endif /* __ACTBL2_H__ */

Cache object: 95d406be1f5b4c9b5573c1461db52c9a

FreeBSD/Linux Kernel Cross Reference sys/contrib/dev/acpica/include/actbl2.h

FreeBSD/Linux Kernel Cross Reference
sys/contrib/dev/acpica/include/actbl2.h