1 /* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
2 /*
3 * Copyright (C) 2018-2022 Intel Corporation
4 */
5 #ifndef __iwl_fw_dbg_tlv_h__
6 #define __iwl_fw_dbg_tlv_h__
7
8 #include <linux/bitops.h>
9
10 #define IWL_FW_INI_MAX_REGION_ID 64
11 #define IWL_FW_INI_MAX_NAME 32
12 #define IWL_FW_INI_MAX_CFG_NAME 64
13 #define IWL_FW_INI_DOMAIN_ALWAYS_ON 0
14 #define IWL_FW_INI_REGION_ID_MASK GENMASK(15, 0)
15 #define IWL_FW_INI_REGION_DUMP_POLICY_MASK GENMASK(31, 16)
16
17 /**
18 * struct iwl_fw_ini_hcmd
19 *
20 * @id: the debug configuration command type for instance: 0xf6 / 0xf5 / DHC
21 * @group: the desired cmd group
22 * @reserved: to align to FW struct
23 * @data: all of the relevant command data to be sent
24 */
25 struct iwl_fw_ini_hcmd {
26 u8 id;
27 u8 group;
28 __le16 reserved;
29 u8 data[0];
30 } __packed; /* FW_DEBUG_TLV_HCMD_DATA_API_S_VER_1 */
31
32 /**
33 * struct iwl_fw_ini_header - Common Header for all ini debug TLV's structures
34 *
35 * @version: TLV version
36 * @domain: domain of the TLV. One of &enum iwl_fw_ini_dbg_domain
37 */
38 struct iwl_fw_ini_header {
39 __le32 version;
40 __le32 domain;
41 /* followed by the data */
42 } __packed; /* FW_TLV_DEBUG_HEADER_S_VER_1 */
43
44 /**
45 * struct iwl_fw_ini_region_dev_addr - Configuration to read device addresses
46 *
47 * @size: size of each memory chunk
48 * @offset: offset to add to the base address of each chunk
49 */
50 struct iwl_fw_ini_region_dev_addr {
51 __le32 size;
52 __le32 offset;
53 } __packed; /* FW_TLV_DEBUG_DEVICE_ADDR_API_S_VER_1 */
54
55 /**
56 * struct iwl_fw_ini_region_fifos - Configuration to read Tx/Rx fifos
57 *
58 * @fid: fifos ids array. Used to determine what fifos to collect
59 * @hdr_only: if non zero, collect only the registers
60 * @offset: offset to add to the registers addresses
61 */
62 struct iwl_fw_ini_region_fifos {
63 __le32 fid[2];
64 __le32 hdr_only;
65 __le32 offset;
66 } __packed; /* FW_TLV_DEBUG_REGION_FIFOS_API_S_VER_1 */
67
68 /**
69 * struct iwl_fw_ini_region_err_table - error table region data
70 *
71 * Configuration to read Umac/Lmac error table
72 *
73 * @version: version of the error table
74 * @base_addr: base address of the error table
75 * @size: size of the error table
76 * @offset: offset to add to &base_addr
77 */
78 struct iwl_fw_ini_region_err_table {
79 __le32 version;
80 __le32 base_addr;
81 __le32 size;
82 __le32 offset;
83 } __packed; /* FW_TLV_DEBUG_REGION_ERROR_TABLE_API_S_VER_1 */
84
85 /**
86 * struct iwl_fw_ini_region_special_device_memory - special device memory
87 *
88 * Configuration to read a special memory
89 *
90 * @type: type of the special memory
91 * @version: version of the special memory
92 * @base_addr: base address of the error table
93 * @size: size of the error table
94 * @offset: offset to add to &base_addr
95 */
96 struct iwl_fw_ini_region_special_device_memory {
97 __le16 type;
98 __le16 version;
99 __le32 base_addr;
100 __le32 size;
101 __le32 offset;
102 } __packed; /* FW_TLV_DEBUG_REGION_SPECIAL_DEVICE_ADDR_API_S_VER_1 */
103
104 /**
105 * struct iwl_fw_ini_region_internal_buffer - internal buffer region data
106 *
107 * Configuration to read internal monitor buffer
108 *
109 * @alloc_id: allocation id one of &enum iwl_fw_ini_allocation_id
110 * @base_addr: internal buffer base address
111 * @size: size internal buffer size
112 */
113 struct iwl_fw_ini_region_internal_buffer {
114 __le32 alloc_id;
115 __le32 base_addr;
116 __le32 size;
117 } __packed; /* FW_TLV_DEBUG_REGION_INTERNAL_BUFFER_API_S_VER_1 */
118
119 /**
120 * struct iwl_fw_ini_region_tlv - region TLV
121 *
122 * Configures parameters for region data collection
123 *
124 * @hdr: debug header
125 * @id: region id. Max id is &IWL_FW_INI_MAX_REGION_ID
126 * @type: region type. One of &enum iwl_fw_ini_region_type
127 * @sub_type: region sub type
128 * @sub_type_ver: region sub type version
129 * @reserved: not in use
130 * @name: region name
131 * @dev_addr: device address configuration. Used by
132 * &IWL_FW_INI_REGION_DEVICE_MEMORY, &IWL_FW_INI_REGION_PERIPHERY_MAC,
133 * &IWL_FW_INI_REGION_PERIPHERY_PHY, &IWL_FW_INI_REGION_PERIPHERY_AUX,
134 * &IWL_FW_INI_REGION_PAGING, &IWL_FW_INI_REGION_CSR,
135 * &IWL_FW_INI_REGION_DRAM_IMR and &IWL_FW_INI_REGION_PCI_IOSF_CONFIG
136 * &IWL_FW_INI_REGION_DBGI_SRAM, &FW_TLV_DEBUG_REGION_TYPE_DBGI_SRAM,
137 * @fifos: fifos configuration. Used by &IWL_FW_INI_REGION_TXF and
138 * &IWL_FW_INI_REGION_RXF
139 * @err_table: error table configuration. Used by
140 * IWL_FW_INI_REGION_LMAC_ERROR_TABLE and
141 * IWL_FW_INI_REGION_UMAC_ERROR_TABLE
142 * @internal_buffer: internal monitor buffer configuration. Used by
143 * &IWL_FW_INI_REGION_INTERNAL_BUFFER
144 * @dram_alloc_id: dram allocation id. One of &enum iwl_fw_ini_allocation_id.
145 * Used by &IWL_FW_INI_REGION_DRAM_BUFFER
146 * @tlv_mask: tlv collection mask. Used by &IWL_FW_INI_REGION_TLV
147 * @addrs: array of addresses attached to the end of the region tlv
148 */
149 struct iwl_fw_ini_region_tlv {
150 struct iwl_fw_ini_header hdr;
151 __le32 id;
152 u8 type;
153 u8 sub_type;
154 u8 sub_type_ver;
155 u8 reserved;
156 u8 name[IWL_FW_INI_MAX_NAME];
157 union {
158 struct iwl_fw_ini_region_dev_addr dev_addr;
159 struct iwl_fw_ini_region_fifos fifos;
160 struct iwl_fw_ini_region_err_table err_table;
161 struct iwl_fw_ini_region_internal_buffer internal_buffer;
162 struct iwl_fw_ini_region_special_device_memory special_mem;
163 __le32 dram_alloc_id;
164 __le32 tlv_mask;
165 }; /* FW_TLV_DEBUG_REGION_CONF_PARAMS_API_U_VER_1 */
166 __le32 addrs[];
167 } __packed; /* FW_TLV_DEBUG_REGION_API_S_VER_1 */
168
169 /**
170 * struct iwl_fw_ini_debug_info_tlv
171 *
172 * debug configuration name for a specific image
173 *
174 * @hdr: debug header
175 * @image_type: image type
176 * @debug_cfg_name: debug configuration name
177 */
178 struct iwl_fw_ini_debug_info_tlv {
179 struct iwl_fw_ini_header hdr;
180 __le32 image_type;
181 u8 debug_cfg_name[IWL_FW_INI_MAX_CFG_NAME];
182 } __packed; /* FW_TLV_DEBUG_INFO_API_S_VER_1 */
183
184 /**
185 * struct iwl_fw_ini_allocation_tlv - Allocates DRAM buffers
186 *
187 * @hdr: debug header
188 * @alloc_id: allocation id. One of &enum iwl_fw_ini_allocation_id
189 * @buf_location: buffer location. One of &enum iwl_fw_ini_buffer_location
190 * @req_size: requested buffer size
191 * @max_frags_num: maximum number of fragments
192 * @min_size: minimum buffer size
193 */
194 struct iwl_fw_ini_allocation_tlv {
195 struct iwl_fw_ini_header hdr;
196 __le32 alloc_id;
197 __le32 buf_location;
198 __le32 req_size;
199 __le32 max_frags_num;
200 __le32 min_size;
201 } __packed; /* FW_TLV_DEBUG_BUFFER_ALLOCATION_API_S_VER_1 */
202
203 /**
204 * struct iwl_fw_ini_trigger_tlv - trigger TLV
205 *
206 * Trigger that upon firing, determines what regions to collect
207 *
208 * @hdr: debug header
209 * @time_point: time point. One of &enum iwl_fw_ini_time_point
210 * @trigger_reason: trigger reason
211 * @apply_policy: uses &enum iwl_fw_ini_trigger_apply_policy
212 * @dump_delay: delay from trigger fire to dump, in usec
213 * @occurrences: max trigger fire occurrences allowed
214 * @reserved: unused
215 * @ignore_consec: ignore consecutive triggers, in usec
216 * @reset_fw: if non zero, will reset and reload the FW
217 * @multi_dut: initiate debug dump data on several DUTs
218 * @regions_mask: mask of regions to collect
219 * @data: trigger data
220 */
221 struct iwl_fw_ini_trigger_tlv {
222 struct iwl_fw_ini_header hdr;
223 __le32 time_point;
224 __le32 trigger_reason;
225 __le32 apply_policy;
226 __le32 dump_delay;
227 __le32 occurrences;
228 __le32 reserved;
229 __le32 ignore_consec;
230 __le32 reset_fw;
231 __le32 multi_dut;
232 __le64 regions_mask;
233 __le32 data[];
234 } __packed; /* FW_TLV_DEBUG_TRIGGER_API_S_VER_1 */
235
236 /**
237 * struct iwl_fw_ini_hcmd_tlv - Generic Host command pass through TLV
238 *
239 * @hdr: debug header
240 * @time_point: time point. One of &enum iwl_fw_ini_time_point
241 * @period_msec: interval at which the hcmd will be sent to the FW.
242 * Measured in msec (0 = one time command)
243 * @hcmd: a variable length host-command to be sent to apply the configuration
244 */
245 struct iwl_fw_ini_hcmd_tlv {
246 struct iwl_fw_ini_header hdr;
247 __le32 time_point;
248 __le32 period_msec;
249 struct iwl_fw_ini_hcmd hcmd;
250 } __packed; /* FW_TLV_DEBUG_HCMD_API_S_VER_1 */
251
252 /**
253 * struct iwl_fw_ini_addr_val - Address and value to set it to
254 *
255 * @address: the base address
256 * @value: value to set at address
257 */
258 struct iwl_fw_ini_addr_val {
259 __le32 address;
260 __le32 value;
261 } __packed; /* FW_TLV_DEBUG_ADDR_VALUE_VER_1 */
262
263 /**
264 * struct iwl_fw_ini_conf_tlv - configuration TLV to set register/memory.
265 *
266 * @hdr: debug header
267 * @time_point: time point to apply config. One of &enum iwl_fw_ini_time_point
268 * @set_type: write access type preset token for time point.
269 * one of &enum iwl_fw_ini_config_set_type
270 * @addr_offset: the offset to add to any item in address[0] field
271 * @addr_val: address value pair
272 */
273 struct iwl_fw_ini_conf_set_tlv {
274 struct iwl_fw_ini_header hdr;
275 __le32 time_point;
276 __le32 set_type;
277 __le32 addr_offset;
278 struct iwl_fw_ini_addr_val addr_val[0];
279 } __packed; /* FW_TLV_DEBUG_CONFIG_SET_API_S_VER_1 */
280
281 /**
282 * enum iwl_fw_ini_config_set_type
283 *
284 * @IWL_FW_INI_CONFIG_SET_TYPE_INVALID: invalid config set
285 * @IWL_FW_INI_CONFIG_SET_TYPE_DEVICE_PERIPHERY_MAC: for PERIPHERY MAC configuration
286 * @IWL_FW_INI_CONFIG_SET_TYPE_DEVICE_PERIPHERY_PHY: for PERIPHERY PHY configuration
287 * @IWL_FW_INI_CONFIG_SET_TYPE_DEVICE_PERIPHERY_AUX: for PERIPHERY AUX configuration
288 * @IWL_FW_INI_CONFIG_SET_TYPE_DEVICE_MEMORY: for DEVICE MEMORY configuration
289 * @IWL_FW_INI_CONFIG_SET_TYPE_CSR: for CSR configuration
290 * @IWL_FW_INI_CONFIG_SET_TYPE_DBGC_DRAM_ADDR: for DBGC_DRAM_ADDR configuration
291 * @IWL_FW_INI_CONFIG_SET_TYPE_PERIPH_SCRATCH_HWM: for PERIPH SCRATCH HWM configuration
292 * @IWL_FW_INI_ALLOCATION_NUM: max number of configuration supported
293 */
294
295 enum iwl_fw_ini_config_set_type {
296 IWL_FW_INI_CONFIG_SET_TYPE_INVALID = 0,
297 IWL_FW_INI_CONFIG_SET_TYPE_DEVICE_PERIPHERY_MAC,
298 IWL_FW_INI_CONFIG_SET_TYPE_DEVICE_PERIPHERY_PHY,
299 IWL_FW_INI_CONFIG_SET_TYPE_DEVICE_PERIPHERY_AUX,
300 IWL_FW_INI_CONFIG_SET_TYPE_DEVICE_MEMORY,
301 IWL_FW_INI_CONFIG_SET_TYPE_CSR,
302 IWL_FW_INI_CONFIG_SET_TYPE_DBGC_DRAM_ADDR,
303 IWL_FW_INI_CONFIG_SET_TYPE_PERIPH_SCRATCH_HWM,
304 IWL_FW_INI_CONFIG_SET_TYPE_MAX_NUM,
305 } __packed;
306
307 /**
308 * enum iwl_fw_ini_allocation_id
309 *
310 * @IWL_FW_INI_ALLOCATION_INVALID: invalid
311 * @IWL_FW_INI_ALLOCATION_ID_DBGC1: allocation meant for DBGC1 configuration
312 * @IWL_FW_INI_ALLOCATION_ID_DBGC2: allocation meant for DBGC2 configuration
313 * @IWL_FW_INI_ALLOCATION_ID_DBGC3: allocation meant for DBGC3 configuration
314 * @IWL_FW_INI_ALLOCATION_ID_DBGC4: allocation meant for DBGC4 configuration
315 * @IWL_FW_INI_ALLOCATION_NUM: number of allocation ids
316 */
317 enum iwl_fw_ini_allocation_id {
318 IWL_FW_INI_ALLOCATION_INVALID,
319 IWL_FW_INI_ALLOCATION_ID_DBGC1,
320 IWL_FW_INI_ALLOCATION_ID_DBGC2,
321 IWL_FW_INI_ALLOCATION_ID_DBGC3,
322 IWL_FW_INI_ALLOCATION_ID_DBGC4,
323 IWL_FW_INI_ALLOCATION_NUM,
324 }; /* FW_DEBUG_TLV_ALLOCATION_ID_E_VER_1 */
325
326 /**
327 * enum iwl_fw_ini_buffer_location
328 *
329 * @IWL_FW_INI_LOCATION_INVALID: invalid
330 * @IWL_FW_INI_LOCATION_SRAM_PATH: SRAM location
331 * @IWL_FW_INI_LOCATION_DRAM_PATH: DRAM location
332 * @IWL_FW_INI_LOCATION_NPK_PATH: NPK location
333 */
334 enum iwl_fw_ini_buffer_location {
335 IWL_FW_INI_LOCATION_INVALID,
336 IWL_FW_INI_LOCATION_SRAM_PATH,
337 IWL_FW_INI_LOCATION_DRAM_PATH,
338 IWL_FW_INI_LOCATION_NPK_PATH,
339 IWL_FW_INI_LOCATION_NUM,
340 }; /* FW_DEBUG_TLV_BUFFER_LOCATION_E_VER_1 */
341
342 /**
343 * enum iwl_fw_ini_region_type
344 *
345 * @IWL_FW_INI_REGION_INVALID: invalid
346 * @IWL_FW_INI_REGION_TLV: uCode and debug TLVs
347 * @IWL_FW_INI_REGION_INTERNAL_BUFFER: monitor SMEM buffer
348 * @IWL_FW_INI_REGION_DRAM_BUFFER: monitor DRAM buffer
349 * @IWL_FW_INI_REGION_TXF: TX fifos
350 * @IWL_FW_INI_REGION_RXF: RX fifo
351 * @IWL_FW_INI_REGION_LMAC_ERROR_TABLE: lmac error table
352 * @IWL_FW_INI_REGION_UMAC_ERROR_TABLE: umac error table
353 * @IWL_FW_INI_REGION_RSP_OR_NOTIF: FW response or notification data
354 * @IWL_FW_INI_REGION_DEVICE_MEMORY: device internal memory
355 * @IWL_FW_INI_REGION_PERIPHERY_MAC: periphery registers of MAC
356 * @IWL_FW_INI_REGION_PERIPHERY_PHY: periphery registers of PHY
357 * @IWL_FW_INI_REGION_PERIPHERY_AUX: periphery registers of AUX
358 * @IWL_FW_INI_REGION_PAGING: paging memory
359 * @IWL_FW_INI_REGION_CSR: CSR registers
360 * @IWL_FW_INI_REGION_DRAM_IMR: IMR memory
361 * @IWL_FW_INI_REGION_PCI_IOSF_CONFIG: PCI/IOSF config
362 * @IWL_FW_INI_REGION_SPECIAL_DEVICE_MEMORY: special device memory
363 * @IWL_FW_INI_REGION_DBGI_SRAM: periphery registers of DBGI SRAM
364 * @IWL_FW_INI_REGION_NUM: number of region types
365 */
366 enum iwl_fw_ini_region_type {
367 IWL_FW_INI_REGION_INVALID,
368 IWL_FW_INI_REGION_TLV,
369 IWL_FW_INI_REGION_INTERNAL_BUFFER,
370 IWL_FW_INI_REGION_DRAM_BUFFER,
371 IWL_FW_INI_REGION_TXF,
372 IWL_FW_INI_REGION_RXF,
373 IWL_FW_INI_REGION_LMAC_ERROR_TABLE,
374 IWL_FW_INI_REGION_UMAC_ERROR_TABLE,
375 IWL_FW_INI_REGION_RSP_OR_NOTIF,
376 IWL_FW_INI_REGION_DEVICE_MEMORY,
377 IWL_FW_INI_REGION_PERIPHERY_MAC,
378 IWL_FW_INI_REGION_PERIPHERY_PHY,
379 IWL_FW_INI_REGION_PERIPHERY_AUX,
380 IWL_FW_INI_REGION_PAGING,
381 IWL_FW_INI_REGION_CSR,
382 IWL_FW_INI_REGION_DRAM_IMR,
383 IWL_FW_INI_REGION_PCI_IOSF_CONFIG,
384 IWL_FW_INI_REGION_SPECIAL_DEVICE_MEMORY,
385 IWL_FW_INI_REGION_DBGI_SRAM,
386 IWL_FW_INI_REGION_NUM
387 }; /* FW_TLV_DEBUG_REGION_TYPE_API_E */
388
389 enum iwl_fw_ini_region_device_memory_subtype {
390 IWL_FW_INI_REGION_DEVICE_MEMORY_SUBTYPE_HW_SMEM = 1,
391 IWL_FW_INI_REGION_DEVICE_MEMORY_SUBTYPE_UMAC_ERROR_TABLE = 5,
392 IWL_FW_INI_REGION_DEVICE_MEMORY_SUBTYPE_LMAC_1_ERROR_TABLE = 7,
393 IWL_FW_INI_REGION_DEVICE_MEMORY_SUBTYPE_LMAC_2_ERROR_TABLE = 10,
394 IWL_FW_INI_REGION_DEVICE_MEMORY_SUBTYPE_TCM_1_ERROR_TABLE = 14,
395 IWL_FW_INI_REGION_DEVICE_MEMORY_SUBTYPE_TCM_2_ERROR_TABLE = 16,
396 IWL_FW_INI_REGION_DEVICE_MEMORY_SUBTYPE_RCM_1_ERROR_TABLE = 18,
397 IWL_FW_INI_REGION_DEVICE_MEMORY_SUBTYPE_RCM_2_ERROR_TABLE = 20,
398 }; /* FW_TLV_DEBUG_REGION_DEVICE_MEMORY_SUBTYPE_API_E */
399
400 /**
401 * enum iwl_fw_ini_time_point
402 *
403 * Hard coded time points in which the driver can send hcmd or perform dump
404 * collection
405 *
406 * @IWL_FW_INI_TIME_POINT_EARLY: pre loading the FW
407 * @IWL_FW_INI_TIME_POINT_AFTER_ALIVE: first cmd from host after alive notif
408 * @IWL_FW_INI_TIME_POINT_POST_INIT: last cmd in series of init sequence
409 * @IWL_FW_INI_TIME_POINT_FW_ASSERT: FW assert
410 * @IWL_FW_INI_TIME_POINT_FW_HW_ERROR: FW HW error
411 * @IWL_FW_INI_TIME_POINT_FW_TFD_Q_HANG: TFD queue hang
412 * @IWL_FW_INI_TIME_POINT_FW_DHC_NOTIFICATION: DHC cmd response and notif
413 * @IWL_FW_INI_TIME_POINT_FW_RSP_OR_NOTIF: FW response or notification.
414 * data field holds id and group
415 * @IWL_FW_INI_TIME_POINT_USER_TRIGGER: user trigger time point
416 * @IWL_FW_INI_TIME_POINT_PERIODIC: periodic timepoint that fires in constant
417 * intervals. data field holds the interval time in msec
418 * @IWL_FW_INI_TIME_POINT_RESERVED: reserved
419 * @IWL_FW_INI_TIME_POINT_HOST_ASSERT: Unused
420 * @IWL_FW_INI_TIME_POINT_HOST_ALIVE_TIMEOUT: alive timeout
421 * @IWL_FW_INI_TIME_POINT_HOST_DEVICE_ENABLE: device enable
422 * @IWL_FW_INI_TIME_POINT_HOST_DEVICE_DISABLE: device disable
423 * @IWL_FW_INI_TIME_POINT_HOST_D3_START: D3 start
424 * @IWL_FW_INI_TIME_POINT_HOST_D3_END: D3 end
425 * @IWL_FW_INI_TIME_POINT_MISSED_BEACONS: missed beacons
426 * @IWL_FW_INI_TIME_POINT_ASSOC_FAILED: association failure
427 * @IWL_FW_INI_TIME_POINT_TX_FAILED: Tx frame failed
428 * @IWL_FW_INI_TIME_POINT_TX_WFD_ACTION_FRAME_FAILED: wifi direct action
429 * frame failed
430 * @IWL_FW_INI_TIME_POINT_TX_LATENCY_THRESHOLD: Tx latency threshold
431 * @IWL_FW_INI_TIME_POINT_HANG_OCCURRED: hang occurred
432 * @IWL_FW_INI_TIME_POINT_EAPOL_FAILED: EAPOL failed
433 * @IWL_FW_INI_TIME_POINT_FAKE_TX: fake Tx
434 * @IWL_FW_INI_TIME_POINT_DEASSOC: de association
435 * @IWL_FW_INI_TIME_POINT_NUM: number of time points
436 */
437 enum iwl_fw_ini_time_point {
438 IWL_FW_INI_TIME_POINT_INVALID,
439 IWL_FW_INI_TIME_POINT_EARLY,
440 IWL_FW_INI_TIME_POINT_AFTER_ALIVE,
441 IWL_FW_INI_TIME_POINT_POST_INIT,
442 IWL_FW_INI_TIME_POINT_FW_ASSERT,
443 IWL_FW_INI_TIME_POINT_FW_HW_ERROR,
444 IWL_FW_INI_TIME_POINT_FW_TFD_Q_HANG,
445 IWL_FW_INI_TIME_POINT_FW_DHC_NOTIFICATION,
446 IWL_FW_INI_TIME_POINT_FW_RSP_OR_NOTIF,
447 IWL_FW_INI_TIME_POINT_USER_TRIGGER,
448 IWL_FW_INI_TIME_POINT_PERIODIC,
449 IWL_FW_INI_TIME_POINT_RESERVED,
450 IWL_FW_INI_TIME_POINT_HOST_ASSERT,
451 IWL_FW_INI_TIME_POINT_HOST_ALIVE_TIMEOUT,
452 IWL_FW_INI_TIME_POINT_HOST_DEVICE_ENABLE,
453 IWL_FW_INI_TIME_POINT_HOST_DEVICE_DISABLE,
454 IWL_FW_INI_TIME_POINT_HOST_D3_START,
455 IWL_FW_INI_TIME_POINT_HOST_D3_END,
456 IWL_FW_INI_TIME_POINT_MISSED_BEACONS,
457 IWL_FW_INI_TIME_POINT_ASSOC_FAILED,
458 IWL_FW_INI_TIME_POINT_TX_FAILED,
459 IWL_FW_INI_TIME_POINT_TX_WFD_ACTION_FRAME_FAILED,
460 IWL_FW_INI_TIME_POINT_TX_LATENCY_THRESHOLD,
461 IWL_FW_INI_TIME_POINT_HANG_OCCURRED,
462 IWL_FW_INI_TIME_POINT_EAPOL_FAILED,
463 IWL_FW_INI_TIME_POINT_FAKE_TX,
464 IWL_FW_INI_TIME_POINT_DEASSOC,
465 IWL_FW_INI_TIME_POINT_NUM,
466 }; /* FW_TLV_DEBUG_TIME_POINT_API_E */
467
468 /**
469 * enum iwl_fw_ini_trigger_apply_policy - Determines how to apply triggers
470 *
471 * @IWL_FW_INI_APPLY_POLICY_MATCH_TIME_POINT: match by time point
472 * @IWL_FW_INI_APPLY_POLICY_MATCH_DATA: match by trigger data
473 * @IWL_FW_INI_APPLY_POLICY_OVERRIDE_REGIONS: override regions mask.
474 * Append otherwise
475 * @IWL_FW_INI_APPLY_POLICY_OVERRIDE_CFG: override trigger configuration
476 * @IWL_FW_INI_APPLY_POLICY_OVERRIDE_DATA: override trigger data.
477 * Append otherwise
478 * @IWL_FW_INI_APPLY_POLICY_DUMP_COMPLETE_CMD: send cmd once dump collected
479 */
480 enum iwl_fw_ini_trigger_apply_policy {
481 IWL_FW_INI_APPLY_POLICY_MATCH_TIME_POINT = BIT(0),
482 IWL_FW_INI_APPLY_POLICY_MATCH_DATA = BIT(1),
483 IWL_FW_INI_APPLY_POLICY_OVERRIDE_REGIONS = BIT(8),
484 IWL_FW_INI_APPLY_POLICY_OVERRIDE_CFG = BIT(9),
485 IWL_FW_INI_APPLY_POLICY_OVERRIDE_DATA = BIT(10),
486 IWL_FW_INI_APPLY_POLICY_DUMP_COMPLETE_CMD = BIT(16),
487 };
488
489 /**
490 * enum iwl_fw_ini_trigger_reset_fw_policy - Determines how to handle reset
491 *
492 * @IWL_FW_INI_RESET_FW_MODE_NOTHING: do not stop FW and reload (default)
493 * @IWL_FW_INI_RESET_FW_MODE_STOP_FW_ONLY: stop FW without reload FW
494 * @IWL_FW_INI_RESET_FW_MODE_STOP_AND_RELOAD_FW: stop FW with reload FW
495 */
496 enum iwl_fw_ini_trigger_reset_fw_policy {
497 IWL_FW_INI_RESET_FW_MODE_NOTHING = 0,
498 IWL_FW_INI_RESET_FW_MODE_STOP_FW_ONLY,
499 IWL_FW_INI_RESET_FW_MODE_STOP_AND_RELOAD_FW
500 };
501
502 /**
503 * enum iwl_fw_ini_dump_policy - Determines how to handle dump based on enabled flags
504 *
505 * @IWL_FW_INI_DEBUG_DUMP_POLICY_NO_LIMIT: OS has no limit of dump size
506 * @IWL_FW_INI_DEBUG_DUMP_POLICY_MAX_LIMIT_600KB: mini dump only 600KB region dump
507 * @IWL_FW_IWL_DEBUG_DUMP_POLICY_MAX_LIMIT_5MB: mini dump 5MB size dump
508 */
509 enum iwl_fw_ini_dump_policy {
510 IWL_FW_INI_DEBUG_DUMP_POLICY_NO_LIMIT = BIT(0),
511 IWL_FW_INI_DEBUG_DUMP_POLICY_MAX_LIMIT_600KB = BIT(1),
512 IWL_FW_IWL_DEBUG_DUMP_POLICY_MAX_LIMIT_5MB = BIT(2),
513
514 };
515
516 /**
517 * enum iwl_fw_ini_dump_type - Determines dump type based on size defined by FW.
518 *
519 * @IWL_FW_INI_DUMP_BRIEF : only dump the most important regions
520 * @IWL_FW_INI_DEBUG_MEDIUM: dump more regions than "brief", but not all regions
521 * @IWL_FW_INI_DUMP_VERBOSE : dump all regions
522 */
523 enum iwl_fw_ini_dump_type {
524 IWL_FW_INI_DUMP_BRIEF,
525 IWL_FW_INI_DUMP_MEDIUM,
526 IWL_FW_INI_DUMP_VERBOSE,
527 };
528 #endif
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