arm,coresight-tmc.yaml

Version: - FREEBSD - FREEBSD-13-STABLE - FREEBSD-13-0 - FREEBSD-12-STABLE - FREEBSD-12-0 - FREEBSD-11-STABLE - FREEBSD-11-0 - FREEBSD-10-STABLE - FREEBSD-10-0 - FREEBSD-9-STABLE - FREEBSD-9-0 - FREEBSD-8-STABLE - FREEBSD-8-0 - FREEBSD-7-STABLE - FREEBSD-7-0 - FREEBSD-6-STABLE - FREEBSD-6-0 - FREEBSD-5-STABLE - FREEBSD-5-0 - FREEBSD-4-STABLE - FREEBSD-3-STABLE - FREEBSD22 - l41 - OPENBSD - linux-2.6 - MK84 - PLAN9 - xnu-8792
SearchContext: - none - 3 - 10

    1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
    2 %YAML 1.2
    3 ---
    4 $id: http://devicetree.org/schemas/arm/arm,coresight-tmc.yaml#
    5 $schema: http://devicetree.org/meta-schemas/core.yaml#
    6 
    7 title: Arm CoreSight Trace Memory Controller
    8 
    9 maintainers:
   10   - Mathieu Poirier <mathieu.poirier@linaro.org>
   11   - Mike Leach <mike.leach@linaro.org>
   12   - Leo Yan <leo.yan@linaro.org>
   13   - Suzuki K Poulose <suzuki.poulose@arm.com>
   14 
   15 description: |
   16   CoreSight components are compliant with the ARM CoreSight architecture
   17   specification and can be connected in various topologies to suit a particular
   18   SoCs tracing needs. These trace components can generally be classified as
   19   sinks, links and sources. Trace data produced by one or more sources flows
   20   through the intermediate links connecting the source to the currently selected
   21   sink.
   22 
   23   Trace Memory Controller is used for Embedded Trace Buffer(ETB), Embedded Trace
   24   FIFO(ETF) and Embedded Trace Router(ETR) configurations. The configuration
   25   mode (ETB, ETF, ETR) is discovered at boot time when the device is probed.
   26 
   27 # Need a custom select here or 'arm,primecell' will match on lots of nodes
   28 select:
   29   properties:
   30     compatible:
   31       contains:
   32         const: arm,coresight-tmc
   33   required:
   34     - compatible
   35 
   36 allOf:
   37   - $ref: /schemas/arm/primecell.yaml#
   38 
   39 properties:
   40   compatible:
   41     items:
   42       - const: arm,coresight-tmc
   43       - const: arm,primecell
   44 
   45   reg:
   46     maxItems: 1
   47 
   48   clocks:
   49     minItems: 1
   50     maxItems: 2
   51 
   52   clock-names:
   53     minItems: 1
   54     items:
   55       - const: apb_pclk
   56       - const: atclk
   57 
   58   arm,buffer-size:
   59     $ref: /schemas/types.yaml#/definitions/uint32
   60     deprecated: true
   61     description:
   62       Size of contiguous buffer space for TMC ETR (embedded trace router). The
   63       buffer size can be configured dynamically via buffer_size property in
   64       sysfs instead.
   65 
   66   arm,scatter-gather:
   67     type: boolean
   68     description:
   69       Indicates that the TMC-ETR can safely use the SG mode on this system.
   70 
   71   arm,max-burst-size:
   72     description:
   73       The maximum burst size initiated by TMC on the AXI master interface. The
   74       burst size can be in the range [0..15], the setting supports one data
   75       transfer per burst up to a maximum of 16 data transfers per burst.
   76     $ref: /schemas/types.yaml#/definitions/uint32
   77     maximum: 15
   78 
   79   in-ports:
   80     $ref: /schemas/graph.yaml#/properties/ports
   81     additionalProperties: false
   82 
   83     properties:
   84       port:
   85         description: Input connection from the CoreSight Trace bus.
   86         $ref: /schemas/graph.yaml#/properties/port
   87 
   88   out-ports:
   89     $ref: /schemas/graph.yaml#/properties/ports
   90     additionalProperties: false
   91 
   92     properties:
   93       port:
   94         description: AXI or ATB Master output connection. Used for ETR
   95           and ETF configurations.
   96         $ref: /schemas/graph.yaml#/properties/port
   97 
   98 required:
   99   - compatible
  100   - reg
  101   - clocks
  102   - clock-names
  103   - in-ports
  104 
  105 unevaluatedProperties: false
  106 
  107 examples:
  108   - |
  109     etr@20070000 {
  110         compatible = "arm,coresight-tmc", "arm,primecell";
  111         reg = <0x20070000 0x1000>;
  112 
  113         clocks = <&oscclk6a>;
  114         clock-names = "apb_pclk";
  115         in-ports {
  116             port {
  117                 etr_in_port: endpoint {
  118                     remote-endpoint = <&replicator2_out_port0>;
  119                 };
  120             };
  121         };
  122 
  123         out-ports {
  124             port {
  125                 etr_out_port: endpoint {
  126                     remote-endpoint = <&catu_in_port>;
  127                 };
  128             };
  129         };
  130     };
  131 ...

Cache object: fbcaadcf7cb92488cad6ab16b39a2515

[ source navigation ] [ diff markup ] [ identifier search ] [ freetext search ] [ file search ] [ list types ] [ track identifier ]

This page is part of the FreeBSD/Linux Linux Kernel Cross-Reference, and was automatically generated using a modified version of the LXR engine.

FreeBSD/Linux Kernel Cross Reference sys/contrib/device-tree/Bindings/arm/arm,coresight-tmc.yaml

FreeBSD/Linux Kernel Cross Reference
sys/contrib/device-tree/Bindings/arm/arm,coresight-tmc.yaml