The Design and Implementation of the FreeBSD Operating System, Second Edition
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FreeBSD/Linux Kernel Cross Reference
sys/contrib/device-tree/Bindings/arm/arm,scmi.txt

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    1 System Control and Management Interface (SCMI) Message Protocol
    2 ----------------------------------------------------------
    3 
    4 The SCMI is intended to allow agents such as OSPM to manage various functions
    5 that are provided by the hardware platform it is running on, including power
    6 and performance functions.
    7 
    8 This binding is intended to define the interface the firmware implementing
    9 the SCMI as described in ARM document number ARM DEN 0056A ("ARM System Control
   10 and Management Interface Platform Design Document")[0] provide for OSPM in
   11 the device tree.
   12 
   13 Required properties:
   14 
   15 The scmi node with the following properties shall be under the /firmware/ node.
   16 
   17 - compatible : shall be "arm,scmi" or "arm,scmi-smc" for smc/hvc transports
   18 - mboxes: List of phandle and mailbox channel specifiers. It should contain
   19           exactly one or two mailboxes, one for transmitting messages("tx")
   20           and another optional for receiving the notifications("rx") if
   21           supported.
   22 - shmem : List of phandle pointing to the shared memory(SHM) area as per
   23           generic mailbox client binding.
   24 - #address-cells : should be '1' if the device has sub-nodes, maps to
   25           protocol identifier for a given sub-node.
   26 - #size-cells : should be '0' as 'reg' property doesn't have any size
   27           associated with it.
   28 - arm,smc-id : SMC id required when using smc or hvc transports
   29 
   30 Optional properties:
   31 
   32 - mbox-names: shall be "tx" or "rx" depending on mboxes entries.
   33 
   34 - interrupts : when using smc or hvc transports, this optional
   35          property indicates that msg completion by the platform is indicated
   36          by an interrupt rather than by the return of the smc call. This
   37          should not be used except when the platform requires such behavior.
   38 
   39 - interrupt-names : if "interrupts" is present, interrupt-names must also
   40          be present and have the value "a2p".
   41 
   42 See Documentation/devicetree/bindings/mailbox/mailbox.txt for more details
   43 about the generic mailbox controller and client driver bindings.
   44 
   45 The mailbox is the only permitted method of calling the SCMI firmware.
   46 Mailbox doorbell is used as a mechanism to alert the presence of a
   47 messages and/or notification.
   48 
   49 Each protocol supported shall have a sub-node with corresponding compatible
   50 as described in the following sections. If the platform supports dedicated
   51 communication channel for a particular protocol, the 3 properties namely:
   52 mboxes, mbox-names and shmem shall be present in the sub-node corresponding
   53 to that protocol.
   54 
   55 Clock/Performance bindings for the clocks/OPPs based on SCMI Message Protocol
   56 ------------------------------------------------------------
   57 
   58 This binding uses the common clock binding[1].
   59 
   60 Required properties:
   61 - #clock-cells : Should be 1. Contains the Clock ID value used by SCMI commands.
   62 
   63 Power domain bindings for the power domains based on SCMI Message Protocol
   64 ------------------------------------------------------------
   65 
   66 This binding for the SCMI power domain providers uses the generic power
   67 domain binding[2].
   68 
   69 Required properties:
   70  - #power-domain-cells : Should be 1. Contains the device or the power
   71                          domain ID value used by SCMI commands.
   72 
   73 Regulator bindings for the SCMI Regulator based on SCMI Message Protocol
   74 ------------------------------------------------------------
   75 An SCMI Regulator is permanently bound to a well defined SCMI Voltage Domain,
   76 and should be always positioned as a root regulator.
   77 It does not support any current operation.
   78 
   79 SCMI Regulators are grouped under a 'regulators' node which in turn is a child
   80 of the SCMI Voltage protocol node inside the desired SCMI instance node.
   81 
   82 This binding uses the common regulator binding[6].
   83 
   84 Required properties:
   85  - reg : shall identify an existent SCMI Voltage Domain.
   86 
   87 Sensor bindings for the sensors based on SCMI Message Protocol
   88 --------------------------------------------------------------
   89 SCMI provides an API to access the various sensors on the SoC.
   90 
   91 Required properties:
   92 - #thermal-sensor-cells: should be set to 1. This property follows the
   93                          thermal device tree bindings[3].
   94 
   95                          Valid cell values are raw identifiers (Sensor ID)
   96                          as used by the firmware. Refer to  platform details
   97                          for your implementation for the IDs to use.
   98 
   99 Reset signal bindings for the reset domains based on SCMI Message Protocol
  100 ------------------------------------------------------------
  101 
  102 This binding for the SCMI reset domain providers uses the generic reset
  103 signal binding[5].
  104 
  105 Required properties:
  106  - #reset-cells : Should be 1. Contains the reset domain ID value used
  107                   by SCMI commands.
  108 
  109 SRAM and Shared Memory for SCMI
  110 -------------------------------
  111 
  112 A small area of SRAM is reserved for SCMI communication between application
  113 processors and SCP.
  114 
  115 The properties should follow the generic mmio-sram description found in [4]
  116 
  117 Each sub-node represents the reserved area for SCMI.
  118 
  119 Required sub-node properties:
  120 - reg : The base offset and size of the reserved area with the SRAM
  121 - compatible : should be "arm,scmi-shmem" for Non-secure SRAM based
  122                shared memory
  123 
  124 [0] http://infocenter.arm.com/help/topic/com.arm.doc.den0056a/index.html
  125 [1] Documentation/devicetree/bindings/clock/clock-bindings.txt
  126 [2] Documentation/devicetree/bindings/power/power-domain.yaml
  127 [3] Documentation/devicetree/bindings/thermal/thermal*.yaml
  128 [4] Documentation/devicetree/bindings/sram/sram.yaml
  129 [5] Documentation/devicetree/bindings/reset/reset.txt
  130 [6] Documentation/devicetree/bindings/regulator/regulator.yaml
  131 
  132 Example:
  133 
  134 sram@50000000 {
  135         compatible = "mmio-sram";
  136         reg = <0x0 0x50000000 0x0 0x10000>;
  137 
  138         #address-cells = <1>;
  139         #size-cells = <1>;
  140         ranges = <0 0x0 0x50000000 0x10000>;
  141 
  142         cpu_scp_lpri: scp-shmem@0 {
  143                 compatible = "arm,scmi-shmem";
  144                 reg = <0x0 0x200>;
  145         };
  146 
  147         cpu_scp_hpri: scp-shmem@200 {
  148                 compatible = "arm,scmi-shmem";
  149                 reg = <0x200 0x200>;
  150         };
  151 };
  152 
  153 mailbox@40000000 {
  154         ....
  155         #mbox-cells = <1>;
  156         reg = <0x0 0x40000000 0x0 0x10000>;
  157 };
  158 
  159 firmware {
  160 
  161         ...
  162 
  163         scmi {
  164                 compatible = "arm,scmi";
  165                 mboxes = <&mailbox 0 &mailbox 1>;
  166                 mbox-names = "tx", "rx";
  167                 shmem = <&cpu_scp_lpri &cpu_scp_hpri>;
  168                 #address-cells = <1>;
  169                 #size-cells = <0>;
  170 
  171                 scmi_devpd: protocol@11 {
  172                         reg = <0x11>;
  173                         #power-domain-cells = <1>;
  174                 };
  175 
  176                 scmi_dvfs: protocol@13 {
  177                         reg = <0x13>;
  178                         #clock-cells = <1>;
  179                 };
  180 
  181                 scmi_clk: protocol@14 {
  182                         reg = <0x14>;
  183                         #clock-cells = <1>;
  184                 };
  185 
  186                 scmi_sensors0: protocol@15 {
  187                         reg = <0x15>;
  188                         #thermal-sensor-cells = <1>;
  189                 };
  190 
  191                 scmi_reset: protocol@16 {
  192                         reg = <0x16>;
  193                         #reset-cells = <1>;
  194                 };
  195 
  196                 scmi_voltage: protocol@17 {
  197                         reg = <0x17>;
  198 
  199                         regulators {
  200                                 regulator_devX: regulator@0 {
  201                                         reg = <0x0>;
  202                                         regulator-max-microvolt = <3300000>;
  203                                 };
  204 
  205                                 regulator_devY: regulator@9 {
  206                                         reg = <0x9>;
  207                                         regulator-min-microvolt = <500000>;
  208                                         regulator-max-microvolt = <4200000>;
  209                                 };
  210 
  211                                 ...
  212                         };
  213                 };
  214         };
  215 };
  216 
  217 cpu@0 {
  218         ...
  219         reg = <0 0>;
  220         clocks = <&scmi_dvfs 0>;
  221 };
  222 
  223 hdlcd@7ff60000 {
  224         ...
  225         reg = <0 0x7ff60000 0 0x1000>;
  226         clocks = <&scmi_clk 4>;
  227         power-domains = <&scmi_devpd 1>;
  228         resets = <&scmi_reset 10>;
  229 };
  230 
  231 thermal-zones {
  232         soc_thermal {
  233                 polling-delay-passive = <100>;
  234                 polling-delay = <1000>;
  235                                         /* sensor ID */
  236                 thermal-sensors = <&scmi_sensors0 3>;
  237                 ...
  238         };
  239 };

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