1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2 %YAML 1.2
3 ---
4 $id: http://devicetree.org/schemas/arm/hisilicon/controller/cpuctrl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
6
7 title: Hisilicon CPU controller
8
9 maintainers:
10 - Wei Xu <xuwei5@hisilicon.com>
11
12 description: |
13 The clock registers and power registers of secondary cores are defined
14 in CPU controller, especially in HIX5HD2 SoC.
15
16 properties:
17 compatible:
18 items:
19 - const: hisilicon,cpuctrl
20
21 reg:
22 maxItems: 1
23
24 "#address-cells":
25 const: 1
26
27 "#size-cells":
28 const: 1
29
30 ranges: true
31
32 required:
33 - compatible
34 - reg
35
36 additionalProperties:
37 type: object
38
39 examples:
40 - |
41 cpuctrl@a22000 {
42 compatible = "hisilicon,cpuctrl";
43 #address-cells = <1>;
44 #size-cells = <1>;
45 reg = <0x00a22000 0x2000>;
46 ranges = <0 0x00a22000 0x2000>;
47
48 clock: clock@0 {
49 compatible = "hisilicon,hix5hd2-clock";
50 reg = <0 0x2000>;
51 #clock-cells = <1>;
52 };
53 };
54 ...
Cache object: b493b064cc6f2820542ae70d28678d43
|