1 Mediatek apmixedsys controller
2 ==============================
3
4 The Mediatek apmixedsys controller provides the PLLs to the system.
5
6 Required Properties:
7
8 - compatible: Should be one of:
9 - "mediatek,mt2701-apmixedsys"
10 - "mediatek,mt2712-apmixedsys", "syscon"
11 - "mediatek,mt6765-apmixedsys", "syscon"
12 - "mediatek,mt6779-apmixedsys", "syscon"
13 - "mediatek,mt6797-apmixedsys"
14 - "mediatek,mt7622-apmixedsys"
15 - "mediatek,mt7623-apmixedsys", "mediatek,mt2701-apmixedsys"
16 - "mediatek,mt7629-apmixedsys"
17 - "mediatek,mt7986-apmixedsys"
18 - "mediatek,mt8135-apmixedsys"
19 - "mediatek,mt8167-apmixedsys", "syscon"
20 - "mediatek,mt8173-apmixedsys"
21 - "mediatek,mt8183-apmixedsys", "syscon"
22 - "mediatek,mt8516-apmixedsys"
23 - #clock-cells: Must be 1
24
25 The apmixedsys controller uses the common clk binding from
26 Documentation/devicetree/bindings/clock/clock-bindings.txt
27 The available clocks are defined in dt-bindings/clock/mt*-clk.h.
28
29 Example:
30
31 apmixedsys: clock-controller@10209000 {
32 compatible = "mediatek,mt8173-apmixedsys";
33 reg = <0 0x10209000 0 0x1000>;
34 #clock-cells = <1>;
35 };
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