The Design and Implementation of the FreeBSD Operating System, Second Edition
Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)

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FreeBSD/Linux Kernel Cross Reference
sys/contrib/device-tree/Bindings/arm/mediatek/mediatek,mt8186-clock.yaml

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    1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
    2 %YAML 1.2
    3 ---
    4 $id: "http://devicetree.org/schemas/arm/mediatek/mediatek,mt8186-clock.yaml#"
    5 $schema: "http://devicetree.org/meta-schemas/core.yaml#"
    6 
    7 title: MediaTek Functional Clock Controller for MT8186
    8 
    9 maintainers:
   10   - Chun-Jie Chen <chun-jie.chen@mediatek.com>
   11 
   12 description: |
   13   The clock architecture in MediaTek like below
   14   PLLs -->
   15           dividers -->
   16                       muxes
   17                            -->
   18                               clock gate
   19 
   20   The devices provide clock gate control in different IP blocks.
   21 
   22 properties:
   23   compatible:
   24     items:
   25       - enum:
   26           - mediatek,mt8186-imp_iic_wrap
   27           - mediatek,mt8186-mfgsys
   28           - mediatek,mt8186-wpesys
   29           - mediatek,mt8186-imgsys1
   30           - mediatek,mt8186-imgsys2
   31           - mediatek,mt8186-vdecsys
   32           - mediatek,mt8186-vencsys
   33           - mediatek,mt8186-camsys
   34           - mediatek,mt8186-camsys_rawa
   35           - mediatek,mt8186-camsys_rawb
   36           - mediatek,mt8186-mdpsys
   37           - mediatek,mt8186-ipesys
   38   reg:
   39     maxItems: 1
   40 
   41   '#clock-cells':
   42     const: 1
   43 
   44 required:
   45   - compatible
   46   - reg
   47 
   48 additionalProperties: false
   49 
   50 examples:
   51   - |
   52     imp_iic_wrap: clock-controller@11017000 {
   53         compatible = "mediatek,mt8186-imp_iic_wrap";
   54         reg = <0x11017000 0x1000>;
   55         #clock-cells = <1>;
   56     };

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