ti-sysc.txt

Version: - FREEBSD - FREEBSD-13-STABLE - FREEBSD-13-0 - FREEBSD-12-STABLE - FREEBSD-12-0 - FREEBSD-11-STABLE - FREEBSD-11-0 - FREEBSD-10-STABLE - FREEBSD-10-0 - FREEBSD-9-STABLE - FREEBSD-9-0 - FREEBSD-8-STABLE - FREEBSD-8-0 - FREEBSD-7-STABLE - FREEBSD-7-0 - FREEBSD-6-STABLE - FREEBSD-6-0 - FREEBSD-5-STABLE - FREEBSD-5-0 - FREEBSD-4-STABLE - FREEBSD-3-STABLE - FREEBSD22 - l41 - OPENBSD - linux-2.6 - MK84 - PLAN9 - xnu-8792
SearchContext: - none - 3 - 10

    1 Texas Instruments sysc interconnect target module wrapper binding
    2 
    3 Texas Instruments SoCs can have a generic interconnect target module
    4 hardware for devices connected to various interconnects such as L3
    5 interconnect (Arteris NoC) and L4 interconnect (Sonics s3220). The sysc
    6 is mostly used for interaction between module and PRCM. It participates
    7 in the OCP Disconnect Protocol but other than that is mostly independent
    8 of the interconnect.
    9 
   10 Each interconnect target module can have one or more devices connected to
   11 it. There is a set of control registers for managing interconnect target
   12 module clocks, idle modes and interconnect level resets for the module.
   13 
   14 These control registers are sprinkled into the unused register address
   15 space of the first child device IP block managed by the interconnect
   16 target module and typically are named REVISION, SYSCONFIG and SYSSTATUS.
   17 
   18 Required standard properties:
   19 
   20 - compatible    shall be one of the following generic types:
   21 
   22                 "ti,sysc"
   23                 "ti,sysc-omap2"
   24                 "ti,sysc-omap4"
   25                 "ti,sysc-omap4-simple"
   26 
   27                 or one of the following derivative types for hardware
   28                 needing special workarounds:
   29 
   30                 "ti,sysc-omap2-timer"
   31                 "ti,sysc-omap4-timer"
   32                 "ti,sysc-omap3430-sr"
   33                 "ti,sysc-omap3630-sr"
   34                 "ti,sysc-omap4-sr"
   35                 "ti,sysc-omap3-sham"
   36                 "ti,sysc-omap-aes"
   37                 "ti,sysc-mcasp"
   38                 "ti,sysc-dra7-mcasp"
   39                 "ti,sysc-usb-host-fs"
   40                 "ti,sysc-dra7-mcan"
   41                 "ti,sysc-pruss"
   42 
   43 - reg           shall have register areas implemented for the interconnect
   44                 target module in question such as revision, sysc and syss
   45 
   46 - reg-names     shall contain the register names implemented for the
   47                 interconnect target module in question such as
   48                 "rev, "sysc", and "syss"
   49 
   50 - ranges        shall contain the interconnect target module IO range
   51                 available for one or more child device IP blocks managed
   52                 by the interconnect target module, the ranges may include
   53                 multiple ranges such as device L4 range for control and
   54                 parent L3 range for DMA access
   55 
   56 Optional properties:
   57 
   58 - ti,sysc-mask  shall contain mask of supported register bits for the
   59                 SYSCONFIG register as documented in the Technical Reference
   60                 Manual (TRM) for the interconnect target module
   61 
   62 - ti,sysc-midle list of master idle modes supported by the interconnect
   63                 target module as documented in the TRM for SYSCONFIG
   64                 register MIDLEMODE bits
   65 
   66 - ti,sysc-sidle list of slave idle modes supported by the interconnect
   67                 target module as documented in the TRM for SYSCONFIG
   68                 register SIDLEMODE bits
   69 
   70 - ti,sysc-delay-us      delay needed after OCP softreset before accssing
   71                         SYSCONFIG register again
   72 
   73 - ti,syss-mask  optional mask of reset done status bits as described in the
   74                 TRM for SYSSTATUS registers, typically 1 with some devices
   75                 having separate reset done bits for children like OHCI and
   76                 EHCI
   77 
   78 - clocks        clock specifier for each name in the clock-names as
   79                 specified in the binding documentation for ti-clkctrl,
   80                 typically available for all interconnect targets on TI SoCs
   81                 based on omap4 except if it's read-only register in hwauto
   82                 mode as for example omap4 L4_CFG_CLKCTRL
   83 
   84 - clock-names   should contain at least "fck", and optionally also "ick"
   85                 depending on the SoC and the interconnect target module,
   86                 some interconnect target modules also need additional
   87                 optional clocks that can be specified as listed in TRM
   88                 for the related CLKCTRL register bits 8 to 15 such as
   89                 "dbclk" or "clk32k" depending on their role
   90 
   91 - ti,hwmods     optional TI interconnect module name to use legacy
   92                 hwmod platform data
   93 
   94 - ti,no-reset-on-init   interconnect target module should not be reset at init
   95 
   96 - ti,no-idle-on-init    interconnect target module should not be idled at init
   97 
   98 - ti,no-idle            interconnect target module should not be idled
   99 
  100 Example: Single instance of MUSB controller on omap4 using interconnect ranges
  101 using offsets from l4_cfg second segment (0x4a000000 + 0x80000 = 0x4a0ab000):
  102 
  103         target-module@2b000 {           /* 0x4a0ab000, ap 84 12.0 */
  104                 compatible = "ti,sysc-omap2";
  105                 ti,hwmods = "usb_otg_hs";
  106                 reg = <0x2b400 0x4>,
  107                       <0x2b404 0x4>,
  108                       <0x2b408 0x4>;
  109                 reg-names = "rev", "sysc", "syss";
  110                 clocks = <&l3_init_clkctrl OMAP4_USB_OTG_HS_CLKCTRL 0>;
  111                 clock-names = "fck";
  112                 ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
  113                                  SYSC_OMAP2_SOFTRESET |
  114                                  SYSC_OMAP2_AUTOIDLE)>;
  115                 ti,sysc-midle = <SYSC_IDLE_FORCE>,
  116                                 <SYSC_IDLE_NO>,
  117                                 <SYSC_IDLE_SMART>;
  118                 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
  119                                 <SYSC_IDLE_NO>,
  120                                 <SYSC_IDLE_SMART>,
  121                                 <SYSC_IDLE_SMART_WKUP>;
  122                 ti,syss-mask = <1>;
  123                 #address-cells = <1>;
  124                 #size-cells = <1>;
  125                 ranges = <0 0x2b000 0x1000>;
  126 
  127                 usb_otg_hs: otg@0 {
  128                         compatible = "ti,omap4-musb";
  129                         reg = <0x0 0x7ff>;
  130                         interrupts = <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>,
  131                                      <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>;
  132                         usb-phy = <&usb2_phy>;
  133                         ...
  134                 };
  135         };
  136 
  137 Note that other SoCs, such as am335x can have multiple child devices. On am335x
  138 there are two MUSB instances, two USB PHY instances, and a single CPPI41 DMA
  139 instance as children of a single interconnect target module.

Cache object: fa4ec3495e53b8cb95916fc350be26aa

[ source navigation ] [ diff markup ] [ identifier search ] [ freetext search ] [ file search ] [ list types ] [ track identifier ]

This page is part of the FreeBSD/Linux Linux Kernel Cross-Reference, and was automatically generated using a modified version of the LXR engine.

FreeBSD/Linux Kernel Cross Reference sys/contrib/device-tree/Bindings/bus/ti-sysc.txt

FreeBSD/Linux Kernel Cross Reference
sys/contrib/device-tree/Bindings/bus/ti-sysc.txt