FreeBSD/Linux Kernel Cross Reference
sys/contrib/device-tree/Bindings/clock/adi,axi-clkgen.yaml

     # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
     %YAML 1.2
     ---
     $id: http://devicetree.org/schemas/clock/adi,axi-clkgen.yaml#
     $schema: http://devicetree.org/meta-schemas/core.yaml#
     
     title: Binding for Analog Devices AXI clkgen pcore clock generator
     
     maintainers:
      - Lars-Peter Clausen <lars@metafoo.de>
      - Michael Hennerich <michael.hennerich@analog.com>
    
    description: |
      The axi_clkgen IP core is a software programmable clock generator,
      that can be synthesized on various FPGA platforms.
    
      Link: https://wiki.analog.com/resources/fpga/docs/axi_clkgen
    
    properties:
      compatible:
        enum:
          - adi,axi-clkgen-2.00.a
          - adi,zynqmp-axi-clkgen-2.00.a
    
      clocks:
        description:
          Specifies the reference clock(s) from which the output frequency is
          derived. This must either reference one clock if only the first clock
          input is connected or two if both clock inputs are connected.
        minItems: 1
        maxItems: 2
    
      '#clock-cells':
        const: 0
    
      reg:
        maxItems: 1
    
    required:
      - compatible
      - reg
      - clocks
      - '#clock-cells'
    
    additionalProperties: false
    
    examples:
      - |
        clock-controller@ff000000 {
          compatible = "adi,axi-clkgen-2.00.a";
          #clock-cells = <0>;
          reg = <0xff000000 0x1000>;
          clocks = <&osc 1>;
        };

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