The Design and Implementation of the FreeBSD Operating System, Second Edition
Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)


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FreeBSD/Linux Kernel Cross Reference
sys/contrib/device-tree/Bindings/clock/cirrus,cs2000-cp.yaml

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    1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
    2 %YAML 1.2
    3 ---
    4 $id: http://devicetree.org/schemas/clock/cirrus,cs2000-cp.yaml#
    5 $schema: http://devicetree.org/meta-schemas/core.yaml#
    6 
    7 title: Binding CIRRUS LOGIC Fractional-N Clock Synthesizer & Clock Multiplier
    8 
    9 maintainers:
   10   - Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
   11 
   12 description: |
   13   The CS2000-CP is an extremely versatile system clocking device that
   14   utilizes a programmable phase lock loop.
   15 
   16   Link: https://www.cirrus.com/products/cs2000/
   17 
   18 properties:
   19   compatible:
   20     enum:
   21       - cirrus,cs2000-cp
   22 
   23   clocks:
   24     description:
   25       Common clock binding for CLK_IN, XTI/REF_CLK
   26     minItems: 2
   27     maxItems: 2
   28 
   29   clock-names:
   30     items:
   31       - const: clk_in
   32       - const: ref_clk
   33 
   34   '#clock-cells':
   35     const: 0
   36 
   37   reg:
   38     maxItems: 1
   39 
   40   cirrus,aux-output-source:
   41     description:
   42       Specifies the function of the auxiliary clock output pin
   43     $ref: /schemas/types.yaml#/definitions/uint32
   44     enum:
   45       - 0 # CS2000CP_AUX_OUTPUT_REF_CLK:  ref_clk input
   46       - 1 # CS2000CP_AUX_OUTPUT_CLK_IN:   clk_in input
   47       - 2 # CS2000CP_AUX_OUTPUT_CLK_OUT:  clk_out output
   48       - 3 # CS2000CP_AUX_OUTPUT_PLL_LOCK: pll lock status
   49     default: 0
   50 
   51   cirrus,clock-skip:
   52     description:
   53       This mode allows the PLL to maintain lock even when CLK_IN
   54       has missing pulses for up to 20 ms.
   55     $ref: /schemas/types.yaml#/definitions/flag
   56 
   57   cirrus,dynamic-mode:
   58     description:
   59       In dynamic mode, the CLK_IN input is used to drive the
   60       digital PLL of the silicon.
   61       If not given, the static mode shall be used to derive the
   62       output signal directly from the REF_CLK input.
   63     $ref: /schemas/types.yaml#/definitions/flag
   64 
   65 required:
   66   - compatible
   67   - reg
   68   - clocks
   69   - clock-names
   70   - '#clock-cells'
   71 
   72 additionalProperties: false
   73 
   74 examples:
   75   - |
   76     #include <dt-bindings/clock/cirrus,cs2000-cp.h>
   77 
   78     i2c@0 {
   79       reg = <0x0 0x100>;
   80       #address-cells = <1>;
   81       #size-cells = <0>;
   82 
   83       clock-controller@4f {
   84         #clock-cells = <0>;
   85         compatible = "cirrus,cs2000-cp";
   86         reg = <0x4f>;
   87         clocks = <&rcar_sound 0>, <&x12_clk>;
   88         clock-names = "clk_in", "ref_clk";
   89         cirrus,aux-output-source = <CS2000CP_AUX_OUTPUT_CLK_OUT>;
   90       };
   91     };

Cache object: 1b076cf16e35792436d1ff5df6bc423d


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