The Design and Implementation of the FreeBSD Operating System, Second Edition
Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)


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FreeBSD/Linux Kernel Cross Reference
sys/contrib/device-tree/Bindings/clock/idt,versaclock5.txt

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    1 Binding for IDT VersaClock 5,6 programmable i2c clock generators.
    2 
    3 The IDT VersaClock 5 and VersaClock 6 are programmable i2c clock
    4 generators providing from 3 to 12 output clocks.
    5 
    6 ==I2C device node==
    7 
    8 Required properties:
    9 - compatible:   shall be one of
   10                 "idt,5p49v5923"
   11                 "idt,5p49v5925"
   12                 "idt,5p49v5933"
   13                 "idt,5p49v5935"
   14                 "idt,5p49v6901"
   15                 "idt,5p49v6965"
   16 - reg:          i2c device address, shall be 0x68 or 0x6a.
   17 - #clock-cells: from common clock binding; shall be set to 1.
   18 - clocks:       from common clock binding; list of parent clock handles,
   19                 - 5p49v5923 and
   20                   5p49v5925 and
   21                   5p49v6901: (required) either or both of XTAL or CLKIN
   22                                         reference clock.
   23                 - 5p49v5933 and
   24                 - 5p49v5935: (optional) property not present (internal
   25                                         Xtal used) or CLKIN reference
   26                                         clock.
   27 - clock-names:  from common clock binding; clock input names, can be
   28                 - 5p49v5923 and
   29                   5p49v5925 and
   30                   5p49v6901: (required) either or both of "xin", "clkin".
   31                 - 5p49v5933 and
   32                 - 5p49v5935: (optional) property not present or "clkin".
   33 
   34 ==Mapping between clock specifier and physical pins==
   35 
   36 When referencing the provided clock in the DT using phandle and
   37 clock specifier, the following mapping applies:
   38 
   39 5P49V5923:
   40         0 -- OUT0_SEL_I2CB
   41         1 -- OUT1
   42         2 -- OUT2
   43 
   44 5P49V5933:
   45         0 -- OUT0_SEL_I2CB
   46         1 -- OUT1
   47         2 -- OUT4
   48 
   49 5P49V5925 and
   50 5P49V5935:
   51         0 -- OUT0_SEL_I2CB
   52         1 -- OUT1
   53         2 -- OUT2
   54         3 -- OUT3
   55         4 -- OUT4
   56 
   57 5P49V6901:
   58         0 -- OUT0_SEL_I2CB
   59         1 -- OUT1
   60         2 -- OUT2
   61         3 -- OUT3
   62         4 -- OUT4
   63 
   64 ==Example==
   65 
   66 /* 25MHz reference crystal */
   67 ref25: ref25m {
   68         compatible = "fixed-clock";
   69         #clock-cells = <0>;
   70         clock-frequency = <25000000>;
   71 };
   72 
   73 i2c-master-node {
   74 
   75         /* IDT 5P49V5923 i2c clock generator */
   76         vc5: clock-generator@6a {
   77                 compatible = "idt,5p49v5923";
   78                 reg = <0x6a>;
   79                 #clock-cells = <1>;
   80 
   81                 /* Connect XIN input to 25MHz reference */
   82                 clocks = <&ref25m>;
   83                 clock-names = "xin";
   84         };
   85 };
   86 
   87 /* Consumer referencing the 5P49V5923 pin OUT1 */
   88 consumer {
   89         ...
   90         clocks = <&vc5 1>;
   91         ...
   92 }

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