FreeBSD/Linux Kernel Cross Reference
sys/contrib/device-tree/Bindings/clock/imx8ulp-pcc-clock.yaml

     # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
     %YAML 1.2
     ---
     $id: http://devicetree.org/schemas/clock/imx8ulp-pcc-clock.yaml#
     $schema: http://devicetree.org/meta-schemas/core.yaml#
     
     title: NXP i.MX8ULP Peripheral Clock Controller(PCC) Module Binding
     
     maintainers:
      - Jacky Bai <ping.bai@nxp.com>
    
    description: |
      On i.MX8ULP, The clock sources generation, distribution and management is
      under the control of several CGCs & PCCs modules. The PCC modules control
      software reset, clock selection, optional division and clock gating mode
      for peripherals.
    
    properties:
      compatible:
        enum:
          - fsl,imx8ulp-pcc3
          - fsl,imx8ulp-pcc4
          - fsl,imx8ulp-pcc5
    
      reg:
        maxItems: 1
    
      '#clock-cells':
        const: 1
    
      '#reset-cells':
        const: 1
    
    required:
      - compatible
      - reg
      - '#clock-cells'
      - '#reset-cells'
    
    additionalProperties: false
    
    examples:
      # Peripheral Clock Control Module node:
      - |
        clock-controller@292d0000 {
            compatible = "fsl,imx8ulp-pcc3";
            reg = <0x292d0000 0x10000>;
            #clock-cells = <1>;
            #reset-cells = <1>;
        };

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