FreeBSD/Linux Kernel Cross Reference
sys/contrib/device-tree/Bindings/clock/nvidia,tegra124-car.yaml

     # SPDX-License-Identifier: (GPL-2.0+ OR BSD-2-Clause)
     %YAML 1.2
     ---
     $id: http://devicetree.org/schemas/clock/nvidia,tegra124-car.yaml#
     $schema: http://devicetree.org/meta-schemas/core.yaml#
     
     title: NVIDIA Tegra Clock and Reset Controller
     
     maintainers:
      - Jon Hunter <jonathanh@nvidia.com>
      - Thierry Reding <thierry.reding@gmail.com>
    
    description: |
      The Clock and Reset (CAR) is the HW module responsible for muxing and gating
      Tegra's clocks, and setting their rates. It comprises CLKGEN and RSTGEN units.
    
      CLKGEN provides the registers to program the PLLs. It controls most of
      the clock source programming and most of the clock dividers.
    
      CLKGEN input signals include the external clock for the reference frequency
      (12 MHz, 26 MHz) and the external clock for the Real Time Clock (32.768 KHz).
    
      Outputs from CLKGEN are inputs clock of the h/w blocks in the Tegra system.
    
      RSTGEN provides the registers needed to control resetting of each block in
      the Tegra system.
    
    properties:
      compatible:
        const: nvidia,tegra124-car
    
      reg:
        maxItems: 1
    
      '#clock-cells':
        const: 1
    
      "#reset-cells":
        const: 1
    
      nvidia,external-memory-controller:
        $ref: /schemas/types.yaml#/definitions/phandle
        description:
          phandle of the external memory controller node
    
    patternProperties:
      "^emc-timings-[0-9]+$":
        type: object
        properties:
          nvidia,ram-code:
            $ref: /schemas/types.yaml#/definitions/uint32
            description:
              value of the RAM_CODE field in the PMC_STRAPPING_OPT_A register that
              this timing set is used for
    
        patternProperties:
          "^timing-[0-9]+$":
            type: object
            properties:
              clock-frequency:
                description:
                  external memory clock rate in Hz
                minimum: 1000000
                maximum: 1000000000
    
              nvidia,parent-clock-frequency:
                $ref: /schemas/types.yaml#/definitions/uint32
                description:
                  rate of parent clock in Hz
                minimum: 1000000
                maximum: 1000000000
    
              clocks:
                items:
                  - description: parent clock of EMC
    
              clock-names:
                items:
                  - const: emc-parent
    
            required:
              - clock-frequency
              - nvidia,parent-clock-frequency
              - clocks
              - clock-names
    
            additionalProperties: false
    
        additionalProperties: false
    
    required:
      - compatible
      - reg
      - '#clock-cells'
      - "#reset-cells"
    
    additionalProperties: false
    
    examples:
     - |
       #include <dt-bindings/clock/tegra124-car.h>
   
       car: clock-controller@60006000 {
           compatible = "nvidia,tegra124-car";
           reg = <0x60006000 0x1000>;
           #clock-cells = <1>;
           #reset-cells = <1>;
       };

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