1 # SPDX-License-Identifier: GPL-2.0-only
2 %YAML 1.2
3 ---
4 $id: http://devicetree.org/schemas/clock/qcom,gcc-msm8996.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
6
7 title: Qualcomm Global Clock & Reset Controller Binding for MSM8996
8
9 maintainers:
10 - Stephen Boyd <sboyd@kernel.org>
11 - Taniya Das <tdas@codeaurora.org>
12
13 description: |
14 Qualcomm global clock control module which supports the clocks, resets and
15 power domains on MSM8996.
16
17 See also:
18 - dt-bindings/clock/qcom,gcc-msm8996.h
19
20 properties:
21 compatible:
22 const: qcom,gcc-msm8996
23
24 clocks:
25 minItems: 3
26 items:
27 - description: XO source
28 - description: Second XO source
29 - description: Sleep clock source
30 - description: PCIe 0 PIPE clock (optional)
31 - description: PCIe 1 PIPE clock (optional)
32 - description: PCIe 2 PIPE clock (optional)
33 - description: USB3 PIPE clock (optional)
34 - description: UFS RX symbol 0 clock (optional)
35 - description: UFS RX symbol 1 clock (optional)
36 - description: UFS TX symbol 0 clock (optional)
37
38 clock-names:
39 minItems: 3
40 items:
41 - const: cxo
42 - const: cxo2
43 - const: sleep_clk
44 - const: pcie_0_pipe_clk_src
45 - const: pcie_1_pipe_clk_src
46 - const: pcie_2_pipe_clk_src
47 - const: usb3_phy_pipe_clk_src
48 - const: ufs_rx_symbol_0_clk_src
49 - const: ufs_rx_symbol_1_clk_src
50 - const: ufs_tx_symbol_0_clk_src
51
52 '#clock-cells':
53 const: 1
54
55 '#reset-cells':
56 const: 1
57
58 '#power-domain-cells':
59 const: 1
60
61 reg:
62 maxItems: 1
63
64 protected-clocks:
65 description:
66 Protected clock specifier list as per common clock binding.
67
68 required:
69 - compatible
70 - reg
71 - '#clock-cells'
72 - '#reset-cells'
73 - '#power-domain-cells'
74
75 additionalProperties: false
76
77 examples:
78 - |
79 clock-controller@300000 {
80 compatible = "qcom,gcc-msm8996";
81 #clock-cells = <1>;
82 #reset-cells = <1>;
83 #power-domain-cells = <1>;
84 reg = <0x300000 0x90000>;
85 };
86 ...
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