qcom,gcc-sc7280.yaml

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    1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
    2 %YAML 1.2
    3 ---
    4 $id: http://devicetree.org/schemas/clock/qcom,gcc-sc7280.yaml#
    5 $schema: http://devicetree.org/meta-schemas/core.yaml#
    6 
    7 title: Qualcomm Global Clock & Reset Controller Binding for SC7280
    8 
    9 maintainers:
   10   - Taniya Das <tdas@codeaurora.org>
   11 
   12 description: |
   13   Qualcomm global clock control module which supports the clocks, resets and
   14   power domains on SC7280.
   15 
   16   See also:
   17   - dt-bindings/clock/qcom,gcc-sc7280.h
   18 
   19 properties:
   20   compatible:
   21     const: qcom,gcc-sc7280
   22 
   23   clocks:
   24     items:
   25       - description: Board XO source
   26       - description: Board active XO source
   27       - description: Sleep clock source
   28       - description: PCIE-0 pipe clock source
   29       - description: PCIE-1 pipe clock source
   30       - description: USF phy rx symbol 0 clock source
   31       - description: USF phy rx symbol 1 clock source
   32       - description: USF phy tx symbol 0 clock source
   33       - description: USB30 phy wrapper pipe clock source
   34 
   35   clock-names:
   36     items:
   37       - const: bi_tcxo
   38       - const: bi_tcxo_ao
   39       - const: sleep_clk
   40       - const: pcie_0_pipe_clk
   41       - const: pcie_1_pipe_clk
   42       - const: ufs_phy_rx_symbol_0_clk
   43       - const: ufs_phy_rx_symbol_1_clk
   44       - const: ufs_phy_tx_symbol_0_clk
   45       - const: usb3_phy_wrapper_gcc_usb30_pipe_clk
   46 
   47   '#clock-cells':
   48     const: 1
   49 
   50   '#reset-cells':
   51     const: 1
   52 
   53   '#power-domain-cells':
   54     const: 1
   55 
   56   reg:
   57     maxItems: 1
   58 
   59 required:
   60   - compatible
   61   - clocks
   62   - clock-names
   63   - reg
   64   - '#clock-cells'
   65   - '#reset-cells'
   66   - '#power-domain-cells'
   67 
   68 additionalProperties: false
   69 
   70 examples:
   71   - |
   72     #include <dt-bindings/clock/qcom,rpmh.h>
   73     clock-controller@100000 {
   74       compatible = "qcom,gcc-sc7280";
   75       reg = <0x00100000 0x1f0000>;
   76       clocks = <&rpmhcc RPMH_CXO_CLK>,
   77                <&rpmhcc RPMH_CXO_CLK_A>,
   78                <&sleep_clk>,
   79                <&pcie_0_pipe_clk>, <&pcie_1_pipe_clk>,
   80                <&ufs_phy_rx_symbol_0_clk>, <&ufs_phy_rx_symbol_1_clk>,
   81                <&ufs_phy_tx_symbol_0_clk>,
   82                <&usb3_phy_wrapper_gcc_usb30_pipe_clk>;
   83 
   84       clock-names = "bi_tcxo", "bi_tcxo_ao", "sleep_clk", "pcie_0_pipe_clk",
   85                      "pcie_1_pipe_clk", "ufs_phy_rx_symbol_0_clk",
   86                      "ufs_phy_rx_symbol_1_clk", "ufs_phy_tx_symbol_0_clk",
   87                      "usb3_phy_wrapper_gcc_usb30_pipe_clk";
   88       #clock-cells = <1>;
   89       #reset-cells = <1>;
   90       #power-domain-cells = <1>;
   91     };
   92 ...

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