qcom,gcc-sdm845.yaml

Version: - FREEBSD - FREEBSD-13-STABLE - FREEBSD-13-0 - FREEBSD-12-STABLE - FREEBSD-12-0 - FREEBSD-11-STABLE - FREEBSD-11-0 - FREEBSD-10-STABLE - FREEBSD-10-0 - FREEBSD-9-STABLE - FREEBSD-9-0 - FREEBSD-8-STABLE - FREEBSD-8-0 - FREEBSD-7-STABLE - FREEBSD-7-0 - FREEBSD-6-STABLE - FREEBSD-6-0 - FREEBSD-5-STABLE - FREEBSD-5-0 - FREEBSD-4-STABLE - FREEBSD-3-STABLE - FREEBSD22 - l41 - OPENBSD - linux-2.6 - MK84 - PLAN9 - xnu-8792
SearchContext: - none - 3 - 10

    1 # SPDX-License-Identifier: GPL-2.0-only
    2 %YAML 1.2
    3 ---
    4 $id: http://devicetree.org/schemas/clock/qcom,gcc-sdm845.yaml#
    5 $schema: http://devicetree.org/meta-schemas/core.yaml#
    6 
    7 title: Qualcomm Global Clock & Reset Controller Binding
    8 
    9 maintainers:
   10   - Stephen Boyd <sboyd@kernel.org>
   11   - Taniya Das <tdas@codeaurora.org>
   12 
   13 description: |
   14   Qualcomm global clock control module which supports the clocks, resets and
   15   power domains on SDM845
   16 
   17   See also:
   18   - dt-bindings/clock/qcom,gcc-sdm845.h
   19 
   20 properties:
   21   compatible:
   22     const: qcom,gcc-sdm845
   23 
   24   clocks:
   25     items:
   26       - description: Board XO source
   27       - description: Board active XO source
   28       - description: Sleep clock source
   29       - description: PCIE 0 Pipe clock source
   30       - description: PCIE 1 Pipe clock source
   31 
   32   clock-names:
   33     items:
   34       - const: bi_tcxo
   35       - const: bi_tcxo_ao
   36       - const: sleep_clk
   37       - const: pcie_0_pipe_clk
   38       - const: pcie_1_pipe_clk
   39 
   40   '#clock-cells':
   41     const: 1
   42 
   43   '#reset-cells':
   44     const: 1
   45 
   46   power-domains:
   47     maxItems: 1
   48 
   49   '#power-domain-cells':
   50     const: 1
   51 
   52   reg:
   53     maxItems: 1
   54 
   55   protected-clocks:
   56     description:
   57       Protected clock specifier list as per common clock binding.
   58 
   59 required:
   60   - compatible
   61   - reg
   62   - '#clock-cells'
   63   - '#reset-cells'
   64   - '#power-domain-cells'
   65 
   66 additionalProperties: false
   67 
   68 examples:
   69   # Example for GCC for SDM845:
   70   - |
   71     #include <dt-bindings/clock/qcom,rpmh.h>
   72     clock-controller@100000 {
   73       compatible = "qcom,gcc-sdm845";
   74       reg = <0x100000 0x1f0000>;
   75       clocks = <&rpmhcc RPMH_CXO_CLK>,
   76                <&rpmhcc RPMH_CXO_CLK_A>,
   77                <&sleep_clk>,
   78                <&pcie0_lane>,
   79                <&pcie1_lane>;
   80       clock-names = "bi_tcxo", "bi_tcxo_ao", "sleep_clk", "pcie_0_pipe_clk", "pcie_1_pipe_clk";
   81       #clock-cells = <1>;
   82       #reset-cells = <1>;
   83       #power-domain-cells = <1>;
   84     };
   85 ...

Cache object: 11537c1c6124036ab450e4cb48ecfdea

[ source navigation ] [ diff markup ] [ identifier search ] [ freetext search ] [ file search ] [ list types ] [ track identifier ]

This page is part of the FreeBSD/Linux Linux Kernel Cross-Reference, and was automatically generated using a modified version of the LXR engine.

FreeBSD/Linux Kernel Cross Reference sys/contrib/device-tree/Bindings/clock/qcom,gcc-sdm845.yaml

FreeBSD/Linux Kernel Cross Reference
sys/contrib/device-tree/Bindings/clock/qcom,gcc-sdm845.yaml