| 
     1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
    2 %YAML 1.2
    3 ---
    4 $id: http://devicetree.org/schemas/clock/qcom,gcc-sm8250.yaml#
    5 $schema: http://devicetree.org/meta-schemas/core.yaml#
    6 
    7 title: Qualcomm Global Clock & Reset Controller Binding for SM8250
    8 
    9 maintainers:
   10   - Stephen Boyd <sboyd@kernel.org>
   11   - Taniya Das <tdas@codeaurora.org>
   12 
   13 description: |
   14   Qualcomm global clock control module which supports the clocks, resets and
   15   power domains on SM8250.
   16 
   17   See also:
   18   - dt-bindings/clock/qcom,gcc-sm8250.h
   19 
   20 properties:
   21   compatible:
   22     const: qcom,gcc-sm8250
   23 
   24   clocks:
   25     items:
   26       - description: Board XO source
   27       - description: Sleep clock source
   28 
   29   clock-names:
   30     items:
   31       - const: bi_tcxo
   32       - const: sleep_clk
   33 
   34   '#clock-cells':
   35     const: 1
   36 
   37   '#reset-cells':
   38     const: 1
   39 
   40   '#power-domain-cells':
   41     const: 1
   42 
   43   reg:
   44     maxItems: 1
   45 
   46   protected-clocks:
   47     description:
   48       Protected clock specifier list as per common clock binding.
   49 
   50 required:
   51   - compatible
   52   - clocks
   53   - clock-names
   54   - reg
   55   - '#clock-cells'
   56   - '#reset-cells'
   57   - '#power-domain-cells'
   58 
   59 additionalProperties: false
   60 
   61 examples:
   62   - |
   63     #include <dt-bindings/clock/qcom,rpmh.h>
   64     clock-controller@100000 {
   65       compatible = "qcom,gcc-sm8250";
   66       reg = <0x00100000 0x1f0000>;
   67       clocks = <&rpmhcc RPMH_CXO_CLK>,
   68                <&sleep_clk>;
   69       clock-names = "bi_tcxo", "sleep_clk";
   70       #clock-cells = <1>;
   71       #reset-cells = <1>;
   72       #power-domain-cells = <1>;
   73     };
   74 ...
Cache object: b915de3b6780001d8c62e8564c7d746c 
 
 |