| 
     1 Qualcomm LPASS Clock Controller Binding
    2 -----------------------------------------------
    3 
    4 Required properties :
    5 - compatible            : shall contain "qcom,sdm845-lpasscc"
    6 - #clock-cells          : from common clock binding, shall contain 1.
    7 - reg                   : shall contain base register address and size,
    8                           in the order
    9                         Index-0 maps to LPASS_CC register region
   10                         Index-1 maps to LPASS_QDSP6SS register region
   11 
   12 Optional properties :
   13 - reg-names     : register names of LPASS domain
   14                  "cc", "qdsp6ss".
   15 
   16 Example:
   17 
   18 The below node has to be defined in the cases where the LPASS peripheral loader
   19 would bring the subsystem out of reset.
   20 
   21         lpasscc: clock-controller@17014000 {
   22                 compatible = "qcom,sdm845-lpasscc";
   23                 reg = <0x17014000 0x1f004>, <0x17300000 0x200>;
   24                 reg-names = "cc", "qdsp6ss";
   25                 #clock-cells = <1>;
   26         };
Cache object: 402894371ab5f2b8c521d9ec64b64457 
 
 |