1 # SPDX-License-Identifier: GPL-2.0-only
2 %YAML 1.2
3 ---
4 $id: http://devicetree.org/schemas/clock/qcom,sc7180-gpucc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
6
7 title: Qualcomm Graphics Clock & Reset Controller Binding for SC7180
8
9 maintainers:
10 - Taniya Das <tdas@codeaurora.org>
11
12 description: |
13 Qualcomm graphics clock control module which supports the clocks, resets and
14 power domains on SC7180.
15
16 See also dt-bindings/clock/qcom,gpucc-sc7180.h.
17
18 properties:
19 compatible:
20 const: qcom,sc7180-gpucc
21
22 clocks:
23 items:
24 - description: Board XO source
25 - description: GPLL0 main branch source
26 - description: GPLL0 div branch source
27
28 clock-names:
29 items:
30 - const: bi_tcxo
31 - const: gcc_gpu_gpll0_clk_src
32 - const: gcc_gpu_gpll0_div_clk_src
33
34 '#clock-cells':
35 const: 1
36
37 '#reset-cells':
38 const: 1
39
40 '#power-domain-cells':
41 const: 1
42
43 reg:
44 maxItems: 1
45
46 required:
47 - compatible
48 - reg
49 - clocks
50 - clock-names
51 - '#clock-cells'
52 - '#reset-cells'
53 - '#power-domain-cells'
54
55 additionalProperties: false
56
57 examples:
58 - |
59 #include <dt-bindings/clock/qcom,gcc-sc7180.h>
60 #include <dt-bindings/clock/qcom,rpmh.h>
61 clock-controller@5090000 {
62 compatible = "qcom,sc7180-gpucc";
63 reg = <0x05090000 0x9000>;
64 clocks = <&rpmhcc RPMH_CXO_CLK>,
65 <&gcc GCC_GPU_GPLL0_CLK_SRC>,
66 <&gcc GCC_GPU_GPLL0_DIV_CLK_SRC>;
67 clock-names = "bi_tcxo",
68 "gcc_gpu_gpll0_clk_src",
69 "gcc_gpu_gpll0_div_clk_src";
70 #clock-cells = <1>;
71 #reset-cells = <1>;
72 #power-domain-cells = <1>;
73 };
74 ...
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