1 Qualcomm Technologies, Inc. SPMI PMIC clock divider (clkdiv)
2
3 clkdiv configures the clock frequency of a set of outputs on the PMIC.
4 These clocks are typically wired through alternate functions on
5 gpio pins.
6
7 =======================
8 Properties
9 =======================
10
11 - compatible
12 Usage: required
13 Value type: <string>
14 Definition: must be "qcom,spmi-clkdiv".
15
16 - reg
17 Usage: required
18 Value type: <prop-encoded-array>
19 Definition: base address of CLKDIV peripherals.
20
21 - qcom,num-clkdivs
22 Usage: required
23 Value type: <u32>
24 Definition: number of CLKDIV peripherals.
25
26 - clocks:
27 Usage: required
28 Value type: <prop-encoded-array>
29 Definition: reference to the xo clock.
30
31 - clock-names:
32 Usage: required
33 Value type: <stringlist>
34 Definition: must be "xo".
35
36 - #clock-cells:
37 Usage: required
38 Value type: <u32>
39 Definition: shall contain 1.
40
41 =======
42 Example
43 =======
44
45 pm8998_clk_divs: clock-controller@5b00 {
46 compatible = "qcom,spmi-clkdiv";
47 reg = <0x5b00>;
48 #clock-cells = <1>;
49 qcom,num-clkdivs = <3>;
50 clocks = <&xo_board>;
51 clock-names = "xo";
52
53 assigned-clocks = <&pm8998_clk_divs 1>,
54 <&pm8998_clk_divs 2>,
55 <&pm8998_clk_divs 3>;
56 assigned-clock-rates = <9600000>,
57 <9600000>,
58 <9600000>;
59 };
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