qcom,videocc.yaml

Version: - FREEBSD - FREEBSD-13-STABLE - FREEBSD-13-0 - FREEBSD-12-STABLE - FREEBSD-12-0 - FREEBSD-11-STABLE - FREEBSD-11-0 - FREEBSD-10-STABLE - FREEBSD-10-0 - FREEBSD-9-STABLE - FREEBSD-9-0 - FREEBSD-8-STABLE - FREEBSD-8-0 - FREEBSD-7-STABLE - FREEBSD-7-0 - FREEBSD-6-STABLE - FREEBSD-6-0 - FREEBSD-5-STABLE - FREEBSD-5-0 - FREEBSD-4-STABLE - FREEBSD-3-STABLE - FREEBSD22 - l41 - OPENBSD - linux-2.6 - MK84 - PLAN9 - xnu-8792
SearchContext: - none - 3 - 10

    1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
    2 %YAML 1.2
    3 ---
    4 $id: http://devicetree.org/schemas/clock/qcom,videocc.yaml#
    5 $schema: http://devicetree.org/meta-schemas/core.yaml#
    6 
    7 title: Qualcomm Video Clock & Reset Controller Binding
    8 
    9 maintainers:
   10   - Taniya Das <tdas@codeaurora.org>
   11 
   12 description: |
   13   Qualcomm video clock control module which supports the clocks, resets and
   14   power domains on Qualcomm SoCs.
   15 
   16   See also:
   17     dt-bindings/clock/qcom,videocc-sc7180.h
   18     dt-bindings/clock/qcom,videocc-sc7280.h
   19     dt-bindings/clock/qcom,videocc-sdm845.h
   20     dt-bindings/clock/qcom,videocc-sm8150.h
   21     dt-bindings/clock/qcom,videocc-sm8250.h
   22 
   23 properties:
   24   compatible:
   25     enum:
   26       - qcom,sc7180-videocc
   27       - qcom,sc7280-videocc
   28       - qcom,sdm845-videocc
   29       - qcom,sm8150-videocc
   30       - qcom,sm8250-videocc
   31 
   32   clocks:
   33     items:
   34       - description: Board XO source
   35 
   36   clock-names:
   37     items:
   38       - const: bi_tcxo
   39 
   40   '#clock-cells':
   41     const: 1
   42 
   43   '#reset-cells':
   44     const: 1
   45 
   46   '#power-domain-cells':
   47     const: 1
   48 
   49   reg:
   50     maxItems: 1
   51 
   52   power-domains:
   53     description:
   54       A phandle and PM domain specifier for the MMCX power domain.
   55     maxItems: 1
   56 
   57   required-opps:
   58     description:
   59       A phandle to an OPP node describing required MMCX performance point.
   60     maxItems: 1
   61 
   62 required:
   63   - compatible
   64   - reg
   65   - clocks
   66   - clock-names
   67   - '#clock-cells'
   68   - '#reset-cells'
   69   - '#power-domain-cells'
   70 
   71 additionalProperties: false
   72 
   73 examples:
   74   - |
   75     #include <dt-bindings/clock/qcom,rpmh.h>
   76     #include <dt-bindings/power/qcom-rpmpd.h>
   77     clock-controller@ab00000 {
   78       compatible = "qcom,sdm845-videocc";
   79       reg = <0x0ab00000 0x10000>;
   80       clocks = <&rpmhcc RPMH_CXO_CLK>;
   81       clock-names = "bi_tcxo";
   82       #clock-cells = <1>;
   83       #reset-cells = <1>;
   84       #power-domain-cells = <1>;
   85       power-domains = <&rpmhpd SM8250_MMCX>;
   86       required-opps = <&rpmhpd_opp_low_svs>;
   87     };
   88 ...

Cache object: a99e6b3843e97d041018c192d2486283

[ source navigation ] [ diff markup ] [ identifier search ] [ freetext search ] [ file search ] [ list types ] [ track identifier ]

This page is part of the FreeBSD/Linux Linux Kernel Cross-Reference, and was automatically generated using a modified version of the LXR engine.

FreeBSD/Linux Kernel Cross Reference sys/contrib/device-tree/Bindings/clock/qcom,videocc.yaml

FreeBSD/Linux Kernel Cross Reference
sys/contrib/device-tree/Bindings/clock/qcom,videocc.yaml