The Design and Implementation of the FreeBSD Operating System, Second Edition
Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)


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FreeBSD/Linux Kernel Cross Reference
sys/contrib/device-tree/Bindings/clock/rockchip,rk3036-cru.yaml

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    1 # SPDX-License-Identifier: GPL-2.0
    2 %YAML 1.2
    3 ---
    4 $id: http://devicetree.org/schemas/clock/rockchip,rk3036-cru.yaml#
    5 $schema: http://devicetree.org/meta-schemas/core.yaml#
    6 
    7 title: Rockchip RK3036 Clock and Reset Unit (CRU)
    8 
    9 maintainers:
   10   - Elaine Zhang <zhangqing@rock-chips.com>
   11   - Heiko Stuebner <heiko@sntech.de>
   12 
   13 description: |
   14   The RK3036 clock controller generates and supplies clocks to various
   15   controllers within the SoC and also implements a reset controller for SoC
   16   peripherals.
   17   Each clock is assigned an identifier and client nodes can use this identifier
   18   to specify the clock which they consume. All available clocks are defined as
   19   preprocessor macros in the dt-bindings/clock/rk3036-cru.h headers and can be
   20   used in device tree sources. Similar macros exist for the reset sources in
   21   these files.
   22   There are several clocks that are generated outside the SoC. It is expected
   23   that they are defined using standard clock bindings with following
   24   clock-output-names:
   25     - "xin24m"     - crystal input       - required
   26     - "ext_i2s"    - external I2S clock  - optional
   27     - "rmii_clkin" - external EMAC clock - optional
   28 
   29 properties:
   30   compatible:
   31     enum:
   32       - rockchip,rk3036-cru
   33 
   34   reg:
   35     maxItems: 1
   36 
   37   "#clock-cells":
   38     const: 1
   39 
   40   "#reset-cells":
   41     const: 1
   42 
   43   clocks:
   44     maxItems: 1
   45 
   46   clock-names:
   47     const: xin24m
   48 
   49   rockchip,grf:
   50     $ref: /schemas/types.yaml#/definitions/phandle
   51     description:
   52       Phandle to the syscon managing the "general register files" (GRF),
   53       if missing pll rates are not changeable, due to the missing pll
   54       lock status.
   55 
   56 required:
   57   - compatible
   58   - reg
   59   - "#clock-cells"
   60   - "#reset-cells"
   61 
   62 additionalProperties: false
   63 
   64 examples:
   65   - |
   66     cru: clock-controller@20000000 {
   67       compatible = "rockchip,rk3036-cru";
   68       reg = <0x20000000 0x1000>;
   69       rockchip,grf = <&grf>;
   70       #clock-cells = <1>;
   71       #reset-cells = <1>;
   72     };

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