samsung,exynos7885-clock.yaml

Version: - FREEBSD - FREEBSD-13-STABLE - FREEBSD-13-0 - FREEBSD-12-STABLE - FREEBSD-12-0 - FREEBSD-11-STABLE - FREEBSD-11-0 - FREEBSD-10-STABLE - FREEBSD-10-0 - FREEBSD-9-STABLE - FREEBSD-9-0 - FREEBSD-8-STABLE - FREEBSD-8-0 - FREEBSD-7-STABLE - FREEBSD-7-0 - FREEBSD-6-STABLE - FREEBSD-6-0 - FREEBSD-5-STABLE - FREEBSD-5-0 - FREEBSD-4-STABLE - FREEBSD-3-STABLE - FREEBSD22 - l41 - OPENBSD - linux-2.6 - MK84 - PLAN9 - xnu-8792
SearchContext: - none - 3 - 10

    1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
    2 %YAML 1.2
    3 ---
    4 $id: http://devicetree.org/schemas/clock/samsung,exynos7885-clock.yaml#
    5 $schema: http://devicetree.org/meta-schemas/core.yaml#
    6 
    7 title: Samsung Exynos7885 SoC clock controller
    8 
    9 maintainers:
   10   - Dávid Virág <virag.david003@gmail.com>
   11   - Chanwoo Choi <cw00.choi@samsung.com>
   12   - Krzysztof Kozlowski <krzk@kernel.org>
   13   - Sylwester Nawrocki <s.nawrocki@samsung.com>
   14   - Tomasz Figa <tomasz.figa@gmail.com>
   15 
   16 description: |
   17   Exynos7885 clock controller is comprised of several CMU units, generating
   18   clocks for different domains. Those CMU units are modeled as separate device
   19   tree nodes, and might depend on each other. The root clock in that root tree
   20   is an external clock: OSCCLK (26 MHz). This external clock must be defined
   21   as a fixed-rate clock in dts.
   22 
   23   CMU_TOP is a top-level CMU, where all base clocks are prepared using PLLs and
   24   dividers; all other leaf clocks (other CMUs) are usually derived from CMU_TOP.
   25 
   26   Each clock is assigned an identifier and client nodes can use this identifier
   27   to specify the clock which they consume. All clocks available for usage
   28   in clock consumer nodes are defined as preprocessor macros in
   29   'dt-bindings/clock/exynos7885.h' header.
   30 
   31 properties:
   32   compatible:
   33     enum:
   34       - samsung,exynos7885-cmu-top
   35       - samsung,exynos7885-cmu-core
   36       - samsung,exynos7885-cmu-fsys
   37       - samsung,exynos7885-cmu-peri
   38 
   39   clocks:
   40     minItems: 1
   41     maxItems: 10
   42 
   43   clock-names:
   44     minItems: 1
   45     maxItems: 10
   46 
   47   "#clock-cells":
   48     const: 1
   49 
   50   reg:
   51     maxItems: 1
   52 
   53 allOf:
   54   - if:
   55       properties:
   56         compatible:
   57           contains:
   58             const: samsung,exynos7885-cmu-top
   59 
   60     then:
   61       properties:
   62         clocks:
   63           items:
   64             - description: External reference clock (26 MHz)
   65 
   66         clock-names:
   67           items:
   68             - const: oscclk
   69 
   70   - if:
   71       properties:
   72         compatible:
   73           contains:
   74             const: samsung,exynos7885-cmu-core
   75 
   76     then:
   77       properties:
   78         clocks:
   79           items:
   80             - description: External reference clock (26 MHz)
   81             - description: CMU_CORE bus clock (from CMU_TOP)
   82             - description: CCI clock (from CMU_TOP)
   83             - description: G3D clock (from CMU_TOP)
   84 
   85         clock-names:
   86           items:
   87             - const: oscclk
   88             - const: dout_core_bus
   89             - const: dout_core_cci
   90             - const: dout_core_g3d
   91 
   92   - if:
   93       properties:
   94         compatible:
   95           contains:
   96             const: samsung,exynos7885-cmu-fsys
   97 
   98     then:
   99       properties:
  100         clocks:
  101           items:
  102             - description: External reference clock (26 MHz)
  103             - description: CMU_FSYS bus clock (from CMU_TOP)
  104             - description: MMC_CARD clock (from CMU_TOP)
  105             - description: MMC_EMBD clock (from CMU_TOP)
  106             - description: MMC_SDIO clock (from CMU_TOP)
  107             - description: USB30DRD clock (from CMU_TOP)
  108 
  109         clock-names:
  110           items:
  111             - const: oscclk
  112             - const: dout_fsys_bus
  113             - const: dout_fsys_mmc_card
  114             - const: dout_fsys_mmc_embd
  115             - const: dout_fsys_mmc_sdio
  116             - const: dout_fsys_usb30drd
  117 
  118   - if:
  119       properties:
  120         compatible:
  121           contains:
  122             const: samsung,exynos7885-cmu-peri
  123 
  124     then:
  125       properties:
  126         clocks:
  127           items:
  128             - description: External reference clock (26 MHz)
  129             - description: CMU_PERI bus clock (from CMU_TOP)
  130             - description: SPI0 clock (from CMU_TOP)
  131             - description: SPI1 clock (from CMU_TOP)
  132             - description: UART0 clock (from CMU_TOP)
  133             - description: UART1 clock (from CMU_TOP)
  134             - description: UART2 clock (from CMU_TOP)
  135             - description: USI0 clock (from CMU_TOP)
  136             - description: USI1 clock (from CMU_TOP)
  137             - description: USI2 clock (from CMU_TOP)
  138 
  139         clock-names:
  140           items:
  141             - const: oscclk
  142             - const: dout_peri_bus
  143             - const: dout_peri_spi0
  144             - const: dout_peri_spi1
  145             - const: dout_peri_uart0
  146             - const: dout_peri_uart1
  147             - const: dout_peri_uart2
  148             - const: dout_peri_usi0
  149             - const: dout_peri_usi1
  150             - const: dout_peri_usi2
  151 
  152 required:
  153   - compatible
  154   - "#clock-cells"
  155   - clocks
  156   - clock-names
  157   - reg
  158 
  159 additionalProperties: false
  160 
  161 examples:
  162   # Clock controller node for CMU_PERI
  163   - |
  164     #include <dt-bindings/clock/exynos7885.h>
  165 
  166     cmu_peri: clock-controller@10010000 {
  167         compatible = "samsung,exynos7885-cmu-peri";
  168         reg = <0x10010000 0x8000>;
  169         #clock-cells = <1>;
  170 
  171         clocks = <&oscclk>,
  172                  <&cmu_top CLK_DOUT_PERI_BUS>,
  173                  <&cmu_top CLK_DOUT_PERI_SPI0>,
  174                  <&cmu_top CLK_DOUT_PERI_SPI1>,
  175                  <&cmu_top CLK_DOUT_PERI_UART0>,
  176                  <&cmu_top CLK_DOUT_PERI_UART1>,
  177                  <&cmu_top CLK_DOUT_PERI_UART2>,
  178                  <&cmu_top CLK_DOUT_PERI_USI0>,
  179                  <&cmu_top CLK_DOUT_PERI_USI1>,
  180                  <&cmu_top CLK_DOUT_PERI_USI2>;
  181         clock-names = "oscclk",
  182                       "dout_peri_bus",
  183                       "dout_peri_spi0",
  184                       "dout_peri_spi1",
  185                       "dout_peri_uart0",
  186                       "dout_peri_uart1",
  187                       "dout_peri_uart2",
  188                       "dout_peri_usi0",
  189                       "dout_peri_usi1",
  190                       "dout_peri_usi2";
  191     };
  192 
  193 ...

Cache object: 9a4d8ef270039ea72ba7221fe2cc6bea

[ source navigation ] [ diff markup ] [ identifier search ] [ freetext search ] [ file search ] [ list types ] [ track identifier ]

This page is part of the FreeBSD/Linux Linux Kernel Cross-Reference, and was automatically generated using a modified version of the LXR engine.

FreeBSD/Linux Kernel Cross Reference sys/contrib/device-tree/Bindings/clock/samsung,exynos7885-clock.yaml

FreeBSD/Linux Kernel Cross Reference
sys/contrib/device-tree/Bindings/clock/samsung,exynos7885-clock.yaml