st,stm32mp1-rcc.yaml

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    1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
    2 %YAML 1.2
    3 ---
    4 $id: http://devicetree.org/schemas/clock/st,stm32mp1-rcc.yaml#
    5 $schema: http://devicetree.org/meta-schemas/core.yaml#
    6 
    7 title: Reset Clock Controller Binding
    8 
    9 maintainers:
   10   - Gabriel Fernandez <gabriel.fernandez@foss.st.com>
   11 
   12 description: |
   13   The RCC IP is both a reset and a clock controller.
   14   RCC makes also power management (resume/supend and wakeup interrupt).
   15   Please also refer to reset.txt for common reset controller binding usage.
   16 
   17   This binding uses common clock bindings
   18   Documentation/devicetree/bindings/clock/clock-bindings.txt
   19 
   20   Specifying clocks
   21   =================
   22 
   23   All available clocks are defined as preprocessor macros in
   24   dt-bindings/clock/stm32mp1-clks.h header and can be used in device
   25   tree sources.
   26 
   27   Specifying softreset control of devices
   28   =======================================
   29 
   30   Device nodes should specify the reset channel required in their "resets"
   31   property, containing a phandle to the reset device node and an index specifying
   32   which channel to use.
   33   The index is the bit number within the RCC registers bank, starting from RCC
   34   base address.
   35   It is calculated as: index = register_offset / 4 * 32 + bit_offset.
   36   Where bit_offset is the bit offset within the register.
   37 
   38   For example on STM32MP1, for LTDC reset:
   39      ltdc = APB4_RSTSETR_offset / 4 * 32 + LTDC_bit_offset
   40           = 0x180 / 4 * 32 + 0 = 3072
   41 
   42   The list of valid indices for STM32MP1 is available in:
   43   include/dt-bindings/reset-controller/stm32mp1-resets.h
   44   include/dt-bindings/reset-controller/stm32mp13-resets.h
   45 
   46   This file implements defines like:
   47   #define LTDC_R        3072
   48 
   49 properties:
   50   "#clock-cells":
   51     const: 1
   52 
   53   "#reset-cells":
   54     const: 1
   55 
   56   compatible:
   57     items:
   58       - enum:
   59           - st,stm32mp1-rcc-secure
   60           - st,stm32mp1-rcc
   61           - st,stm32mp13-rcc
   62       - const: syscon
   63   clocks: true
   64   clock-names: true
   65 
   66   reg:
   67     maxItems: 1
   68 
   69 required:
   70   - "#clock-cells"
   71   - "#reset-cells"
   72   - compatible
   73   - reg
   74 
   75 if:
   76   properties:
   77     compatible:
   78       contains:
   79         enum:
   80           - st,stm32mp1-rcc-secure
   81           - st,stm32mp13-rcc
   82 then:
   83   properties:
   84     clocks:
   85       description: Specifies oscillators.
   86       maxItems: 5
   87 
   88     clock-names:
   89       items:
   90         - const: hse
   91         - const: hsi
   92         - const: csi
   93         - const: lse
   94         - const: lsi
   95   required:
   96     - clocks
   97     - clock-names
   98 else:
   99   properties:
  100     clocks:
  101       description:
  102         Specifies the external RX clock for ethernet MAC.
  103       maxItems: 1
  104 
  105     clock-names:
  106       const: ETH_RX_CLK/ETH_REF_CLK
  107 
  108 additionalProperties: false
  109 
  110 examples:
  111   - |
  112     #include <dt-bindings/clock/stm32mp1-clks.h>
  113     rcc: rcc@50000000 {
  114         compatible = "st,stm32mp1-rcc-secure", "syscon";
  115         reg = <0x50000000 0x1000>;
  116         #clock-cells = <1>;
  117         #reset-cells = <1>;
  118         clock-names = "hse", "hsi", "csi", "lse", "lsi";
  119         clocks = <&scmi_clk CK_SCMI_HSE>,
  120                  <&scmi_clk CK_SCMI_HSI>,
  121                  <&scmi_clk CK_SCMI_CSI>,
  122                  <&scmi_clk CK_SCMI_LSE>,
  123                  <&scmi_clk CK_SCMI_LSI>;
  124     };
  125 ...

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sys/contrib/device-tree/Bindings/clock/st,stm32mp1-rcc.yaml