The Design and Implementation of the FreeBSD Operating System, Second Edition
Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)

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FreeBSD/Linux Kernel Cross Reference
sys/contrib/device-tree/Bindings/clock/starfive,jh7100-audclk.yaml

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    1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
    2 %YAML 1.2
    3 ---
    4 $id: http://devicetree.org/schemas/clock/starfive,jh7100-audclk.yaml#
    5 $schema: http://devicetree.org/meta-schemas/core.yaml#
    6 
    7 title: StarFive JH7100 Audio Clock Generator
    8 
    9 maintainers:
   10   - Emil Renner Berthing <kernel@esmil.dk>
   11 
   12 properties:
   13   compatible:
   14     const: starfive,jh7100-audclk
   15 
   16   reg:
   17     maxItems: 1
   18 
   19   clocks:
   20     items:
   21       - description: Audio source clock
   22       - description: External 12.288MHz clock
   23       - description: Domain 7 AHB bus clock
   24 
   25   clock-names:
   26     items:
   27       - const: audio_src
   28       - const: audio_12288
   29       - const: dom7ahb_bus
   30 
   31   '#clock-cells':
   32     const: 1
   33     description:
   34       See <dt-bindings/clock/starfive-jh7100-audio.h> for valid indices.
   35 
   36 required:
   37   - compatible
   38   - reg
   39   - clocks
   40   - clock-names
   41   - '#clock-cells'
   42 
   43 additionalProperties: false
   44 
   45 examples:
   46   - |
   47     #include <dt-bindings/clock/starfive-jh7100.h>
   48 
   49     clock-controller@10480000 {
   50             compatible = "starfive,jh7100-audclk";
   51             reg = <0x10480000 0x10000>;
   52             clocks = <&clkgen JH7100_CLK_AUDIO_SRC>,
   53                      <&clkgen JH7100_CLK_AUDIO_12288>,
   54                      <&clkgen JH7100_CLK_DOM7AHB_BUS>;
   55             clock-names = "audio_src", "audio_12288", "dom7ahb_bus";
   56             #clock-cells = <1>;
   57     };

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