pll.txt

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    1 Binding for TI DaVinci PLL Controllers
    2 
    3 The PLL provides clocks to most of the components on the SoC. In addition
    4 to the PLL itself, this controller also contains bypasses, gates, dividers,
    5 an multiplexers for various clock signals.
    6 
    7 Required properties:
    8 - compatible: shall be one of:
    9         - "ti,da850-pll0" for PLL0 on DA850/OMAP-L138/AM18XX
   10         - "ti,da850-pll1" for PLL1 on DA850/OMAP-L138/AM18XX
   11 - reg: physical base address and size of the controller's register area.
   12 - clocks: phandles corresponding to the clock names
   13 - clock-names: names of the clock sources - depends on compatible string
   14         - for "ti,da850-pll0", shall be "clksrc", "extclksrc"
   15         - for "ti,da850-pll1", shall be "clksrc"
   16 
   17 Optional properties:
   18 - ti,clkmode-square-wave: Indicates that the board is supplying a square
   19         wave input on the OSCIN pin instead of using a crystal oscillator.
   20         This property is only valid when compatible = "ti,da850-pll0".
   21 
   22 
   23 Optional child nodes:
   24 
   25 pllout
   26         Describes the main PLL clock output (before POSTDIV). The node name must
   27         be "pllout".
   28 
   29         Required properties:
   30         - #clock-cells: shall be 0
   31 
   32 sysclk
   33         Describes the PLLDIVn divider clocks that provide the SYSCLKn clock
   34         domains. The node name must be "sysclk". Consumers of this node should
   35         use "n" in "SYSCLKn" as the index parameter for the clock cell.
   36 
   37         Required properties:
   38         - #clock-cells: shall be 1
   39 
   40 auxclk
   41         Describes the AUXCLK output of the PLL. The node name must be "auxclk".
   42         This child node is only valid when compatible = "ti,da850-pll0".
   43 
   44         Required properties:
   45         - #clock-cells: shall be 0
   46 
   47 obsclk
   48         Describes the OBSCLK output of the PLL. The node name must be "obsclk".
   49 
   50         Required properties:
   51         - #clock-cells: shall be 0
   52 
   53 
   54 Examples:
   55 
   56         pll0: clock-controller@11000 {
   57                 compatible = "ti,da850-pll0";
   58                 reg = <0x11000 0x1000>;
   59                 clocks = <&ref_clk>, <&pll1_sysclk 3>;
   60                 clock-names = "clksrc", "extclksrc";
   61                 ti,clkmode-square-wave;
   62 
   63                 pll0_pllout: pllout {
   64                         #clock-cells = <0>;
   65                 };
   66 
   67                 pll0_sysclk: sysclk {
   68                         #clock-cells = <1>;
   69                 };
   70 
   71                 pll0_auxclk: auxclk {
   72                         #clock-cells = <0>;
   73                 };
   74 
   75                 pll0_obsclk: obsclk {
   76                         #clock-cells = <0>;
   77                 };
   78         };
   79 
   80         pll1: clock-controller@21a000 {
   81                 compatible = "ti,da850-pll1";
   82                 reg = <0x21a000 0x1000>;
   83                 clocks = <&ref_clk>;
   84                 clock-names = "clksrc";
   85 
   86                 pll0_sysclk: sysclk {
   87                         #clock-cells = <1>;
   88                 };
   89 
   90                 pll0_obsclk: obsclk {
   91                         #clock-cells = <0>;
   92                 };
   93         };
   94 
   95 Also see:
   96 - Documentation/devicetree/bindings/clock/clock-bindings.txt

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