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     1 Device Tree Clock bindings for ZTE zx296718
    2 
    3 This binding uses the common clock binding[1].
    4 
    5 [1] Documentation/devicetree/bindings/clock/clock-bindings.txt
    6 
    7 Required properties:
    8 - compatible : shall be one of the following:
    9         "zte,zx296718-topcrm":
   10                 zx296718 top clock selection, divider and gating
   11 
   12         "zte,zx296718-lsp0crm" and
   13         "zte,zx296718-lsp1crm":
   14                 zx296718 device level clock selection and gating
   15 
   16         "zte,zx296718-audiocrm":
   17                 zx296718 audio clock selection, divider and gating
   18 
   19 - reg: Address and length of the register set
   20 
   21 The clock consumer should specify the desired clock by having the clock
   22 ID in its "clocks" phandle cell. See include/dt-bindings/clock/zx296718-clock.h
   23 for the full list of zx296718 clock IDs.
   24 
   25 
   26 topclk: topcrm@1461000 {
   27         compatible = "zte,zx296718-topcrm-clk";
   28         reg = <0x01461000 0x1000>;
   29         #clock-cells = <1>;
   30 };
   31 
   32 usbphy0:usb-phy0 {
   33         compatible = "zte,zx296718-usb-phy";
   34         #phy-cells = <0>;
   35         clocks = <&topclk USB20_PHY_CLK>;
   36         clock-names = "phyclk";
   37 };
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